xref: /openbmc/qemu/target/riscv/insn32.decode (revision eed0e8ff)
1#
2# RISC-V translation routines for the RVXI Base Integer Instruction Set.
3#
4# Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de
5#                    Bastian Koppelmann, kbastian@mail.uni-paderborn.de
6#
7# This program is free software; you can redistribute it and/or modify it
8# under the terms and conditions of the GNU General Public License,
9# version 2 or later, as published by the Free Software Foundation.
10#
11# This program is distributed in the hope it will be useful, but WITHOUT
12# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14# more details.
15#
16# You should have received a copy of the GNU General Public License along with
17# this program.  If not, see <http://www.gnu.org/licenses/>.
18
19# Fields:
20%rs3       27:5
21%rs2       20:5
22%rs1       15:5
23%rd        7:5
24%sh5       20:5
25%sh6       20:6
26
27%sh7    20:7
28%csr    20:12
29%rm     12:3
30%nf     29:3                     !function=ex_plus_1
31
32# immediates:
33%imm_i    20:s12
34%imm_s    25:s7 7:5
35%imm_b    31:s1 7:1 25:6 8:4     !function=ex_shift_1
36%imm_j    31:s1 12:8 20:1 21:10  !function=ex_shift_1
37%imm_u    12:s20                 !function=ex_shift_12
38%imm_bs   30:2                   !function=ex_shift_3
39%imm_rnum 20:4
40%imm_z6   26:1 15:5
41%imm_mop5 30:1 26:2 20:2
42%imm_mop3 30:1 26:2
43
44# Argument sets:
45&empty
46&b    imm rs2 rs1
47&i    imm rs1 rd
48&j    imm rd
49&r    rd rs1 rs2
50&r2   rd rs1
51&r2_s rs1 rs2
52&s    imm rs1 rs2
53&u    imm rd
54&shift     shamt rs1 rd
55&atomic    aq rl rs2 rs1 rd
56&rmrr      vm rd rs1 rs2
57&rmr       vm rd rs2
58&r2nfvm    vm rd rs1 nf
59&rnfvm     vm rd rs1 rs2 nf
60&k_aes     shamt rs2 rs1 rd
61&mop5 imm rd rs1
62&mop3 imm rd rs1 rs2
63
64# Formats 32:
65@r       .......   ..... ..... ... ..... ....... &r                %rs2 %rs1 %rd
66@i       ............    ..... ... ..... ....... &i      imm=%imm_i     %rs1 %rd
67@b       .......   ..... ..... ... ..... ....... &b      imm=%imm_b %rs2 %rs1
68@s       .......   ..... ..... ... ..... ....... &s      imm=%imm_s %rs2 %rs1
69@u       ....................      ..... ....... &u      imm=%imm_u          %rd
70@j       ....................      ..... ....... &j      imm=%imm_j          %rd
71
72@sh      ......  ...... .....  ... ..... ....... &shift  shamt=%sh7     %rs1 %rd
73@csr     ............   .....  ... ..... .......               %csr     %rs1 %rd
74
75@atom_ld ..... aq:1 rl:1 ..... ........ ..... ....... &atomic rs2=0     %rs1 %rd
76@atom_st ..... aq:1 rl:1 ..... ........ ..... ....... &atomic %rs2      %rs1 %rd
77
78@r4_rm   ..... ..  ..... ..... ... ..... ....... %rs3 %rs2 %rs1 %rm %rd
79@r_rm    .......   ..... ..... ... ..... ....... %rs2 %rs1 %rm %rd
80@r2_rm   .......   ..... ..... ... ..... ....... %rs1 %rm %rd
81@r2      .......   ..... ..... ... ..... ....... &r2 %rs1 %rd
82@r2_vm_1 ...... . ..... ..... ... ..... ....... &rmr vm=1 %rs2 %rd
83@r2_nfvm ... ... vm:1 ..... ..... ... ..... ....... &r2nfvm %nf %rs1 %rd
84@r2_vm   ...... vm:1 ..... ..... ... ..... ....... &rmr %rs2 %rd
85@r1_vm   ...... vm:1 ..... ..... ... ..... ....... %rd
86@r_nfvm  ... ... vm:1 ..... ..... ... ..... ....... &rnfvm %nf %rs2 %rs1 %rd
87@r2rd    .......   ..... ..... ... ..... ....... %rs2 %rd
88@r_vm    ...... vm:1 ..... ..... ... ..... ....... &rmrr %rs2 %rs1 %rd
89@r_vm_1  ...... . ..... ..... ... ..... .......    &rmrr vm=1 %rs2 %rs1 %rd
90@r_vm_0  ...... . ..... ..... ... ..... .......    &rmrr vm=0 %rs2 %rs1 %rd
91@r2_zimm6  ..... . vm:1 ..... ..... ... ..... .......  &rmrr %rs2 rs1=%imm_z6 %rd
92@r2_zimm11 . zimm:11  ..... ... ..... ....... %rs1 %rd
93@r2_zimm10 .. zimm:10  ..... ... ..... ....... %rs1 %rd
94@r2_s    .......   ..... ..... ... ..... ....... %rs2 %rs1
95
96@hfence_gvma ....... ..... .....   ... ..... ....... %rs2 %rs1
97@hfence_vvma ....... ..... .....   ... ..... ....... %rs2 %rs1
98
99@sfence_vma ....... ..... .....   ... ..... ....... %rs2 %rs1
100@sfence_vm  ....... ..... .....   ... ..... ....... %rs1
101
102@k_aes   .. ..... ..... .....  ... ..... ....... &k_aes  shamt=%imm_bs   %rs2 %rs1 %rd
103@i_aes   .. ..... ..... .....  ... ..... ....... &i      imm=%imm_rnum        %rs1 %rd
104
105@mop5 . . .. .. .... .. ..... ... ..... ....... &mop5 imm=%imm_mop5 %rd %rs1
106@mop3 . . .. .. . ..... ..... ... ..... ....... &mop3 imm=%imm_mop3 %rd %rs1 %rs2
107
108# Formats 64:
109@sh5     .......  ..... .....  ... ..... ....... &shift  shamt=%sh5      %rs1 %rd
110
111# Formats 128:
112@sh6       ...... ...... ..... ... ..... ....... &shift shamt=%sh6 %rs1 %rd
113
114# *** Privileged Instructions ***
115ecall       000000000000     00000 000 00000 1110011
116ebreak      000000000001     00000 000 00000 1110011
117uret        0000000    00010 00000 000 00000 1110011
118sret        0001000    00010 00000 000 00000 1110011
119mret        0011000    00010 00000 000 00000 1110011
120wfi         0001000    00101 00000 000 00000 1110011
121sfence_vma  0001001    ..... ..... 000 00000 1110011 @sfence_vma
122sfence_vm   0001000    00100 ..... 000 00000 1110011 @sfence_vm
123
124# *** RV32I Base Instruction Set ***
125lui      ....................       ..... 0110111 @u
126auipc    ....................       ..... 0010111 @u
127jal      ....................       ..... 1101111 @j
128jalr     ............     ..... 000 ..... 1100111 @i
129beq      ....... .....    ..... 000 ..... 1100011 @b
130bne      ....... .....    ..... 001 ..... 1100011 @b
131blt      ....... .....    ..... 100 ..... 1100011 @b
132bge      ....... .....    ..... 101 ..... 1100011 @b
133bltu     ....... .....    ..... 110 ..... 1100011 @b
134bgeu     ....... .....    ..... 111 ..... 1100011 @b
135lb       ............     ..... 000 ..... 0000011 @i
136lh       ............     ..... 001 ..... 0000011 @i
137lw       ............     ..... 010 ..... 0000011 @i
138lbu      ............     ..... 100 ..... 0000011 @i
139lhu      ............     ..... 101 ..... 0000011 @i
140sb       .......  .....   ..... 000 ..... 0100011 @s
141sh       .......  .....   ..... 001 ..... 0100011 @s
142sw       .......  .....   ..... 010 ..... 0100011 @s
143addi     ............     ..... 000 ..... 0010011 @i
144slti     ............     ..... 010 ..... 0010011 @i
145sltiu    ............     ..... 011 ..... 0010011 @i
146xori     ............     ..... 100 ..... 0010011 @i
147# cbo.prefetch_{i,r,m} instructions are ori with rd=x0 and not decoded.
148ori      ............     ..... 110 ..... 0010011 @i
149andi     ............     ..... 111 ..... 0010011 @i
150slli     00000. ......    ..... 001 ..... 0010011 @sh
151srli     00000. ......    ..... 101 ..... 0010011 @sh
152srai     01000. ......    ..... 101 ..... 0010011 @sh
153add      0000000 .....    ..... 000 ..... 0110011 @r
154sub      0100000 .....    ..... 000 ..... 0110011 @r
155sll      0000000 .....    ..... 001 ..... 0110011 @r
156slt      0000000 .....    ..... 010 ..... 0110011 @r
157sltu     0000000 .....    ..... 011 ..... 0110011 @r
158xor      0000000 .....    ..... 100 ..... 0110011 @r
159srl      0000000 .....    ..... 101 ..... 0110011 @r
160sra      0100000 .....    ..... 101 ..... 0110011 @r
161or       0000000 .....    ..... 110 ..... 0110011 @r
162and      0000000 .....    ..... 111 ..... 0110011 @r
163
164{
165  pause  0000 0001   0000   00000 000 00000 0001111
166  fence  ---- pred:4 succ:4 ----- 000 ----- 0001111
167}
168
169fence_i  ---- ----   ----   ----- 001 ----- 0001111
170csrrw    ............     ..... 001 ..... 1110011 @csr
171csrrs    ............     ..... 010 ..... 1110011 @csr
172csrrc    ............     ..... 011 ..... 1110011 @csr
173csrrwi   ............     ..... 101 ..... 1110011 @csr
174csrrsi   ............     ..... 110 ..... 1110011 @csr
175csrrci   ............     ..... 111 ..... 1110011 @csr
176
177# *** RV64I Base Instruction Set (in addition to RV32I) ***
178lwu      ............   ..... 110 ..... 0000011 @i
179ld       ............   ..... 011 ..... 0000011 @i
180sd       ....... .....  ..... 011 ..... 0100011 @s
181addiw    ............   ..... 000 ..... 0011011 @i
182slliw    0000000 .....  ..... 001 ..... 0011011 @sh5
183srliw    0000000 .....  ..... 101 ..... 0011011 @sh5
184sraiw    0100000 .....  ..... 101 ..... 0011011 @sh5
185addw     0000000 .....  ..... 000 ..... 0111011 @r
186subw     0100000 .....  ..... 000 ..... 0111011 @r
187sllw     0000000 .....  ..... 001 ..... 0111011 @r
188srlw     0000000 .....  ..... 101 ..... 0111011 @r
189sraw     0100000 .....  ..... 101 ..... 0111011 @r
190
191# *** RV128I Base Instruction Set (in addition to RV64I) ***
192ldu      ............   ..... 111 ..... 0000011 @i
193{
194  [
195    # *** RV32 Zicbom Standard Extension ***
196    cbo_clean  0000000 00001 ..... 010 00000 0001111 @sfence_vm
197    cbo_flush  0000000 00010 ..... 010 00000 0001111 @sfence_vm
198    cbo_inval  0000000 00000 ..... 010 00000 0001111 @sfence_vm
199
200    # *** RV32 Zicboz Standard Extension ***
201    cbo_zero   0000000 00100 ..... 010 00000 0001111 @sfence_vm
202  ]
203
204  # *** RVI128 lq ***
205  lq       ............   ..... 010 ..... 0001111 @i
206}
207sq       ............   ..... 100 ..... 0100011 @s
208addid    ............  .....  000 ..... 1011011 @i
209sllid    000000 ......  ..... 001 ..... 1011011 @sh6
210srlid    000000 ......  ..... 101 ..... 1011011 @sh6
211sraid    010000 ......  ..... 101 ..... 1011011 @sh6
212addd     0000000 ..... .....  000 ..... 1111011 @r
213subd     0100000 ..... .....  000 ..... 1111011 @r
214slld     0000000 ..... .....  001 ..... 1111011 @r
215srld     0000000 ..... .....  101 ..... 1111011 @r
216srad     0100000 ..... .....  101 ..... 1111011 @r
217
218# *** RV32M Standard Extension ***
219mul      0000001 .....  ..... 000 ..... 0110011 @r
220mulh     0000001 .....  ..... 001 ..... 0110011 @r
221mulhsu   0000001 .....  ..... 010 ..... 0110011 @r
222mulhu    0000001 .....  ..... 011 ..... 0110011 @r
223div      0000001 .....  ..... 100 ..... 0110011 @r
224divu     0000001 .....  ..... 101 ..... 0110011 @r
225rem      0000001 .....  ..... 110 ..... 0110011 @r
226remu     0000001 .....  ..... 111 ..... 0110011 @r
227
228# *** RV64M Standard Extension (in addition to RV32M) ***
229mulw     0000001 .....  ..... 000 ..... 0111011 @r
230divw     0000001 .....  ..... 100 ..... 0111011 @r
231divuw    0000001 .....  ..... 101 ..... 0111011 @r
232remw     0000001 .....  ..... 110 ..... 0111011 @r
233remuw    0000001 .....  ..... 111 ..... 0111011 @r
234
235# *** RV128M Standard Extension (in addition to RV64M) ***
236muld     0000001 .....  ..... 000 ..... 1111011 @r
237divd     0000001 .....  ..... 100 ..... 1111011 @r
238divud    0000001 .....  ..... 101 ..... 1111011 @r
239remd     0000001 .....  ..... 110 ..... 1111011 @r
240remud    0000001 .....  ..... 111 ..... 1111011 @r
241
242# *** RV32A Standard Extension ***
243lr_w       00010 . . 00000 ..... 010 ..... 0101111 @atom_ld
244sc_w       00011 . . ..... ..... 010 ..... 0101111 @atom_st
245amoswap_w  00001 . . ..... ..... 010 ..... 0101111 @atom_st
246amoadd_w   00000 . . ..... ..... 010 ..... 0101111 @atom_st
247amoxor_w   00100 . . ..... ..... 010 ..... 0101111 @atom_st
248amoand_w   01100 . . ..... ..... 010 ..... 0101111 @atom_st
249amoor_w    01000 . . ..... ..... 010 ..... 0101111 @atom_st
250amomin_w   10000 . . ..... ..... 010 ..... 0101111 @atom_st
251amomax_w   10100 . . ..... ..... 010 ..... 0101111 @atom_st
252amominu_w  11000 . . ..... ..... 010 ..... 0101111 @atom_st
253amomaxu_w  11100 . . ..... ..... 010 ..... 0101111 @atom_st
254
255# *** RV64A Standard Extension (in addition to RV32A) ***
256lr_d       00010 . . 00000 ..... 011 ..... 0101111 @atom_ld
257sc_d       00011 . . ..... ..... 011 ..... 0101111 @atom_st
258amoswap_d  00001 . . ..... ..... 011 ..... 0101111 @atom_st
259amoadd_d   00000 . . ..... ..... 011 ..... 0101111 @atom_st
260amoxor_d   00100 . . ..... ..... 011 ..... 0101111 @atom_st
261amoand_d   01100 . . ..... ..... 011 ..... 0101111 @atom_st
262amoor_d    01000 . . ..... ..... 011 ..... 0101111 @atom_st
263amomin_d   10000 . . ..... ..... 011 ..... 0101111 @atom_st
264amomax_d   10100 . . ..... ..... 011 ..... 0101111 @atom_st
265amominu_d  11000 . . ..... ..... 011 ..... 0101111 @atom_st
266amomaxu_d  11100 . . ..... ..... 011 ..... 0101111 @atom_st
267
268# *** RV32F Standard Extension ***
269flw        ............   ..... 010 ..... 0000111 @i
270fsw        .......  ..... ..... 010 ..... 0100111 @s
271fmadd_s    ..... 00 ..... ..... ... ..... 1000011 @r4_rm
272fmsub_s    ..... 00 ..... ..... ... ..... 1000111 @r4_rm
273fnmsub_s   ..... 00 ..... ..... ... ..... 1001011 @r4_rm
274fnmadd_s   ..... 00 ..... ..... ... ..... 1001111 @r4_rm
275fadd_s     0000000  ..... ..... ... ..... 1010011 @r_rm
276fsub_s     0000100  ..... ..... ... ..... 1010011 @r_rm
277fmul_s     0001000  ..... ..... ... ..... 1010011 @r_rm
278fdiv_s     0001100  ..... ..... ... ..... 1010011 @r_rm
279fsqrt_s    0101100  00000 ..... ... ..... 1010011 @r2_rm
280fsgnj_s    0010000  ..... ..... 000 ..... 1010011 @r
281fsgnjn_s   0010000  ..... ..... 001 ..... 1010011 @r
282fsgnjx_s   0010000  ..... ..... 010 ..... 1010011 @r
283fmin_s     0010100  ..... ..... 000 ..... 1010011 @r
284fmax_s     0010100  ..... ..... 001 ..... 1010011 @r
285fcvt_w_s   1100000  00000 ..... ... ..... 1010011 @r2_rm
286fcvt_wu_s  1100000  00001 ..... ... ..... 1010011 @r2_rm
287fmv_x_w    1110000  00000 ..... 000 ..... 1010011 @r2
288feq_s      1010000  ..... ..... 010 ..... 1010011 @r
289flt_s      1010000  ..... ..... 001 ..... 1010011 @r
290fle_s      1010000  ..... ..... 000 ..... 1010011 @r
291fclass_s   1110000  00000 ..... 001 ..... 1010011 @r2
292fcvt_s_w   1101000  00000 ..... ... ..... 1010011 @r2_rm
293fcvt_s_wu  1101000  00001 ..... ... ..... 1010011 @r2_rm
294fmv_w_x    1111000  00000 ..... 000 ..... 1010011 @r2
295
296# *** RV64F Standard Extension (in addition to RV32F) ***
297fcvt_l_s   1100000  00010 ..... ... ..... 1010011 @r2_rm
298fcvt_lu_s  1100000  00011 ..... ... ..... 1010011 @r2_rm
299fcvt_s_l   1101000  00010 ..... ... ..... 1010011 @r2_rm
300fcvt_s_lu  1101000  00011 ..... ... ..... 1010011 @r2_rm
301
302# *** RV32D Standard Extension ***
303fld        ............   ..... 011 ..... 0000111 @i
304fsd        ....... .....  ..... 011 ..... 0100111 @s
305fmadd_d    ..... 01 ..... ..... ... ..... 1000011 @r4_rm
306fmsub_d    ..... 01 ..... ..... ... ..... 1000111 @r4_rm
307fnmsub_d   ..... 01 ..... ..... ... ..... 1001011 @r4_rm
308fnmadd_d   ..... 01 ..... ..... ... ..... 1001111 @r4_rm
309fadd_d     0000001  ..... ..... ... ..... 1010011 @r_rm
310fsub_d     0000101  ..... ..... ... ..... 1010011 @r_rm
311fmul_d     0001001  ..... ..... ... ..... 1010011 @r_rm
312fdiv_d     0001101  ..... ..... ... ..... 1010011 @r_rm
313fsqrt_d    0101101  00000 ..... ... ..... 1010011 @r2_rm
314fsgnj_d    0010001  ..... ..... 000 ..... 1010011 @r
315fsgnjn_d   0010001  ..... ..... 001 ..... 1010011 @r
316fsgnjx_d   0010001  ..... ..... 010 ..... 1010011 @r
317fmin_d     0010101  ..... ..... 000 ..... 1010011 @r
318fmax_d     0010101  ..... ..... 001 ..... 1010011 @r
319fcvt_s_d   0100000  00001 ..... ... ..... 1010011 @r2_rm
320fcvt_d_s   0100001  00000 ..... ... ..... 1010011 @r2_rm
321feq_d      1010001  ..... ..... 010 ..... 1010011 @r
322flt_d      1010001  ..... ..... 001 ..... 1010011 @r
323fle_d      1010001  ..... ..... 000 ..... 1010011 @r
324fclass_d   1110001  00000 ..... 001 ..... 1010011 @r2
325fcvt_w_d   1100001  00000 ..... ... ..... 1010011 @r2_rm
326fcvt_wu_d  1100001  00001 ..... ... ..... 1010011 @r2_rm
327fcvt_d_w   1101001  00000 ..... ... ..... 1010011 @r2_rm
328fcvt_d_wu  1101001  00001 ..... ... ..... 1010011 @r2_rm
329
330# *** RV64D Standard Extension (in addition to RV32D) ***
331fcvt_l_d   1100001  00010 ..... ... ..... 1010011 @r2_rm
332fcvt_lu_d  1100001  00011 ..... ... ..... 1010011 @r2_rm
333fmv_x_d    1110001  00000 ..... 000 ..... 1010011 @r2
334fcvt_d_l   1101001  00010 ..... ... ..... 1010011 @r2_rm
335fcvt_d_lu  1101001  00011 ..... ... ..... 1010011 @r2_rm
336fmv_d_x    1111001  00000 ..... 000 ..... 1010011 @r2
337
338# *** RV32H Base Instruction Set ***
339hlv_b       0110000  00000  ..... 100 ..... 1110011 @r2
340hlv_bu      0110000  00001  ..... 100 ..... 1110011 @r2
341hlv_h       0110010  00000  ..... 100 ..... 1110011 @r2
342hlv_hu      0110010  00001  ..... 100 ..... 1110011 @r2
343hlvx_hu     0110010  00011  ..... 100 ..... 1110011 @r2
344hlv_w       0110100  00000  ..... 100 ..... 1110011 @r2
345hlvx_wu     0110100  00011  ..... 100 ..... 1110011 @r2
346hsv_b       0110001  .....  ..... 100 00000 1110011 @r2_s
347hsv_h       0110011  .....  ..... 100 00000 1110011 @r2_s
348hsv_w       0110101  .....  ..... 100 00000 1110011 @r2_s
349hfence_gvma 0110001  .....  ..... 000 00000 1110011 @hfence_gvma
350hfence_vvma 0010001  .....  ..... 000 00000 1110011 @hfence_vvma
351
352# *** RV64H Base Instruction Set ***
353hlv_wu    0110100  00001   ..... 100 ..... 1110011 @r2
354hlv_d     0110110  00000   ..... 100 ..... 1110011 @r2
355hsv_d     0110111  .....   ..... 100 00000 1110011 @r2_s
356
357# *** Vector loads and stores are encoded within LOADFP/STORE-FP ***
358# Vector unit-stride load/store insns.
359vle8_v     ... 000 . 00000 ..... 000 ..... 0000111 @r2_nfvm
360vle16_v    ... 000 . 00000 ..... 101 ..... 0000111 @r2_nfvm
361vle32_v    ... 000 . 00000 ..... 110 ..... 0000111 @r2_nfvm
362vle64_v    ... 000 . 00000 ..... 111 ..... 0000111 @r2_nfvm
363vse8_v     ... 000 . 00000 ..... 000 ..... 0100111 @r2_nfvm
364vse16_v    ... 000 . 00000 ..... 101 ..... 0100111 @r2_nfvm
365vse32_v    ... 000 . 00000 ..... 110 ..... 0100111 @r2_nfvm
366vse64_v    ... 000 . 00000 ..... 111 ..... 0100111 @r2_nfvm
367
368# Vector unit-stride mask load/store insns.
369vlm_v      000 000 1 01011 ..... 000 ..... 0000111 @r2
370vsm_v      000 000 1 01011 ..... 000 ..... 0100111 @r2
371
372# Vector strided insns.
373vlse8_v     ... 010 . ..... ..... 000 ..... 0000111 @r_nfvm
374vlse16_v    ... 010 . ..... ..... 101 ..... 0000111 @r_nfvm
375vlse32_v    ... 010 . ..... ..... 110 ..... 0000111 @r_nfvm
376vlse64_v    ... 010 . ..... ..... 111 ..... 0000111 @r_nfvm
377vsse8_v     ... 010 . ..... ..... 000 ..... 0100111 @r_nfvm
378vsse16_v    ... 010 . ..... ..... 101 ..... 0100111 @r_nfvm
379vsse32_v    ... 010 . ..... ..... 110 ..... 0100111 @r_nfvm
380vsse64_v    ... 010 . ..... ..... 111 ..... 0100111 @r_nfvm
381
382# Vector ordered-indexed and unordered-indexed load insns.
383vlxei8_v      ... 0-1 . ..... ..... 000 ..... 0000111 @r_nfvm
384vlxei16_v     ... 0-1 . ..... ..... 101 ..... 0000111 @r_nfvm
385vlxei32_v     ... 0-1 . ..... ..... 110 ..... 0000111 @r_nfvm
386vlxei64_v     ... 0-1 . ..... ..... 111 ..... 0000111 @r_nfvm
387
388# Vector ordered-indexed and unordered-indexed store insns.
389vsxei8_v      ... 0-1 . ..... ..... 000 ..... 0100111 @r_nfvm
390vsxei16_v     ... 0-1 . ..... ..... 101 ..... 0100111 @r_nfvm
391vsxei32_v     ... 0-1 . ..... ..... 110 ..... 0100111 @r_nfvm
392vsxei64_v     ... 0-1 . ..... ..... 111 ..... 0100111 @r_nfvm
393
394# Vector unit-stride fault-only-first load insns.
395vle8ff_v      ... 000 . 10000 ..... 000 ..... 0000111 @r2_nfvm
396vle16ff_v     ... 000 . 10000 ..... 101 ..... 0000111 @r2_nfvm
397vle32ff_v     ... 000 . 10000 ..... 110 ..... 0000111 @r2_nfvm
398vle64ff_v     ... 000 . 10000 ..... 111 ..... 0000111 @r2_nfvm
399
400# Vector whole register insns
401vl1re8_v      000 000 1 01000 ..... 000 ..... 0000111 @r2
402vl1re16_v     000 000 1 01000 ..... 101 ..... 0000111 @r2
403vl1re32_v     000 000 1 01000 ..... 110 ..... 0000111 @r2
404vl1re64_v     000 000 1 01000 ..... 111 ..... 0000111 @r2
405vl2re8_v      001 000 1 01000 ..... 000 ..... 0000111 @r2
406vl2re16_v     001 000 1 01000 ..... 101 ..... 0000111 @r2
407vl2re32_v     001 000 1 01000 ..... 110 ..... 0000111 @r2
408vl2re64_v     001 000 1 01000 ..... 111 ..... 0000111 @r2
409vl4re8_v      011 000 1 01000 ..... 000 ..... 0000111 @r2
410vl4re16_v     011 000 1 01000 ..... 101 ..... 0000111 @r2
411vl4re32_v     011 000 1 01000 ..... 110 ..... 0000111 @r2
412vl4re64_v     011 000 1 01000 ..... 111 ..... 0000111 @r2
413vl8re8_v      111 000 1 01000 ..... 000 ..... 0000111 @r2
414vl8re16_v     111 000 1 01000 ..... 101 ..... 0000111 @r2
415vl8re32_v     111 000 1 01000 ..... 110 ..... 0000111 @r2
416vl8re64_v     111 000 1 01000 ..... 111 ..... 0000111 @r2
417vs1r_v        000 000 1 01000 ..... 000 ..... 0100111 @r2
418vs2r_v        001 000 1 01000 ..... 000 ..... 0100111 @r2
419vs4r_v        011 000 1 01000 ..... 000 ..... 0100111 @r2
420vs8r_v        111 000 1 01000 ..... 000 ..... 0100111 @r2
421
422# *** new major opcode OP-V ***
423vadd_vv         000000 . ..... ..... 000 ..... 1010111 @r_vm
424vadd_vx         000000 . ..... ..... 100 ..... 1010111 @r_vm
425vadd_vi         000000 . ..... ..... 011 ..... 1010111 @r_vm
426vsub_vv         000010 . ..... ..... 000 ..... 1010111 @r_vm
427vsub_vx         000010 . ..... ..... 100 ..... 1010111 @r_vm
428vrsub_vx        000011 . ..... ..... 100 ..... 1010111 @r_vm
429vrsub_vi        000011 . ..... ..... 011 ..... 1010111 @r_vm
430vwaddu_vv       110000 . ..... ..... 010 ..... 1010111 @r_vm
431vwaddu_vx       110000 . ..... ..... 110 ..... 1010111 @r_vm
432vwadd_vv        110001 . ..... ..... 010 ..... 1010111 @r_vm
433vwadd_vx        110001 . ..... ..... 110 ..... 1010111 @r_vm
434vwsubu_vv       110010 . ..... ..... 010 ..... 1010111 @r_vm
435vwsubu_vx       110010 . ..... ..... 110 ..... 1010111 @r_vm
436vwsub_vv        110011 . ..... ..... 010 ..... 1010111 @r_vm
437vwsub_vx        110011 . ..... ..... 110 ..... 1010111 @r_vm
438vwaddu_wv       110100 . ..... ..... 010 ..... 1010111 @r_vm
439vwaddu_wx       110100 . ..... ..... 110 ..... 1010111 @r_vm
440vwadd_wv        110101 . ..... ..... 010 ..... 1010111 @r_vm
441vwadd_wx        110101 . ..... ..... 110 ..... 1010111 @r_vm
442vwsubu_wv       110110 . ..... ..... 010 ..... 1010111 @r_vm
443vwsubu_wx       110110 . ..... ..... 110 ..... 1010111 @r_vm
444vwsub_wv        110111 . ..... ..... 010 ..... 1010111 @r_vm
445vwsub_wx        110111 . ..... ..... 110 ..... 1010111 @r_vm
446vadc_vvm        010000 0 ..... ..... 000 ..... 1010111 @r_vm_1
447vadc_vxm        010000 0 ..... ..... 100 ..... 1010111 @r_vm_1
448vadc_vim        010000 0 ..... ..... 011 ..... 1010111 @r_vm_1
449vmadc_vvm       010001 . ..... ..... 000 ..... 1010111 @r_vm
450vmadc_vxm       010001 . ..... ..... 100 ..... 1010111 @r_vm
451vmadc_vim       010001 . ..... ..... 011 ..... 1010111 @r_vm
452vsbc_vvm        010010 0 ..... ..... 000 ..... 1010111 @r_vm_1
453vsbc_vxm        010010 0 ..... ..... 100 ..... 1010111 @r_vm_1
454vmsbc_vvm       010011 . ..... ..... 000 ..... 1010111 @r_vm
455vmsbc_vxm       010011 . ..... ..... 100 ..... 1010111 @r_vm
456vand_vv         001001 . ..... ..... 000 ..... 1010111 @r_vm
457vand_vx         001001 . ..... ..... 100 ..... 1010111 @r_vm
458vand_vi         001001 . ..... ..... 011 ..... 1010111 @r_vm
459vor_vv          001010 . ..... ..... 000 ..... 1010111 @r_vm
460vor_vx          001010 . ..... ..... 100 ..... 1010111 @r_vm
461vor_vi          001010 . ..... ..... 011 ..... 1010111 @r_vm
462vxor_vv         001011 . ..... ..... 000 ..... 1010111 @r_vm
463vxor_vx         001011 . ..... ..... 100 ..... 1010111 @r_vm
464vxor_vi         001011 . ..... ..... 011 ..... 1010111 @r_vm
465vsll_vv         100101 . ..... ..... 000 ..... 1010111 @r_vm
466vsll_vx         100101 . ..... ..... 100 ..... 1010111 @r_vm
467vsll_vi         100101 . ..... ..... 011 ..... 1010111 @r_vm
468vsrl_vv         101000 . ..... ..... 000 ..... 1010111 @r_vm
469vsrl_vx         101000 . ..... ..... 100 ..... 1010111 @r_vm
470vsrl_vi         101000 . ..... ..... 011 ..... 1010111 @r_vm
471vsra_vv         101001 . ..... ..... 000 ..... 1010111 @r_vm
472vsra_vx         101001 . ..... ..... 100 ..... 1010111 @r_vm
473vsra_vi         101001 . ..... ..... 011 ..... 1010111 @r_vm
474vnsrl_wv        101100 . ..... ..... 000 ..... 1010111 @r_vm
475vnsrl_wx        101100 . ..... ..... 100 ..... 1010111 @r_vm
476vnsrl_wi        101100 . ..... ..... 011 ..... 1010111 @r_vm
477vnsra_wv        101101 . ..... ..... 000 ..... 1010111 @r_vm
478vnsra_wx        101101 . ..... ..... 100 ..... 1010111 @r_vm
479vnsra_wi        101101 . ..... ..... 011 ..... 1010111 @r_vm
480vmseq_vv        011000 . ..... ..... 000 ..... 1010111 @r_vm
481vmseq_vx        011000 . ..... ..... 100 ..... 1010111 @r_vm
482vmseq_vi        011000 . ..... ..... 011 ..... 1010111 @r_vm
483vmsne_vv        011001 . ..... ..... 000 ..... 1010111 @r_vm
484vmsne_vx        011001 . ..... ..... 100 ..... 1010111 @r_vm
485vmsne_vi        011001 . ..... ..... 011 ..... 1010111 @r_vm
486vmsltu_vv       011010 . ..... ..... 000 ..... 1010111 @r_vm
487vmsltu_vx       011010 . ..... ..... 100 ..... 1010111 @r_vm
488vmslt_vv        011011 . ..... ..... 000 ..... 1010111 @r_vm
489vmslt_vx        011011 . ..... ..... 100 ..... 1010111 @r_vm
490vmsleu_vv       011100 . ..... ..... 000 ..... 1010111 @r_vm
491vmsleu_vx       011100 . ..... ..... 100 ..... 1010111 @r_vm
492vmsleu_vi       011100 . ..... ..... 011 ..... 1010111 @r_vm
493vmsle_vv        011101 . ..... ..... 000 ..... 1010111 @r_vm
494vmsle_vx        011101 . ..... ..... 100 ..... 1010111 @r_vm
495vmsle_vi        011101 . ..... ..... 011 ..... 1010111 @r_vm
496vmsgtu_vx       011110 . ..... ..... 100 ..... 1010111 @r_vm
497vmsgtu_vi       011110 . ..... ..... 011 ..... 1010111 @r_vm
498vmsgt_vx        011111 . ..... ..... 100 ..... 1010111 @r_vm
499vmsgt_vi        011111 . ..... ..... 011 ..... 1010111 @r_vm
500vminu_vv        000100 . ..... ..... 000 ..... 1010111 @r_vm
501vminu_vx        000100 . ..... ..... 100 ..... 1010111 @r_vm
502vmin_vv         000101 . ..... ..... 000 ..... 1010111 @r_vm
503vmin_vx         000101 . ..... ..... 100 ..... 1010111 @r_vm
504vmaxu_vv        000110 . ..... ..... 000 ..... 1010111 @r_vm
505vmaxu_vx        000110 . ..... ..... 100 ..... 1010111 @r_vm
506vmax_vv         000111 . ..... ..... 000 ..... 1010111 @r_vm
507vmax_vx         000111 . ..... ..... 100 ..... 1010111 @r_vm
508vmul_vv         100101 . ..... ..... 010 ..... 1010111 @r_vm
509vmul_vx         100101 . ..... ..... 110 ..... 1010111 @r_vm
510vmulh_vv        100111 . ..... ..... 010 ..... 1010111 @r_vm
511vmulh_vx        100111 . ..... ..... 110 ..... 1010111 @r_vm
512vmulhu_vv       100100 . ..... ..... 010 ..... 1010111 @r_vm
513vmulhu_vx       100100 . ..... ..... 110 ..... 1010111 @r_vm
514vmulhsu_vv      100110 . ..... ..... 010 ..... 1010111 @r_vm
515vmulhsu_vx      100110 . ..... ..... 110 ..... 1010111 @r_vm
516vdivu_vv        100000 . ..... ..... 010 ..... 1010111 @r_vm
517vdivu_vx        100000 . ..... ..... 110 ..... 1010111 @r_vm
518vdiv_vv         100001 . ..... ..... 010 ..... 1010111 @r_vm
519vdiv_vx         100001 . ..... ..... 110 ..... 1010111 @r_vm
520vremu_vv        100010 . ..... ..... 010 ..... 1010111 @r_vm
521vremu_vx        100010 . ..... ..... 110 ..... 1010111 @r_vm
522vrem_vv         100011 . ..... ..... 010 ..... 1010111 @r_vm
523vrem_vx         100011 . ..... ..... 110 ..... 1010111 @r_vm
524vwmulu_vv       111000 . ..... ..... 010 ..... 1010111 @r_vm
525vwmulu_vx       111000 . ..... ..... 110 ..... 1010111 @r_vm
526vwmulsu_vv      111010 . ..... ..... 010 ..... 1010111 @r_vm
527vwmulsu_vx      111010 . ..... ..... 110 ..... 1010111 @r_vm
528vwmul_vv        111011 . ..... ..... 010 ..... 1010111 @r_vm
529vwmul_vx        111011 . ..... ..... 110 ..... 1010111 @r_vm
530vmacc_vv        101101 . ..... ..... 010 ..... 1010111 @r_vm
531vmacc_vx        101101 . ..... ..... 110 ..... 1010111 @r_vm
532vnmsac_vv       101111 . ..... ..... 010 ..... 1010111 @r_vm
533vnmsac_vx       101111 . ..... ..... 110 ..... 1010111 @r_vm
534vmadd_vv        101001 . ..... ..... 010 ..... 1010111 @r_vm
535vmadd_vx        101001 . ..... ..... 110 ..... 1010111 @r_vm
536vnmsub_vv       101011 . ..... ..... 010 ..... 1010111 @r_vm
537vnmsub_vx       101011 . ..... ..... 110 ..... 1010111 @r_vm
538vwmaccu_vv      111100 . ..... ..... 010 ..... 1010111 @r_vm
539vwmaccu_vx      111100 . ..... ..... 110 ..... 1010111 @r_vm
540vwmacc_vv       111101 . ..... ..... 010 ..... 1010111 @r_vm
541vwmacc_vx       111101 . ..... ..... 110 ..... 1010111 @r_vm
542vwmaccsu_vv     111111 . ..... ..... 010 ..... 1010111 @r_vm
543vwmaccsu_vx     111111 . ..... ..... 110 ..... 1010111 @r_vm
544vwmaccus_vx     111110 . ..... ..... 110 ..... 1010111 @r_vm
545vmv_v_v         010111 1 00000 ..... 000 ..... 1010111 @r2
546vmv_v_x         010111 1 00000 ..... 100 ..... 1010111 @r2
547vmv_v_i         010111 1 00000 ..... 011 ..... 1010111 @r2
548vmerge_vvm      010111 0 ..... ..... 000 ..... 1010111 @r_vm_0
549vmerge_vxm      010111 0 ..... ..... 100 ..... 1010111 @r_vm_0
550vmerge_vim      010111 0 ..... ..... 011 ..... 1010111 @r_vm_0
551vsaddu_vv       100000 . ..... ..... 000 ..... 1010111 @r_vm
552vsaddu_vx       100000 . ..... ..... 100 ..... 1010111 @r_vm
553vsaddu_vi       100000 . ..... ..... 011 ..... 1010111 @r_vm
554vsadd_vv        100001 . ..... ..... 000 ..... 1010111 @r_vm
555vsadd_vx        100001 . ..... ..... 100 ..... 1010111 @r_vm
556vsadd_vi        100001 . ..... ..... 011 ..... 1010111 @r_vm
557vssubu_vv       100010 . ..... ..... 000 ..... 1010111 @r_vm
558vssubu_vx       100010 . ..... ..... 100 ..... 1010111 @r_vm
559vssub_vv        100011 . ..... ..... 000 ..... 1010111 @r_vm
560vssub_vx        100011 . ..... ..... 100 ..... 1010111 @r_vm
561vaadd_vv        001001 . ..... ..... 010 ..... 1010111 @r_vm
562vaadd_vx        001001 . ..... ..... 110 ..... 1010111 @r_vm
563vaaddu_vv       001000 . ..... ..... 010 ..... 1010111 @r_vm
564vaaddu_vx       001000 . ..... ..... 110 ..... 1010111 @r_vm
565vasub_vv        001011 . ..... ..... 010 ..... 1010111 @r_vm
566vasub_vx        001011 . ..... ..... 110 ..... 1010111 @r_vm
567vasubu_vv       001010 . ..... ..... 010 ..... 1010111 @r_vm
568vasubu_vx       001010 . ..... ..... 110 ..... 1010111 @r_vm
569vsmul_vv        100111 . ..... ..... 000 ..... 1010111 @r_vm
570vsmul_vx        100111 . ..... ..... 100 ..... 1010111 @r_vm
571vssrl_vv        101010 . ..... ..... 000 ..... 1010111 @r_vm
572vssrl_vx        101010 . ..... ..... 100 ..... 1010111 @r_vm
573vssrl_vi        101010 . ..... ..... 011 ..... 1010111 @r_vm
574vssra_vv        101011 . ..... ..... 000 ..... 1010111 @r_vm
575vssra_vx        101011 . ..... ..... 100 ..... 1010111 @r_vm
576vssra_vi        101011 . ..... ..... 011 ..... 1010111 @r_vm
577vnclipu_wv      101110 . ..... ..... 000 ..... 1010111 @r_vm
578vnclipu_wx      101110 . ..... ..... 100 ..... 1010111 @r_vm
579vnclipu_wi      101110 . ..... ..... 011 ..... 1010111 @r_vm
580vnclip_wv       101111 . ..... ..... 000 ..... 1010111 @r_vm
581vnclip_wx       101111 . ..... ..... 100 ..... 1010111 @r_vm
582vnclip_wi       101111 . ..... ..... 011 ..... 1010111 @r_vm
583vfadd_vv        000000 . ..... ..... 001 ..... 1010111 @r_vm
584vfadd_vf        000000 . ..... ..... 101 ..... 1010111 @r_vm
585vfsub_vv        000010 . ..... ..... 001 ..... 1010111 @r_vm
586vfsub_vf        000010 . ..... ..... 101 ..... 1010111 @r_vm
587vfrsub_vf       100111 . ..... ..... 101 ..... 1010111 @r_vm
588vfwadd_vv       110000 . ..... ..... 001 ..... 1010111 @r_vm
589vfwadd_vf       110000 . ..... ..... 101 ..... 1010111 @r_vm
590vfwadd_wv       110100 . ..... ..... 001 ..... 1010111 @r_vm
591vfwadd_wf       110100 . ..... ..... 101 ..... 1010111 @r_vm
592vfwsub_vv       110010 . ..... ..... 001 ..... 1010111 @r_vm
593vfwsub_vf       110010 . ..... ..... 101 ..... 1010111 @r_vm
594vfwsub_wv       110110 . ..... ..... 001 ..... 1010111 @r_vm
595vfwsub_wf       110110 . ..... ..... 101 ..... 1010111 @r_vm
596vfmul_vv        100100 . ..... ..... 001 ..... 1010111 @r_vm
597vfmul_vf        100100 . ..... ..... 101 ..... 1010111 @r_vm
598vfdiv_vv        100000 . ..... ..... 001 ..... 1010111 @r_vm
599vfdiv_vf        100000 . ..... ..... 101 ..... 1010111 @r_vm
600vfrdiv_vf       100001 . ..... ..... 101 ..... 1010111 @r_vm
601vfwmul_vv       111000 . ..... ..... 001 ..... 1010111 @r_vm
602vfwmul_vf       111000 . ..... ..... 101 ..... 1010111 @r_vm
603vfmacc_vv       101100 . ..... ..... 001 ..... 1010111 @r_vm
604vfnmacc_vv      101101 . ..... ..... 001 ..... 1010111 @r_vm
605vfnmacc_vf      101101 . ..... ..... 101 ..... 1010111 @r_vm
606vfmacc_vf       101100 . ..... ..... 101 ..... 1010111 @r_vm
607vfmsac_vv       101110 . ..... ..... 001 ..... 1010111 @r_vm
608vfmsac_vf       101110 . ..... ..... 101 ..... 1010111 @r_vm
609vfnmsac_vv      101111 . ..... ..... 001 ..... 1010111 @r_vm
610vfnmsac_vf      101111 . ..... ..... 101 ..... 1010111 @r_vm
611vfmadd_vv       101000 . ..... ..... 001 ..... 1010111 @r_vm
612vfmadd_vf       101000 . ..... ..... 101 ..... 1010111 @r_vm
613vfnmadd_vv      101001 . ..... ..... 001 ..... 1010111 @r_vm
614vfnmadd_vf      101001 . ..... ..... 101 ..... 1010111 @r_vm
615vfmsub_vv       101010 . ..... ..... 001 ..... 1010111 @r_vm
616vfmsub_vf       101010 . ..... ..... 101 ..... 1010111 @r_vm
617vfnmsub_vv      101011 . ..... ..... 001 ..... 1010111 @r_vm
618vfnmsub_vf      101011 . ..... ..... 101 ..... 1010111 @r_vm
619vfwmacc_vv      111100 . ..... ..... 001 ..... 1010111 @r_vm
620vfwmacc_vf      111100 . ..... ..... 101 ..... 1010111 @r_vm
621vfwnmacc_vv     111101 . ..... ..... 001 ..... 1010111 @r_vm
622vfwnmacc_vf     111101 . ..... ..... 101 ..... 1010111 @r_vm
623vfwmsac_vv      111110 . ..... ..... 001 ..... 1010111 @r_vm
624vfwmsac_vf      111110 . ..... ..... 101 ..... 1010111 @r_vm
625vfwnmsac_vv     111111 . ..... ..... 001 ..... 1010111 @r_vm
626vfwnmsac_vf     111111 . ..... ..... 101 ..... 1010111 @r_vm
627vfsqrt_v        010011 . ..... 00000 001 ..... 1010111 @r2_vm
628vfrsqrt7_v      010011 . ..... 00100 001 ..... 1010111 @r2_vm
629vfrec7_v        010011 . ..... 00101 001 ..... 1010111 @r2_vm
630vfmin_vv        000100 . ..... ..... 001 ..... 1010111 @r_vm
631vfmin_vf        000100 . ..... ..... 101 ..... 1010111 @r_vm
632vfmax_vv        000110 . ..... ..... 001 ..... 1010111 @r_vm
633vfmax_vf        000110 . ..... ..... 101 ..... 1010111 @r_vm
634vfsgnj_vv       001000 . ..... ..... 001 ..... 1010111 @r_vm
635vfsgnj_vf       001000 . ..... ..... 101 ..... 1010111 @r_vm
636vfsgnjn_vv      001001 . ..... ..... 001 ..... 1010111 @r_vm
637vfsgnjn_vf      001001 . ..... ..... 101 ..... 1010111 @r_vm
638vfsgnjx_vv      001010 . ..... ..... 001 ..... 1010111 @r_vm
639vfsgnjx_vf      001010 . ..... ..... 101 ..... 1010111 @r_vm
640vfslide1up_vf   001110 . ..... ..... 101 ..... 1010111 @r_vm
641vfslide1down_vf 001111 . ..... ..... 101 ..... 1010111 @r_vm
642vmfeq_vv        011000 . ..... ..... 001 ..... 1010111 @r_vm
643vmfeq_vf        011000 . ..... ..... 101 ..... 1010111 @r_vm
644vmfne_vv        011100 . ..... ..... 001 ..... 1010111 @r_vm
645vmfne_vf        011100 . ..... ..... 101 ..... 1010111 @r_vm
646vmflt_vv        011011 . ..... ..... 001 ..... 1010111 @r_vm
647vmflt_vf        011011 . ..... ..... 101 ..... 1010111 @r_vm
648vmfle_vv        011001 . ..... ..... 001 ..... 1010111 @r_vm
649vmfle_vf        011001 . ..... ..... 101 ..... 1010111 @r_vm
650vmfgt_vf        011101 . ..... ..... 101 ..... 1010111 @r_vm
651vmfge_vf        011111 . ..... ..... 101 ..... 1010111 @r_vm
652vfclass_v       010011 . ..... 10000 001 ..... 1010111 @r2_vm
653vfmerge_vfm     010111 0 ..... ..... 101 ..... 1010111 @r_vm_0
654vfmv_v_f        010111 1 00000 ..... 101 ..... 1010111 @r2
655
656vfcvt_xu_f_v       010010 . ..... 00000 001 ..... 1010111 @r2_vm
657vfcvt_x_f_v        010010 . ..... 00001 001 ..... 1010111 @r2_vm
658vfcvt_f_xu_v       010010 . ..... 00010 001 ..... 1010111 @r2_vm
659vfcvt_f_x_v        010010 . ..... 00011 001 ..... 1010111 @r2_vm
660vfcvt_rtz_xu_f_v   010010 . ..... 00110 001 ..... 1010111 @r2_vm
661vfcvt_rtz_x_f_v    010010 . ..... 00111 001 ..... 1010111 @r2_vm
662
663vfwcvt_xu_f_v      010010 . ..... 01000 001 ..... 1010111 @r2_vm
664vfwcvt_x_f_v       010010 . ..... 01001 001 ..... 1010111 @r2_vm
665vfwcvt_f_xu_v      010010 . ..... 01010 001 ..... 1010111 @r2_vm
666vfwcvt_f_x_v       010010 . ..... 01011 001 ..... 1010111 @r2_vm
667vfwcvt_f_f_v       010010 . ..... 01100 001 ..... 1010111 @r2_vm
668vfwcvt_rtz_xu_f_v  010010 . ..... 01110 001 ..... 1010111 @r2_vm
669vfwcvt_rtz_x_f_v   010010 . ..... 01111 001 ..... 1010111 @r2_vm
670
671vfncvt_xu_f_w      010010 . ..... 10000 001 ..... 1010111 @r2_vm
672vfncvt_x_f_w       010010 . ..... 10001 001 ..... 1010111 @r2_vm
673vfncvt_f_xu_w      010010 . ..... 10010 001 ..... 1010111 @r2_vm
674vfncvt_f_x_w       010010 . ..... 10011 001 ..... 1010111 @r2_vm
675vfncvt_f_f_w       010010 . ..... 10100 001 ..... 1010111 @r2_vm
676vfncvt_rod_f_f_w   010010 . ..... 10101 001 ..... 1010111 @r2_vm
677vfncvt_rtz_xu_f_w  010010 . ..... 10110 001 ..... 1010111 @r2_vm
678vfncvt_rtz_x_f_w   010010 . ..... 10111 001 ..... 1010111 @r2_vm
679
680vredsum_vs      000000 . ..... ..... 010 ..... 1010111 @r_vm
681vredand_vs      000001 . ..... ..... 010 ..... 1010111 @r_vm
682vredor_vs       000010 . ..... ..... 010 ..... 1010111 @r_vm
683vredxor_vs      000011 . ..... ..... 010 ..... 1010111 @r_vm
684vredminu_vs     000100 . ..... ..... 010 ..... 1010111 @r_vm
685vredmin_vs      000101 . ..... ..... 010 ..... 1010111 @r_vm
686vredmaxu_vs     000110 . ..... ..... 010 ..... 1010111 @r_vm
687vredmax_vs      000111 . ..... ..... 010 ..... 1010111 @r_vm
688vwredsumu_vs    110000 . ..... ..... 000 ..... 1010111 @r_vm
689vwredsum_vs     110001 . ..... ..... 000 ..... 1010111 @r_vm
690# Vector ordered and unordered reduction sum
691vfredusum_vs    000001 . ..... ..... 001 ..... 1010111 @r_vm
692vfredosum_vs    000011 . ..... ..... 001 ..... 1010111 @r_vm
693vfredmin_vs     000101 . ..... ..... 001 ..... 1010111 @r_vm
694vfredmax_vs     000111 . ..... ..... 001 ..... 1010111 @r_vm
695# Vector widening ordered and unordered float reduction sum
696vfwredusum_vs   110001 . ..... ..... 001 ..... 1010111 @r_vm
697vfwredosum_vs   110011 . ..... ..... 001 ..... 1010111 @r_vm
698vmand_mm        011001 - ..... ..... 010 ..... 1010111 @r
699vmnand_mm       011101 - ..... ..... 010 ..... 1010111 @r
700vmandn_mm       011000 - ..... ..... 010 ..... 1010111 @r
701vmxor_mm        011011 - ..... ..... 010 ..... 1010111 @r
702vmor_mm         011010 - ..... ..... 010 ..... 1010111 @r
703vmnor_mm        011110 - ..... ..... 010 ..... 1010111 @r
704vmorn_mm        011100 - ..... ..... 010 ..... 1010111 @r
705vmxnor_mm       011111 - ..... ..... 010 ..... 1010111 @r
706vcpop_m         010000 . ..... 10000 010 ..... 1010111 @r2_vm
707vfirst_m        010000 . ..... 10001 010 ..... 1010111 @r2_vm
708vmsbf_m         010100 . ..... 00001 010 ..... 1010111 @r2_vm
709vmsif_m         010100 . ..... 00011 010 ..... 1010111 @r2_vm
710vmsof_m         010100 . ..... 00010 010 ..... 1010111 @r2_vm
711viota_m         010100 . ..... 10000 010 ..... 1010111 @r2_vm
712vid_v           010100 . 00000 10001 010 ..... 1010111 @r1_vm
713vmv_x_s         010000 1 ..... 00000 010 ..... 1010111 @r2rd
714vmv_s_x         010000 1 00000 ..... 110 ..... 1010111 @r2
715vfmv_f_s        010000 1 ..... 00000 001 ..... 1010111 @r2rd
716vfmv_s_f        010000 1 00000 ..... 101 ..... 1010111 @r2
717vslideup_vx     001110 . ..... ..... 100 ..... 1010111 @r_vm
718vslideup_vi     001110 . ..... ..... 011 ..... 1010111 @r_vm
719vslide1up_vx    001110 . ..... ..... 110 ..... 1010111 @r_vm
720vslidedown_vx   001111 . ..... ..... 100 ..... 1010111 @r_vm
721vslidedown_vi   001111 . ..... ..... 011 ..... 1010111 @r_vm
722vslide1down_vx  001111 . ..... ..... 110 ..... 1010111 @r_vm
723vrgather_vv     001100 . ..... ..... 000 ..... 1010111 @r_vm
724vrgatherei16_vv 001110 . ..... ..... 000 ..... 1010111 @r_vm
725vrgather_vx     001100 . ..... ..... 100 ..... 1010111 @r_vm
726vrgather_vi     001100 . ..... ..... 011 ..... 1010111 @r_vm
727vcompress_vm    010111 - ..... ..... 010 ..... 1010111 @r
728vmv1r_v         100111 1 ..... 00000 011 ..... 1010111 @r2rd
729vmv2r_v         100111 1 ..... 00001 011 ..... 1010111 @r2rd
730vmv4r_v         100111 1 ..... 00011 011 ..... 1010111 @r2rd
731vmv8r_v         100111 1 ..... 00111 011 ..... 1010111 @r2rd
732
733# Vector Integer Extension
734vzext_vf2       010010 . ..... 00110 010 ..... 1010111 @r2_vm
735vzext_vf4       010010 . ..... 00100 010 ..... 1010111 @r2_vm
736vzext_vf8       010010 . ..... 00010 010 ..... 1010111 @r2_vm
737vsext_vf2       010010 . ..... 00111 010 ..... 1010111 @r2_vm
738vsext_vf4       010010 . ..... 00101 010 ..... 1010111 @r2_vm
739vsext_vf8       010010 . ..... 00011 010 ..... 1010111 @r2_vm
740
741vsetvli         0 ........... ..... 111 ..... 1010111  @r2_zimm11
742vsetivli        11 .......... ..... 111 ..... 1010111  @r2_zimm10
743vsetvl          1000000 ..... ..... 111 ..... 1010111  @r
744
745# *** Zawrs Standard Extension ***
746wrs_nto    000000001101 00000 000 00000 1110011
747wrs_sto    000000011101 00000 000 00000 1110011
748
749# *** RV32 Zba Standard Extension ***
750sh1add     0010000 .......... 010 ..... 0110011 @r
751sh2add     0010000 .......... 100 ..... 0110011 @r
752sh3add     0010000 .......... 110 ..... 0110011 @r
753
754# *** RV64 Zba Standard Extension (in addition to RV32 Zba) ***
755add_uw     0000100 .......... 000 ..... 0111011 @r
756sh1add_uw  0010000 .......... 010 ..... 0111011 @r
757sh2add_uw  0010000 .......... 100 ..... 0111011 @r
758sh3add_uw  0010000 .......... 110 ..... 0111011 @r
759slli_uw    00001 ............ 001 ..... 0011011 @sh
760
761# *** RV32 Zbb/Zbkb Standard Extension ***
762andn       0100000 .......... 111 ..... 0110011 @r
763rol        0110000 .......... 001 ..... 0110011 @r
764ror        0110000 .......... 101 ..... 0110011 @r
765rori       01100 ............ 101 ..... 0010011 @sh
766# The encoding for rev8 differs between RV32 and RV64.
767# rev8_32 denotes the RV32 variant.
768rev8_32    011010 011000 ..... 101 ..... 0010011 @r2
769# The encoding for zext.h differs between RV32 and RV64.
770# zext_h_32 denotes the RV32 variant.
771{
772  zext_h_32  0000100 00000 ..... 100 ..... 0110011 @r2
773  pack       0000100 ..... ..... 100 ..... 0110011 @r
774}
775xnor       0100000 .......... 100 ..... 0110011 @r
776# *** RV32 extra Zbb Standard Extension ***
777clz        011000 000000 ..... 001 ..... 0010011 @r2
778cpop       011000 000010 ..... 001 ..... 0010011 @r2
779ctz        011000 000001 ..... 001 ..... 0010011 @r2
780max        0000101 .......... 110 ..... 0110011 @r
781maxu       0000101 .......... 111 ..... 0110011 @r
782min        0000101 .......... 100 ..... 0110011 @r
783minu       0000101 .......... 101 ..... 0110011 @r
784orc_b      001010 000111 ..... 101 ..... 0010011 @r2
785orn        0100000 .......... 110 ..... 0110011 @r
786sext_b     011000 000100 ..... 001 ..... 0010011 @r2
787sext_h     011000 000101 ..... 001 ..... 0010011 @r2
788# *** RV32 extra Zbkb Standard Extension ***
789brev8      0110100 00111 ..... 101 ..... 0010011 @r2  #grevi
790packh      0000100  .......... 111 ..... 0110011 @r
791unzip      0000100 01111 ..... 101 ..... 0010011 @r2  #unshfl
792zip        0000100 01111 ..... 001 ..... 0010011 @r2  #shfl
793
794# *** RV64 Zbb/Zbkb Standard Extension (in addition to RV32 Zbb/Zbkb) ***
795# The encoding for rev8 differs between RV32 and RV64.
796# When executing on RV64, the encoding used in RV32 is an illegal
797# instruction, so we use different handler functions to differentiate.
798rev8_64    011010 111000 ..... 101 ..... 0010011 @r2
799rolw       0110000 .......... 001 ..... 0111011 @r
800roriw      0110000 .......... 101 ..... 0011011 @sh5
801rorw       0110000 .......... 101 ..... 0111011 @r
802# The encoding for zext.h differs between RV32 and RV64.
803# When executing on RV64, the encoding used in RV32 is an illegal
804# instruction, so we use different handler functions to differentiate.
805{
806  zext_h_64  0000100 00000 ..... 100 ..... 0111011 @r2
807  packw      0000100 ..... ..... 100 ..... 0111011 @r
808}
809# *** RV64 extra Zbb Standard Extension (in addition to RV32 Zbb) ***
810clzw       0110000 00000 ..... 001 ..... 0011011 @r2
811ctzw       0110000 00001 ..... 001 ..... 0011011 @r2
812cpopw      0110000 00010 ..... 001 ..... 0011011 @r2
813
814# *** RV32 Zbc/Zbkc Standard Extension ***
815clmul      0000101 .......... 001 ..... 0110011 @r
816clmulh     0000101 .......... 011 ..... 0110011 @r
817# *** RV32 extra Zbc Standard Extension ***
818clmulr     0000101 .......... 010 ..... 0110011 @r
819
820# *** RV32 Zbkx Standard Extension ***
821xperm4     0010100 .......... 010 ..... 0110011 @r
822xperm8     0010100 .......... 100 ..... 0110011 @r
823
824# *** RV32 Zbs Standard Extension ***
825bclr       0100100 .......... 001 ..... 0110011 @r
826bclri      01001. ........... 001 ..... 0010011 @sh
827bext       0100100 .......... 101 ..... 0110011 @r
828bexti      01001. ........... 101 ..... 0010011 @sh
829binv       0110100 .......... 001 ..... 0110011 @r
830binvi      01101. ........... 001 ..... 0010011 @sh
831bset       0010100 .......... 001 ..... 0110011 @r
832bseti      00101. ........... 001 ..... 0010011 @sh
833
834# *** Zfa Standard Extension ***
835fli_s       1111000 00001 ..... 000 ..... 1010011 @r2
836fli_d       1111001 00001 ..... 000 ..... 1010011 @r2
837fli_h       1111010 00001 ..... 000 ..... 1010011 @r2
838fminm_s     0010100 ..... ..... 010 ..... 1010011 @r
839fmaxm_s     0010100 ..... ..... 011 ..... 1010011 @r
840fminm_d     0010101 ..... ..... 010 ..... 1010011 @r
841fmaxm_d     0010101 ..... ..... 011 ..... 1010011 @r
842fminm_h     0010110 ..... ..... 010 ..... 1010011 @r
843fmaxm_h     0010110 ..... ..... 011 ..... 1010011 @r
844fround_s    0100000 00100 ..... ... ..... 1010011 @r2_rm
845froundnx_s  0100000 00101 ..... ... ..... 1010011 @r2_rm
846fround_d    0100001 00100 ..... ... ..... 1010011 @r2_rm
847froundnx_d  0100001 00101 ..... ... ..... 1010011 @r2_rm
848fround_h    0100010 00100 ..... ... ..... 1010011 @r2_rm
849froundnx_h  0100010 00101 ..... ... ..... 1010011 @r2_rm
850fcvtmod_w_d 1100001 01000 ..... 001 ..... 1010011 @r2
851fmvh_x_d    1110001 00001 ..... 000 ..... 1010011 @r2
852fmvp_d_x    1011001 ..... ..... 000 ..... 1010011 @r
853fleq_s      1010000 ..... ..... 100 ..... 1010011 @r
854fltq_s      1010000 ..... ..... 101 ..... 1010011 @r
855fleq_d      1010001 ..... ..... 100 ..... 1010011 @r
856fltq_d      1010001 ..... ..... 101 ..... 1010011 @r
857fleq_h      1010010 ..... ..... 100 ..... 1010011 @r
858fltq_h      1010010 ..... ..... 101 ..... 1010011 @r
859
860# *** RV32 Zfh Extension ***
861flh        ............   ..... 001 ..... 0000111 @i
862fsh        .......  ..... ..... 001 ..... 0100111 @s
863fmadd_h    ..... 10 ..... ..... ... ..... 1000011 @r4_rm
864fmsub_h    ..... 10 ..... ..... ... ..... 1000111 @r4_rm
865fnmsub_h   ..... 10 ..... ..... ... ..... 1001011 @r4_rm
866fnmadd_h   ..... 10 ..... ..... ... ..... 1001111 @r4_rm
867fadd_h     0000010  ..... ..... ... ..... 1010011 @r_rm
868fsub_h     0000110  ..... ..... ... ..... 1010011 @r_rm
869fmul_h     0001010  ..... ..... ... ..... 1010011 @r_rm
870fdiv_h     0001110  ..... ..... ... ..... 1010011 @r_rm
871fsqrt_h    0101110  00000 ..... ... ..... 1010011 @r2_rm
872fsgnj_h    0010010  ..... ..... 000 ..... 1010011 @r
873fsgnjn_h   0010010  ..... ..... 001 ..... 1010011 @r
874fsgnjx_h   0010010  ..... ..... 010 ..... 1010011 @r
875fmin_h     0010110  ..... ..... 000 ..... 1010011 @r
876fmax_h     0010110  ..... ..... 001 ..... 1010011 @r
877fcvt_h_s   0100010  00000 ..... ... ..... 1010011 @r2_rm
878fcvt_s_h   0100000  00010 ..... ... ..... 1010011 @r2_rm
879fcvt_h_d   0100010  00001 ..... ... ..... 1010011 @r2_rm
880fcvt_d_h   0100001  00010 ..... ... ..... 1010011 @r2_rm
881fcvt_w_h   1100010  00000 ..... ... ..... 1010011 @r2_rm
882fcvt_wu_h  1100010  00001 ..... ... ..... 1010011 @r2_rm
883fmv_x_h    1110010  00000 ..... 000 ..... 1010011 @r2
884feq_h      1010010  ..... ..... 010 ..... 1010011 @r
885flt_h      1010010  ..... ..... 001 ..... 1010011 @r
886fle_h      1010010  ..... ..... 000 ..... 1010011 @r
887fclass_h   1110010  00000 ..... 001 ..... 1010011 @r2
888fcvt_h_w   1101010  00000 ..... ... ..... 1010011 @r2_rm
889fcvt_h_wu  1101010  00001 ..... ... ..... 1010011 @r2_rm
890fmv_h_x    1111010  00000 ..... 000 ..... 1010011 @r2
891
892# *** RV64 Zfh Extension (in addition to RV32 Zfh) ***
893fcvt_l_h   1100010  00010 ..... ... ..... 1010011 @r2_rm
894fcvt_lu_h  1100010  00011 ..... ... ..... 1010011 @r2_rm
895fcvt_h_l   1101010  00010 ..... ... ..... 1010011 @r2_rm
896fcvt_h_lu  1101010  00011 ..... ... ..... 1010011 @r2_rm
897
898# *** Svinval Standard Extension ***
899sinval_vma        0001011 ..... ..... 000 00000 1110011 @sfence_vma
900sfence_w_inval    0001100 00000 00000 000 00000 1110011
901sfence_inval_ir   0001100 00001 00000 000 00000 1110011
902hinval_vvma       0010011 ..... ..... 000 00000 1110011 @hfence_vvma
903hinval_gvma       0110011 ..... ..... 000 00000 1110011 @hfence_gvma
904
905# *** RV32 Zknd Standard Extension ***
906aes32dsmi   .. 10111 ..... ..... 000 ..... 0110011 @k_aes
907aes32dsi    .. 10101 ..... ..... 000 ..... 0110011 @k_aes
908# *** RV64 Zknd Standard Extension ***
909aes64dsm    00 11111 ..... ..... 000 ..... 0110011 @r
910aes64ds     00 11101 ..... ..... 000 ..... 0110011 @r
911aes64im     00 11000 00000 ..... 001 ..... 0010011 @r2
912# *** RV32 Zkne Standard Extension ***
913aes32esmi   .. 10011 ..... ..... 000 ..... 0110011 @k_aes
914aes32esi    .. 10001 ..... ..... 000 ..... 0110011 @k_aes
915# *** RV64 Zkne Standard Extension ***
916aes64es     00 11001 ..... ..... 000 ..... 0110011 @r
917aes64esm    00 11011 ..... ..... 000 ..... 0110011 @r
918# *** RV64 Zkne/zknd Standard Extension ***
919aes64ks2    01 11111 ..... ..... 000 ..... 0110011 @r
920aes64ks1i   00 11000 1.... ..... 001 ..... 0010011 @i_aes
921# *** RV32 Zknh Standard Extension ***
922sha256sig0  00 01000 00010 ..... 001 ..... 0010011 @r2
923sha256sig1  00 01000 00011 ..... 001 ..... 0010011 @r2
924sha256sum0  00 01000 00000 ..... 001 ..... 0010011 @r2
925sha256sum1  00 01000 00001 ..... 001 ..... 0010011 @r2
926sha512sum0r 01 01000 ..... ..... 000 ..... 0110011 @r
927sha512sum1r 01 01001 ..... ..... 000 ..... 0110011 @r
928sha512sig0l 01 01010 ..... ..... 000 ..... 0110011 @r
929sha512sig0h 01 01110 ..... ..... 000 ..... 0110011 @r
930sha512sig1l 01 01011 ..... ..... 000 ..... 0110011 @r
931sha512sig1h 01 01111 ..... ..... 000 ..... 0110011 @r
932# *** RV64 Zknh Standard Extension ***
933sha512sig0  00 01000 00110 ..... 001 ..... 0010011 @r2
934sha512sig1  00 01000 00111 ..... 001 ..... 0010011 @r2
935sha512sum0  00 01000 00100 ..... 001 ..... 0010011 @r2
936sha512sum1  00 01000 00101 ..... 001 ..... 0010011 @r2
937# *** RV32 Zksh Standard Extension ***
938sm3p0       00 01000 01000 ..... 001 ..... 0010011 @r2
939sm3p1       00 01000 01001 ..... 001 ..... 0010011 @r2
940# *** RV32 Zksed Standard Extension ***
941sm4ed       .. 11000 ..... ..... 000 ..... 0110011 @k_aes
942sm4ks       .. 11010 ..... ..... 000 ..... 0110011 @k_aes
943
944# *** RV32 Zicond Standard Extension ***
945czero_eqz   0000111  ..... ..... 101 ..... 0110011 @r
946czero_nez   0000111  ..... ..... 111 ..... 0110011 @r
947
948# *** Zfbfmin Standard Extension ***
949fcvt_bf16_s       0100010  01000 ..... ... ..... 1010011 @r2_rm
950fcvt_s_bf16       0100000  00110 ..... ... ..... 1010011 @r2_rm
951
952# *** Zvfbfmin Standard Extension ***
953vfncvtbf16_f_f_w  010010 . ..... 11101 001 ..... 1010111 @r2_vm
954vfwcvtbf16_f_f_v  010010 . ..... 01101 001 ..... 1010111 @r2_vm
955
956# *** Zvfbfwma Standard Extension ***
957vfwmaccbf16_vv    111011 . ..... ..... 001 ..... 1010111 @r_vm
958vfwmaccbf16_vf    111011 . ..... ..... 101 ..... 1010111 @r_vm
959
960# *** Zvbc vector crypto extension ***
961vclmul_vv   001100 . ..... ..... 010 ..... 1010111 @r_vm
962vclmul_vx   001100 . ..... ..... 110 ..... 1010111 @r_vm
963vclmulh_vv  001101 . ..... ..... 010 ..... 1010111 @r_vm
964vclmulh_vx  001101 . ..... ..... 110 ..... 1010111 @r_vm
965
966# *** Zvbb vector crypto extension ***
967vrol_vv     010101 . ..... ..... 000 ..... 1010111 @r_vm
968vrol_vx     010101 . ..... ..... 100 ..... 1010111 @r_vm
969vror_vv     010100 . ..... ..... 000 ..... 1010111 @r_vm
970vror_vx     010100 . ..... ..... 100 ..... 1010111 @r_vm
971vror_vi     01010. . ..... ..... 011 ..... 1010111 @r2_zimm6
972vbrev8_v    010010 . ..... 01000 010 ..... 1010111 @r2_vm
973vrev8_v     010010 . ..... 01001 010 ..... 1010111 @r2_vm
974vandn_vv    000001 . ..... ..... 000 ..... 1010111 @r_vm
975vandn_vx    000001 . ..... ..... 100 ..... 1010111 @r_vm
976vbrev_v     010010 . ..... 01010 010 ..... 1010111 @r2_vm
977vclz_v      010010 . ..... 01100 010 ..... 1010111 @r2_vm
978vctz_v      010010 . ..... 01101 010 ..... 1010111 @r2_vm
979vcpop_v     010010 . ..... 01110 010 ..... 1010111 @r2_vm
980vwsll_vv    110101 . ..... ..... 000 ..... 1010111 @r_vm
981vwsll_vx    110101 . ..... ..... 100 ..... 1010111 @r_vm
982vwsll_vi    110101 . ..... ..... 011 ..... 1010111 @r_vm
983
984# *** Zvkned vector crypto extension ***
985vaesef_vv   101000 1 ..... 00011 010 ..... 1110111 @r2_vm_1
986vaesef_vs   101001 1 ..... 00011 010 ..... 1110111 @r2_vm_1
987vaesdf_vv   101000 1 ..... 00001 010 ..... 1110111 @r2_vm_1
988vaesdf_vs   101001 1 ..... 00001 010 ..... 1110111 @r2_vm_1
989vaesem_vv   101000 1 ..... 00010 010 ..... 1110111 @r2_vm_1
990vaesem_vs   101001 1 ..... 00010 010 ..... 1110111 @r2_vm_1
991vaesdm_vv   101000 1 ..... 00000 010 ..... 1110111 @r2_vm_1
992vaesdm_vs   101001 1 ..... 00000 010 ..... 1110111 @r2_vm_1
993vaesz_vs    101001 1 ..... 00111 010 ..... 1110111 @r2_vm_1
994vaeskf1_vi  100010 1 ..... ..... 010 ..... 1110111 @r_vm_1
995vaeskf2_vi  101010 1 ..... ..... 010 ..... 1110111 @r_vm_1
996
997# *** Zvknh vector crypto extension ***
998vsha2ms_vv  101101 1 ..... ..... 010 ..... 1110111 @r_vm_1
999vsha2ch_vv  101110 1 ..... ..... 010 ..... 1110111 @r_vm_1
1000vsha2cl_vv  101111 1 ..... ..... 010 ..... 1110111 @r_vm_1
1001
1002# *** Zvksh vector crypto extension ***
1003vsm3me_vv   100000 1 ..... ..... 010 ..... 1110111 @r_vm_1
1004vsm3c_vi    101011 1 ..... ..... 010 ..... 1110111 @r_vm_1
1005
1006# *** Zvkg vector crypto extension ***
1007vghsh_vv    101100 1 ..... ..... 010 ..... 1110111 @r_vm_1
1008vgmul_vv    101000 1 ..... 10001 010 ..... 1110111 @r2_vm_1
1009
1010# *** Zvksed vector crypto extension ***
1011vsm4k_vi    100001 1 ..... ..... 010 ..... 1110111 @r_vm_1
1012vsm4r_vv    101000 1 ..... 10000 010 ..... 1110111 @r2_vm_1
1013vsm4r_vs    101001 1 ..... 10000 010 ..... 1110111 @r2_vm_1
1014
1015# *** RV32 Zacas Standard Extension ***
1016amocas_w    00101 . . ..... ..... 010 ..... 0101111 @atom_st
1017amocas_d    00101 . . ..... ..... 011 ..... 0101111 @atom_st
1018# *** RV64 Zacas Standard Extension ***
1019amocas_q    00101 . . ..... ..... 100 ..... 0101111 @atom_st
1020
1021# *** Zimop may-be-operation extension ***
1022mop_r_n     1 . 00 .. 0111 .. ..... 100 ..... 1110011 @mop5
1023mop_rr_n    1 . 00 .. 1 ..... ..... 100 ..... 1110011 @mop3
1024
1025# *** Zabhb Standard Extension ***
1026amoswap_b  00001 . . ..... ..... 000 ..... 0101111 @atom_st
1027amoadd_b   00000 . . ..... ..... 000 ..... 0101111 @atom_st
1028amoxor_b   00100 . . ..... ..... 000 ..... 0101111 @atom_st
1029amoand_b   01100 . . ..... ..... 000 ..... 0101111 @atom_st
1030amoor_b    01000 . . ..... ..... 000 ..... 0101111 @atom_st
1031amomin_b   10000 . . ..... ..... 000 ..... 0101111 @atom_st
1032amomax_b   10100 . . ..... ..... 000 ..... 0101111 @atom_st
1033amominu_b  11000 . . ..... ..... 000 ..... 0101111 @atom_st
1034amomaxu_b  11100 . . ..... ..... 000 ..... 0101111 @atom_st
1035amoswap_h  00001 . . ..... ..... 001 ..... 0101111 @atom_st
1036amoadd_h   00000 . . ..... ..... 001 ..... 0101111 @atom_st
1037amoxor_h   00100 . . ..... ..... 001 ..... 0101111 @atom_st
1038amoand_h   01100 . . ..... ..... 001 ..... 0101111 @atom_st
1039amoor_h    01000 . . ..... ..... 001 ..... 0101111 @atom_st
1040amomin_h   10000 . . ..... ..... 001 ..... 0101111 @atom_st
1041amomax_h   10100 . . ..... ..... 001 ..... 0101111 @atom_st
1042amominu_h  11000 . . ..... ..... 001 ..... 0101111 @atom_st
1043amomaxu_h  11100 . . ..... ..... 001 ..... 0101111 @atom_st
1044amocas_b    00101 . . ..... ..... 000 ..... 0101111 @atom_st
1045amocas_h    00101 . . ..... ..... 001 ..... 0101111 @atom_st
1046