xref: /openbmc/qemu/target/riscv/insn32.decode (revision c418f935)
1#
2# RISC-V translation routines for the RVXI Base Integer Instruction Set.
3#
4# Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de
5#                    Bastian Koppelmann, kbastian@mail.uni-paderborn.de
6#
7# This program is free software; you can redistribute it and/or modify it
8# under the terms and conditions of the GNU General Public License,
9# version 2 or later, as published by the Free Software Foundation.
10#
11# This program is distributed in the hope it will be useful, but WITHOUT
12# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14# more details.
15#
16# You should have received a copy of the GNU General Public License along with
17# this program.  If not, see <http://www.gnu.org/licenses/>.
18
19# Fields:
20%rs3       27:5
21%rs2       20:5
22%rs1       15:5
23%rd        7:5
24
25%sh10    20:10
26%csr    20:12
27%rm     12:3
28%nf     29:3                     !function=ex_plus_1
29
30# immediates:
31%imm_i    20:s12
32%imm_s    25:s7 7:5
33%imm_b    31:s1 7:1 25:6 8:4     !function=ex_shift_1
34%imm_j    31:s1 12:8 20:1 21:10  !function=ex_shift_1
35%imm_u    12:s20                 !function=ex_shift_12
36
37# Argument sets:
38&empty
39&b    imm rs2 rs1
40&i    imm rs1 rd
41&j    imm rd
42&r    rd rs1 rs2
43&s    imm rs1 rs2
44&u    imm rd
45&shift     shamt rs1 rd
46&atomic    aq rl rs2 rs1 rd
47&rmrr      vm rd rs1 rs2
48&rmr       vm rd rs2
49&rwdvm     vm wd rd rs1 rs2
50&r2nfvm    vm rd rs1 nf
51&rnfvm     vm rd rs1 rs2 nf
52
53# Formats 32:
54@r       .......   ..... ..... ... ..... ....... &r                %rs2 %rs1 %rd
55@i       ............    ..... ... ..... ....... &i      imm=%imm_i     %rs1 %rd
56@b       .......   ..... ..... ... ..... ....... &b      imm=%imm_b %rs2 %rs1
57@s       .......   ..... ..... ... ..... ....... &s      imm=%imm_s %rs2 %rs1
58@u       ....................      ..... ....... &u      imm=%imm_u          %rd
59@j       ....................      ..... ....... &j      imm=%imm_j          %rd
60
61@sh      ......  ...... .....  ... ..... ....... &shift  shamt=%sh10      %rs1 %rd
62@csr     ............   .....  ... ..... .......               %csr     %rs1 %rd
63
64@atom_ld ..... aq:1 rl:1 ..... ........ ..... ....... &atomic rs2=0     %rs1 %rd
65@atom_st ..... aq:1 rl:1 ..... ........ ..... ....... &atomic %rs2      %rs1 %rd
66
67@r4_rm   ..... ..  ..... ..... ... ..... ....... %rs3 %rs2 %rs1 %rm %rd
68@r_rm    .......   ..... ..... ... ..... ....... %rs2 %rs1 %rm %rd
69@r2_rm   .......   ..... ..... ... ..... ....... %rs1 %rm %rd
70@r2      .......   ..... ..... ... ..... ....... %rs1 %rd
71@r2_nfvm ... ... vm:1 ..... ..... ... ..... ....... &r2nfvm %nf %rs1 %rd
72@r2_vm   ...... vm:1 ..... ..... ... ..... ....... &rmr %rs2 %rd
73@r1_vm   ...... vm:1 ..... ..... ... ..... ....... %rd
74@r_nfvm  ... ... vm:1 ..... ..... ... ..... ....... &rnfvm %nf %rs2 %rs1 %rd
75@r2rd    .......   ..... ..... ... ..... ....... %rs2 %rd
76@r_vm    ...... vm:1 ..... ..... ... ..... ....... &rmrr %rs2 %rs1 %rd
77@r_vm_1  ...... . ..... ..... ... ..... .......    &rmrr vm=1 %rs2 %rs1 %rd
78@r_vm_0  ...... . ..... ..... ... ..... .......    &rmrr vm=0 %rs2 %rs1 %rd
79@r_wdvm  ..... wd:1 vm:1 ..... ..... ... ..... ....... &rwdvm %rs2 %rs1 %rd
80@r2_zimm . zimm:11  ..... ... ..... ....... %rs1 %rd
81@r2_s    .......   ..... ..... ... ..... ....... %rs2 %rs1
82
83@hfence_gvma ....... ..... .....   ... ..... ....... %rs2 %rs1
84@hfence_vvma ....... ..... .....   ... ..... ....... %rs2 %rs1
85
86@sfence_vma ....... ..... .....   ... ..... ....... %rs2 %rs1
87@sfence_vm  ....... ..... .....   ... ..... ....... %rs1
88
89
90# *** Privileged Instructions ***
91ecall       000000000000     00000 000 00000 1110011
92ebreak      000000000001     00000 000 00000 1110011
93uret        0000000    00010 00000 000 00000 1110011
94sret        0001000    00010 00000 000 00000 1110011
95mret        0011000    00010 00000 000 00000 1110011
96wfi         0001000    00101 00000 000 00000 1110011
97sfence_vma  0001001    ..... ..... 000 00000 1110011 @sfence_vma
98sfence_vm   0001000    00100 ..... 000 00000 1110011 @sfence_vm
99
100# *** RV32I Base Instruction Set ***
101lui      ....................       ..... 0110111 @u
102auipc    ....................       ..... 0010111 @u
103jal      ....................       ..... 1101111 @j
104jalr     ............     ..... 000 ..... 1100111 @i
105beq      ....... .....    ..... 000 ..... 1100011 @b
106bne      ....... .....    ..... 001 ..... 1100011 @b
107blt      ....... .....    ..... 100 ..... 1100011 @b
108bge      ....... .....    ..... 101 ..... 1100011 @b
109bltu     ....... .....    ..... 110 ..... 1100011 @b
110bgeu     ....... .....    ..... 111 ..... 1100011 @b
111lb       ............     ..... 000 ..... 0000011 @i
112lh       ............     ..... 001 ..... 0000011 @i
113lw       ............     ..... 010 ..... 0000011 @i
114lbu      ............     ..... 100 ..... 0000011 @i
115lhu      ............     ..... 101 ..... 0000011 @i
116sb       .......  .....   ..... 000 ..... 0100011 @s
117sh       .......  .....   ..... 001 ..... 0100011 @s
118sw       .......  .....   ..... 010 ..... 0100011 @s
119addi     ............     ..... 000 ..... 0010011 @i
120slti     ............     ..... 010 ..... 0010011 @i
121sltiu    ............     ..... 011 ..... 0010011 @i
122xori     ............     ..... 100 ..... 0010011 @i
123ori      ............     ..... 110 ..... 0010011 @i
124andi     ............     ..... 111 ..... 0010011 @i
125slli     00.... ......    ..... 001 ..... 0010011 @sh
126srli     00.... ......    ..... 101 ..... 0010011 @sh
127srai     01.... ......    ..... 101 ..... 0010011 @sh
128add      0000000 .....    ..... 000 ..... 0110011 @r
129sub      0100000 .....    ..... 000 ..... 0110011 @r
130sll      0000000 .....    ..... 001 ..... 0110011 @r
131slt      0000000 .....    ..... 010 ..... 0110011 @r
132sltu     0000000 .....    ..... 011 ..... 0110011 @r
133xor      0000000 .....    ..... 100 ..... 0110011 @r
134srl      0000000 .....    ..... 101 ..... 0110011 @r
135sra      0100000 .....    ..... 101 ..... 0110011 @r
136or       0000000 .....    ..... 110 ..... 0110011 @r
137and      0000000 .....    ..... 111 ..... 0110011 @r
138fence    ---- pred:4 succ:4 ----- 000 ----- 0001111
139fence_i  ---- ----   ----   ----- 001 ----- 0001111
140csrrw    ............     ..... 001 ..... 1110011 @csr
141csrrs    ............     ..... 010 ..... 1110011 @csr
142csrrc    ............     ..... 011 ..... 1110011 @csr
143csrrwi   ............     ..... 101 ..... 1110011 @csr
144csrrsi   ............     ..... 110 ..... 1110011 @csr
145csrrci   ............     ..... 111 ..... 1110011 @csr
146
147# *** RV32M Standard Extension ***
148mul      0000001 .....  ..... 000 ..... 0110011 @r
149mulh     0000001 .....  ..... 001 ..... 0110011 @r
150mulhsu   0000001 .....  ..... 010 ..... 0110011 @r
151mulhu    0000001 .....  ..... 011 ..... 0110011 @r
152div      0000001 .....  ..... 100 ..... 0110011 @r
153divu     0000001 .....  ..... 101 ..... 0110011 @r
154rem      0000001 .....  ..... 110 ..... 0110011 @r
155remu     0000001 .....  ..... 111 ..... 0110011 @r
156
157# *** RV32A Standard Extension ***
158lr_w       00010 . . 00000 ..... 010 ..... 0101111 @atom_ld
159sc_w       00011 . . ..... ..... 010 ..... 0101111 @atom_st
160amoswap_w  00001 . . ..... ..... 010 ..... 0101111 @atom_st
161amoadd_w   00000 . . ..... ..... 010 ..... 0101111 @atom_st
162amoxor_w   00100 . . ..... ..... 010 ..... 0101111 @atom_st
163amoand_w   01100 . . ..... ..... 010 ..... 0101111 @atom_st
164amoor_w    01000 . . ..... ..... 010 ..... 0101111 @atom_st
165amomin_w   10000 . . ..... ..... 010 ..... 0101111 @atom_st
166amomax_w   10100 . . ..... ..... 010 ..... 0101111 @atom_st
167amominu_w  11000 . . ..... ..... 010 ..... 0101111 @atom_st
168amomaxu_w  11100 . . ..... ..... 010 ..... 0101111 @atom_st
169
170# *** RV32F Standard Extension ***
171flw        ............   ..... 010 ..... 0000111 @i
172fsw        .......  ..... ..... 010 ..... 0100111 @s
173fmadd_s    ..... 00 ..... ..... ... ..... 1000011 @r4_rm
174fmsub_s    ..... 00 ..... ..... ... ..... 1000111 @r4_rm
175fnmsub_s   ..... 00 ..... ..... ... ..... 1001011 @r4_rm
176fnmadd_s   ..... 00 ..... ..... ... ..... 1001111 @r4_rm
177fadd_s     0000000  ..... ..... ... ..... 1010011 @r_rm
178fsub_s     0000100  ..... ..... ... ..... 1010011 @r_rm
179fmul_s     0001000  ..... ..... ... ..... 1010011 @r_rm
180fdiv_s     0001100  ..... ..... ... ..... 1010011 @r_rm
181fsqrt_s    0101100  00000 ..... ... ..... 1010011 @r2_rm
182fsgnj_s    0010000  ..... ..... 000 ..... 1010011 @r
183fsgnjn_s   0010000  ..... ..... 001 ..... 1010011 @r
184fsgnjx_s   0010000  ..... ..... 010 ..... 1010011 @r
185fmin_s     0010100  ..... ..... 000 ..... 1010011 @r
186fmax_s     0010100  ..... ..... 001 ..... 1010011 @r
187fcvt_w_s   1100000  00000 ..... ... ..... 1010011 @r2_rm
188fcvt_wu_s  1100000  00001 ..... ... ..... 1010011 @r2_rm
189fmv_x_w    1110000  00000 ..... 000 ..... 1010011 @r2
190feq_s      1010000  ..... ..... 010 ..... 1010011 @r
191flt_s      1010000  ..... ..... 001 ..... 1010011 @r
192fle_s      1010000  ..... ..... 000 ..... 1010011 @r
193fclass_s   1110000  00000 ..... 001 ..... 1010011 @r2
194fcvt_s_w   1101000  00000 ..... ... ..... 1010011 @r2_rm
195fcvt_s_wu  1101000  00001 ..... ... ..... 1010011 @r2_rm
196fmv_w_x    1111000  00000 ..... 000 ..... 1010011 @r2
197
198# *** RV32D Standard Extension ***
199fld        ............   ..... 011 ..... 0000111 @i
200fsd        ....... .....  ..... 011 ..... 0100111 @s
201fmadd_d    ..... 01 ..... ..... ... ..... 1000011 @r4_rm
202fmsub_d    ..... 01 ..... ..... ... ..... 1000111 @r4_rm
203fnmsub_d   ..... 01 ..... ..... ... ..... 1001011 @r4_rm
204fnmadd_d   ..... 01 ..... ..... ... ..... 1001111 @r4_rm
205fadd_d     0000001  ..... ..... ... ..... 1010011 @r_rm
206fsub_d     0000101  ..... ..... ... ..... 1010011 @r_rm
207fmul_d     0001001  ..... ..... ... ..... 1010011 @r_rm
208fdiv_d     0001101  ..... ..... ... ..... 1010011 @r_rm
209fsqrt_d    0101101  00000 ..... ... ..... 1010011 @r2_rm
210fsgnj_d    0010001  ..... ..... 000 ..... 1010011 @r
211fsgnjn_d   0010001  ..... ..... 001 ..... 1010011 @r
212fsgnjx_d   0010001  ..... ..... 010 ..... 1010011 @r
213fmin_d     0010101  ..... ..... 000 ..... 1010011 @r
214fmax_d     0010101  ..... ..... 001 ..... 1010011 @r
215fcvt_s_d   0100000  00001 ..... ... ..... 1010011 @r2_rm
216fcvt_d_s   0100001  00000 ..... ... ..... 1010011 @r2_rm
217feq_d      1010001  ..... ..... 010 ..... 1010011 @r
218flt_d      1010001  ..... ..... 001 ..... 1010011 @r
219fle_d      1010001  ..... ..... 000 ..... 1010011 @r
220fclass_d   1110001  00000 ..... 001 ..... 1010011 @r2
221fcvt_w_d   1100001  00000 ..... ... ..... 1010011 @r2_rm
222fcvt_wu_d  1100001  00001 ..... ... ..... 1010011 @r2_rm
223fcvt_d_w   1101001  00000 ..... ... ..... 1010011 @r2_rm
224fcvt_d_wu  1101001  00001 ..... ... ..... 1010011 @r2_rm
225
226# *** RV32H Base Instruction Set ***
227hlv_b       0110000  00000  ..... 100 ..... 1110011 @r2
228hlv_bu      0110000  00001  ..... 100 ..... 1110011 @r2
229hlv_h       0110010  00000  ..... 100 ..... 1110011 @r2
230hlv_hu      0110010  00001  ..... 100 ..... 1110011 @r2
231hlvx_hu     0110010  00011  ..... 100 ..... 1110011 @r2
232hlv_w       0110100  00000  ..... 100 ..... 1110011 @r2
233hlvx_wu     0110100  00011  ..... 100 ..... 1110011 @r2
234hsv_b       0110001  .....  ..... 100 00000 1110011 @r2_s
235hsv_h       0110011  .....  ..... 100 00000 1110011 @r2_s
236hsv_w       0110101  .....  ..... 100 00000 1110011 @r2_s
237hfence_gvma 0110001  .....  ..... 000 00000 1110011 @hfence_gvma
238hfence_vvma 0010001  .....  ..... 000 00000 1110011 @hfence_vvma
239
240# *** RV32V Extension ***
241
242# *** Vector loads and stores are encoded within LOADFP/STORE-FP ***
243vlb_v      ... 100 . 00000 ..... 000 ..... 0000111 @r2_nfvm
244vlh_v      ... 100 . 00000 ..... 101 ..... 0000111 @r2_nfvm
245vlw_v      ... 100 . 00000 ..... 110 ..... 0000111 @r2_nfvm
246vle_v      ... 000 . 00000 ..... 111 ..... 0000111 @r2_nfvm
247vlbu_v     ... 000 . 00000 ..... 000 ..... 0000111 @r2_nfvm
248vlhu_v     ... 000 . 00000 ..... 101 ..... 0000111 @r2_nfvm
249vlwu_v     ... 000 . 00000 ..... 110 ..... 0000111 @r2_nfvm
250vlbff_v    ... 100 . 10000 ..... 000 ..... 0000111 @r2_nfvm
251vlhff_v    ... 100 . 10000 ..... 101 ..... 0000111 @r2_nfvm
252vlwff_v    ... 100 . 10000 ..... 110 ..... 0000111 @r2_nfvm
253vleff_v    ... 000 . 10000 ..... 111 ..... 0000111 @r2_nfvm
254vlbuff_v   ... 000 . 10000 ..... 000 ..... 0000111 @r2_nfvm
255vlhuff_v   ... 000 . 10000 ..... 101 ..... 0000111 @r2_nfvm
256vlwuff_v   ... 000 . 10000 ..... 110 ..... 0000111 @r2_nfvm
257vsb_v      ... 000 . 00000 ..... 000 ..... 0100111 @r2_nfvm
258vsh_v      ... 000 . 00000 ..... 101 ..... 0100111 @r2_nfvm
259vsw_v      ... 000 . 00000 ..... 110 ..... 0100111 @r2_nfvm
260vse_v      ... 000 . 00000 ..... 111 ..... 0100111 @r2_nfvm
261
262vlsb_v     ... 110 . ..... ..... 000 ..... 0000111 @r_nfvm
263vlsh_v     ... 110 . ..... ..... 101 ..... 0000111 @r_nfvm
264vlsw_v     ... 110 . ..... ..... 110 ..... 0000111 @r_nfvm
265vlse_v     ... 010 . ..... ..... 111 ..... 0000111 @r_nfvm
266vlsbu_v    ... 010 . ..... ..... 000 ..... 0000111 @r_nfvm
267vlshu_v    ... 010 . ..... ..... 101 ..... 0000111 @r_nfvm
268vlswu_v    ... 010 . ..... ..... 110 ..... 0000111 @r_nfvm
269vssb_v     ... 010 . ..... ..... 000 ..... 0100111 @r_nfvm
270vssh_v     ... 010 . ..... ..... 101 ..... 0100111 @r_nfvm
271vssw_v     ... 010 . ..... ..... 110 ..... 0100111 @r_nfvm
272vsse_v     ... 010 . ..... ..... 111 ..... 0100111 @r_nfvm
273
274vlxb_v     ... 111 . ..... ..... 000 ..... 0000111 @r_nfvm
275vlxh_v     ... 111 . ..... ..... 101 ..... 0000111 @r_nfvm
276vlxw_v     ... 111 . ..... ..... 110 ..... 0000111 @r_nfvm
277vlxe_v     ... 011 . ..... ..... 111 ..... 0000111 @r_nfvm
278vlxbu_v    ... 011 . ..... ..... 000 ..... 0000111 @r_nfvm
279vlxhu_v    ... 011 . ..... ..... 101 ..... 0000111 @r_nfvm
280vlxwu_v    ... 011 . ..... ..... 110 ..... 0000111 @r_nfvm
281# Vector ordered-indexed and unordered-indexed store insns.
282vsxb_v     ... -11 . ..... ..... 000 ..... 0100111 @r_nfvm
283vsxh_v     ... -11 . ..... ..... 101 ..... 0100111 @r_nfvm
284vsxw_v     ... -11 . ..... ..... 110 ..... 0100111 @r_nfvm
285vsxe_v     ... -11 . ..... ..... 111 ..... 0100111 @r_nfvm
286
287#*** Vector AMO operations are encoded under the standard AMO major opcode ***
288vamoswapw_v     00001 . . ..... ..... 110 ..... 0101111 @r_wdvm
289vamoaddw_v      00000 . . ..... ..... 110 ..... 0101111 @r_wdvm
290vamoxorw_v      00100 . . ..... ..... 110 ..... 0101111 @r_wdvm
291vamoandw_v      01100 . . ..... ..... 110 ..... 0101111 @r_wdvm
292vamoorw_v       01000 . . ..... ..... 110 ..... 0101111 @r_wdvm
293vamominw_v      10000 . . ..... ..... 110 ..... 0101111 @r_wdvm
294vamomaxw_v      10100 . . ..... ..... 110 ..... 0101111 @r_wdvm
295vamominuw_v     11000 . . ..... ..... 110 ..... 0101111 @r_wdvm
296vamomaxuw_v     11100 . . ..... ..... 110 ..... 0101111 @r_wdvm
297
298# *** new major opcode OP-V ***
299vadd_vv         000000 . ..... ..... 000 ..... 1010111 @r_vm
300vadd_vx         000000 . ..... ..... 100 ..... 1010111 @r_vm
301vadd_vi         000000 . ..... ..... 011 ..... 1010111 @r_vm
302vsub_vv         000010 . ..... ..... 000 ..... 1010111 @r_vm
303vsub_vx         000010 . ..... ..... 100 ..... 1010111 @r_vm
304vrsub_vx        000011 . ..... ..... 100 ..... 1010111 @r_vm
305vrsub_vi        000011 . ..... ..... 011 ..... 1010111 @r_vm
306vwaddu_vv       110000 . ..... ..... 010 ..... 1010111 @r_vm
307vwaddu_vx       110000 . ..... ..... 110 ..... 1010111 @r_vm
308vwadd_vv        110001 . ..... ..... 010 ..... 1010111 @r_vm
309vwadd_vx        110001 . ..... ..... 110 ..... 1010111 @r_vm
310vwsubu_vv       110010 . ..... ..... 010 ..... 1010111 @r_vm
311vwsubu_vx       110010 . ..... ..... 110 ..... 1010111 @r_vm
312vwsub_vv        110011 . ..... ..... 010 ..... 1010111 @r_vm
313vwsub_vx        110011 . ..... ..... 110 ..... 1010111 @r_vm
314vwaddu_wv       110100 . ..... ..... 010 ..... 1010111 @r_vm
315vwaddu_wx       110100 . ..... ..... 110 ..... 1010111 @r_vm
316vwadd_wv        110101 . ..... ..... 010 ..... 1010111 @r_vm
317vwadd_wx        110101 . ..... ..... 110 ..... 1010111 @r_vm
318vwsubu_wv       110110 . ..... ..... 010 ..... 1010111 @r_vm
319vwsubu_wx       110110 . ..... ..... 110 ..... 1010111 @r_vm
320vwsub_wv        110111 . ..... ..... 010 ..... 1010111 @r_vm
321vwsub_wx        110111 . ..... ..... 110 ..... 1010111 @r_vm
322vadc_vvm        010000 1 ..... ..... 000 ..... 1010111 @r_vm_1
323vadc_vxm        010000 1 ..... ..... 100 ..... 1010111 @r_vm_1
324vadc_vim        010000 1 ..... ..... 011 ..... 1010111 @r_vm_1
325vmadc_vvm       010001 1 ..... ..... 000 ..... 1010111 @r_vm_1
326vmadc_vxm       010001 1 ..... ..... 100 ..... 1010111 @r_vm_1
327vmadc_vim       010001 1 ..... ..... 011 ..... 1010111 @r_vm_1
328vsbc_vvm        010010 1 ..... ..... 000 ..... 1010111 @r_vm_1
329vsbc_vxm        010010 1 ..... ..... 100 ..... 1010111 @r_vm_1
330vmsbc_vvm       010011 1 ..... ..... 000 ..... 1010111 @r_vm_1
331vmsbc_vxm       010011 1 ..... ..... 100 ..... 1010111 @r_vm_1
332vand_vv         001001 . ..... ..... 000 ..... 1010111 @r_vm
333vand_vx         001001 . ..... ..... 100 ..... 1010111 @r_vm
334vand_vi         001001 . ..... ..... 011 ..... 1010111 @r_vm
335vor_vv          001010 . ..... ..... 000 ..... 1010111 @r_vm
336vor_vx          001010 . ..... ..... 100 ..... 1010111 @r_vm
337vor_vi          001010 . ..... ..... 011 ..... 1010111 @r_vm
338vxor_vv         001011 . ..... ..... 000 ..... 1010111 @r_vm
339vxor_vx         001011 . ..... ..... 100 ..... 1010111 @r_vm
340vxor_vi         001011 . ..... ..... 011 ..... 1010111 @r_vm
341vsll_vv         100101 . ..... ..... 000 ..... 1010111 @r_vm
342vsll_vx         100101 . ..... ..... 100 ..... 1010111 @r_vm
343vsll_vi         100101 . ..... ..... 011 ..... 1010111 @r_vm
344vsrl_vv         101000 . ..... ..... 000 ..... 1010111 @r_vm
345vsrl_vx         101000 . ..... ..... 100 ..... 1010111 @r_vm
346vsrl_vi         101000 . ..... ..... 011 ..... 1010111 @r_vm
347vsra_vv         101001 . ..... ..... 000 ..... 1010111 @r_vm
348vsra_vx         101001 . ..... ..... 100 ..... 1010111 @r_vm
349vsra_vi         101001 . ..... ..... 011 ..... 1010111 @r_vm
350vnsrl_vv        101100 . ..... ..... 000 ..... 1010111 @r_vm
351vnsrl_vx        101100 . ..... ..... 100 ..... 1010111 @r_vm
352vnsrl_vi        101100 . ..... ..... 011 ..... 1010111 @r_vm
353vnsra_vv        101101 . ..... ..... 000 ..... 1010111 @r_vm
354vnsra_vx        101101 . ..... ..... 100 ..... 1010111 @r_vm
355vnsra_vi        101101 . ..... ..... 011 ..... 1010111 @r_vm
356vmseq_vv        011000 . ..... ..... 000 ..... 1010111 @r_vm
357vmseq_vx        011000 . ..... ..... 100 ..... 1010111 @r_vm
358vmseq_vi        011000 . ..... ..... 011 ..... 1010111 @r_vm
359vmsne_vv        011001 . ..... ..... 000 ..... 1010111 @r_vm
360vmsne_vx        011001 . ..... ..... 100 ..... 1010111 @r_vm
361vmsne_vi        011001 . ..... ..... 011 ..... 1010111 @r_vm
362vmsltu_vv       011010 . ..... ..... 000 ..... 1010111 @r_vm
363vmsltu_vx       011010 . ..... ..... 100 ..... 1010111 @r_vm
364vmslt_vv        011011 . ..... ..... 000 ..... 1010111 @r_vm
365vmslt_vx        011011 . ..... ..... 100 ..... 1010111 @r_vm
366vmsleu_vv       011100 . ..... ..... 000 ..... 1010111 @r_vm
367vmsleu_vx       011100 . ..... ..... 100 ..... 1010111 @r_vm
368vmsleu_vi       011100 . ..... ..... 011 ..... 1010111 @r_vm
369vmsle_vv        011101 . ..... ..... 000 ..... 1010111 @r_vm
370vmsle_vx        011101 . ..... ..... 100 ..... 1010111 @r_vm
371vmsle_vi        011101 . ..... ..... 011 ..... 1010111 @r_vm
372vmsgtu_vx       011110 . ..... ..... 100 ..... 1010111 @r_vm
373vmsgtu_vi       011110 . ..... ..... 011 ..... 1010111 @r_vm
374vmsgt_vx        011111 . ..... ..... 100 ..... 1010111 @r_vm
375vmsgt_vi        011111 . ..... ..... 011 ..... 1010111 @r_vm
376vminu_vv        000100 . ..... ..... 000 ..... 1010111 @r_vm
377vminu_vx        000100 . ..... ..... 100 ..... 1010111 @r_vm
378vmin_vv         000101 . ..... ..... 000 ..... 1010111 @r_vm
379vmin_vx         000101 . ..... ..... 100 ..... 1010111 @r_vm
380vmaxu_vv        000110 . ..... ..... 000 ..... 1010111 @r_vm
381vmaxu_vx        000110 . ..... ..... 100 ..... 1010111 @r_vm
382vmax_vv         000111 . ..... ..... 000 ..... 1010111 @r_vm
383vmax_vx         000111 . ..... ..... 100 ..... 1010111 @r_vm
384vmul_vv         100101 . ..... ..... 010 ..... 1010111 @r_vm
385vmul_vx         100101 . ..... ..... 110 ..... 1010111 @r_vm
386vmulh_vv        100111 . ..... ..... 010 ..... 1010111 @r_vm
387vmulh_vx        100111 . ..... ..... 110 ..... 1010111 @r_vm
388vmulhu_vv       100100 . ..... ..... 010 ..... 1010111 @r_vm
389vmulhu_vx       100100 . ..... ..... 110 ..... 1010111 @r_vm
390vmulhsu_vv      100110 . ..... ..... 010 ..... 1010111 @r_vm
391vmulhsu_vx      100110 . ..... ..... 110 ..... 1010111 @r_vm
392vdivu_vv        100000 . ..... ..... 010 ..... 1010111 @r_vm
393vdivu_vx        100000 . ..... ..... 110 ..... 1010111 @r_vm
394vdiv_vv         100001 . ..... ..... 010 ..... 1010111 @r_vm
395vdiv_vx         100001 . ..... ..... 110 ..... 1010111 @r_vm
396vremu_vv        100010 . ..... ..... 010 ..... 1010111 @r_vm
397vremu_vx        100010 . ..... ..... 110 ..... 1010111 @r_vm
398vrem_vv         100011 . ..... ..... 010 ..... 1010111 @r_vm
399vrem_vx         100011 . ..... ..... 110 ..... 1010111 @r_vm
400vwmulu_vv       111000 . ..... ..... 010 ..... 1010111 @r_vm
401vwmulu_vx       111000 . ..... ..... 110 ..... 1010111 @r_vm
402vwmulsu_vv      111010 . ..... ..... 010 ..... 1010111 @r_vm
403vwmulsu_vx      111010 . ..... ..... 110 ..... 1010111 @r_vm
404vwmul_vv        111011 . ..... ..... 010 ..... 1010111 @r_vm
405vwmul_vx        111011 . ..... ..... 110 ..... 1010111 @r_vm
406vmacc_vv        101101 . ..... ..... 010 ..... 1010111 @r_vm
407vmacc_vx        101101 . ..... ..... 110 ..... 1010111 @r_vm
408vnmsac_vv       101111 . ..... ..... 010 ..... 1010111 @r_vm
409vnmsac_vx       101111 . ..... ..... 110 ..... 1010111 @r_vm
410vmadd_vv        101001 . ..... ..... 010 ..... 1010111 @r_vm
411vmadd_vx        101001 . ..... ..... 110 ..... 1010111 @r_vm
412vnmsub_vv       101011 . ..... ..... 010 ..... 1010111 @r_vm
413vnmsub_vx       101011 . ..... ..... 110 ..... 1010111 @r_vm
414vwmaccu_vv      111100 . ..... ..... 010 ..... 1010111 @r_vm
415vwmaccu_vx      111100 . ..... ..... 110 ..... 1010111 @r_vm
416vwmacc_vv       111101 . ..... ..... 010 ..... 1010111 @r_vm
417vwmacc_vx       111101 . ..... ..... 110 ..... 1010111 @r_vm
418vwmaccsu_vv     111110 . ..... ..... 010 ..... 1010111 @r_vm
419vwmaccsu_vx     111110 . ..... ..... 110 ..... 1010111 @r_vm
420vwmaccus_vx     111111 . ..... ..... 110 ..... 1010111 @r_vm
421vmv_v_v         010111 1 00000 ..... 000 ..... 1010111 @r2
422vmv_v_x         010111 1 00000 ..... 100 ..... 1010111 @r2
423vmv_v_i         010111 1 00000 ..... 011 ..... 1010111 @r2
424vmerge_vvm      010111 0 ..... ..... 000 ..... 1010111 @r_vm_0
425vmerge_vxm      010111 0 ..... ..... 100 ..... 1010111 @r_vm_0
426vmerge_vim      010111 0 ..... ..... 011 ..... 1010111 @r_vm_0
427vsaddu_vv       100000 . ..... ..... 000 ..... 1010111 @r_vm
428vsaddu_vx       100000 . ..... ..... 100 ..... 1010111 @r_vm
429vsaddu_vi       100000 . ..... ..... 011 ..... 1010111 @r_vm
430vsadd_vv        100001 . ..... ..... 000 ..... 1010111 @r_vm
431vsadd_vx        100001 . ..... ..... 100 ..... 1010111 @r_vm
432vsadd_vi        100001 . ..... ..... 011 ..... 1010111 @r_vm
433vssubu_vv       100010 . ..... ..... 000 ..... 1010111 @r_vm
434vssubu_vx       100010 . ..... ..... 100 ..... 1010111 @r_vm
435vssub_vv        100011 . ..... ..... 000 ..... 1010111 @r_vm
436vssub_vx        100011 . ..... ..... 100 ..... 1010111 @r_vm
437vaadd_vv        100100 . ..... ..... 000 ..... 1010111 @r_vm
438vaadd_vx        100100 . ..... ..... 100 ..... 1010111 @r_vm
439vaadd_vi        100100 . ..... ..... 011 ..... 1010111 @r_vm
440vasub_vv        100110 . ..... ..... 000 ..... 1010111 @r_vm
441vasub_vx        100110 . ..... ..... 100 ..... 1010111 @r_vm
442vsmul_vv        100111 . ..... ..... 000 ..... 1010111 @r_vm
443vsmul_vx        100111 . ..... ..... 100 ..... 1010111 @r_vm
444vwsmaccu_vv     111100 . ..... ..... 000 ..... 1010111 @r_vm
445vwsmaccu_vx     111100 . ..... ..... 100 ..... 1010111 @r_vm
446vwsmacc_vv      111101 . ..... ..... 000 ..... 1010111 @r_vm
447vwsmacc_vx      111101 . ..... ..... 100 ..... 1010111 @r_vm
448vwsmaccsu_vv    111110 . ..... ..... 000 ..... 1010111 @r_vm
449vwsmaccsu_vx    111110 . ..... ..... 100 ..... 1010111 @r_vm
450vwsmaccus_vx    111111 . ..... ..... 100 ..... 1010111 @r_vm
451vssrl_vv        101010 . ..... ..... 000 ..... 1010111 @r_vm
452vssrl_vx        101010 . ..... ..... 100 ..... 1010111 @r_vm
453vssrl_vi        101010 . ..... ..... 011 ..... 1010111 @r_vm
454vssra_vv        101011 . ..... ..... 000 ..... 1010111 @r_vm
455vssra_vx        101011 . ..... ..... 100 ..... 1010111 @r_vm
456vssra_vi        101011 . ..... ..... 011 ..... 1010111 @r_vm
457vnclipu_vv      101110 . ..... ..... 000 ..... 1010111 @r_vm
458vnclipu_vx      101110 . ..... ..... 100 ..... 1010111 @r_vm
459vnclipu_vi      101110 . ..... ..... 011 ..... 1010111 @r_vm
460vnclip_vv       101111 . ..... ..... 000 ..... 1010111 @r_vm
461vnclip_vx       101111 . ..... ..... 100 ..... 1010111 @r_vm
462vnclip_vi       101111 . ..... ..... 011 ..... 1010111 @r_vm
463vfadd_vv        000000 . ..... ..... 001 ..... 1010111 @r_vm
464vfadd_vf        000000 . ..... ..... 101 ..... 1010111 @r_vm
465vfsub_vv        000010 . ..... ..... 001 ..... 1010111 @r_vm
466vfsub_vf        000010 . ..... ..... 101 ..... 1010111 @r_vm
467vfrsub_vf       100111 . ..... ..... 101 ..... 1010111 @r_vm
468vfwadd_vv       110000 . ..... ..... 001 ..... 1010111 @r_vm
469vfwadd_vf       110000 . ..... ..... 101 ..... 1010111 @r_vm
470vfwadd_wv       110100 . ..... ..... 001 ..... 1010111 @r_vm
471vfwadd_wf       110100 . ..... ..... 101 ..... 1010111 @r_vm
472vfwsub_vv       110010 . ..... ..... 001 ..... 1010111 @r_vm
473vfwsub_vf       110010 . ..... ..... 101 ..... 1010111 @r_vm
474vfwsub_wv       110110 . ..... ..... 001 ..... 1010111 @r_vm
475vfwsub_wf       110110 . ..... ..... 101 ..... 1010111 @r_vm
476vfmul_vv        100100 . ..... ..... 001 ..... 1010111 @r_vm
477vfmul_vf        100100 . ..... ..... 101 ..... 1010111 @r_vm
478vfdiv_vv        100000 . ..... ..... 001 ..... 1010111 @r_vm
479vfdiv_vf        100000 . ..... ..... 101 ..... 1010111 @r_vm
480vfrdiv_vf       100001 . ..... ..... 101 ..... 1010111 @r_vm
481vfwmul_vv       111000 . ..... ..... 001 ..... 1010111 @r_vm
482vfwmul_vf       111000 . ..... ..... 101 ..... 1010111 @r_vm
483vfmacc_vv       101100 . ..... ..... 001 ..... 1010111 @r_vm
484vfnmacc_vv      101101 . ..... ..... 001 ..... 1010111 @r_vm
485vfnmacc_vf      101101 . ..... ..... 101 ..... 1010111 @r_vm
486vfmacc_vf       101100 . ..... ..... 101 ..... 1010111 @r_vm
487vfmsac_vv       101110 . ..... ..... 001 ..... 1010111 @r_vm
488vfmsac_vf       101110 . ..... ..... 101 ..... 1010111 @r_vm
489vfnmsac_vv      101111 . ..... ..... 001 ..... 1010111 @r_vm
490vfnmsac_vf      101111 . ..... ..... 101 ..... 1010111 @r_vm
491vfmadd_vv       101000 . ..... ..... 001 ..... 1010111 @r_vm
492vfmadd_vf       101000 . ..... ..... 101 ..... 1010111 @r_vm
493vfnmadd_vv      101001 . ..... ..... 001 ..... 1010111 @r_vm
494vfnmadd_vf      101001 . ..... ..... 101 ..... 1010111 @r_vm
495vfmsub_vv       101010 . ..... ..... 001 ..... 1010111 @r_vm
496vfmsub_vf       101010 . ..... ..... 101 ..... 1010111 @r_vm
497vfnmsub_vv      101011 . ..... ..... 001 ..... 1010111 @r_vm
498vfnmsub_vf      101011 . ..... ..... 101 ..... 1010111 @r_vm
499vfwmacc_vv      111100 . ..... ..... 001 ..... 1010111 @r_vm
500vfwmacc_vf      111100 . ..... ..... 101 ..... 1010111 @r_vm
501vfwnmacc_vv     111101 . ..... ..... 001 ..... 1010111 @r_vm
502vfwnmacc_vf     111101 . ..... ..... 101 ..... 1010111 @r_vm
503vfwmsac_vv      111110 . ..... ..... 001 ..... 1010111 @r_vm
504vfwmsac_vf      111110 . ..... ..... 101 ..... 1010111 @r_vm
505vfwnmsac_vv     111111 . ..... ..... 001 ..... 1010111 @r_vm
506vfwnmsac_vf     111111 . ..... ..... 101 ..... 1010111 @r_vm
507vfsqrt_v        100011 . ..... 00000 001 ..... 1010111 @r2_vm
508vfmin_vv        000100 . ..... ..... 001 ..... 1010111 @r_vm
509vfmin_vf        000100 . ..... ..... 101 ..... 1010111 @r_vm
510vfmax_vv        000110 . ..... ..... 001 ..... 1010111 @r_vm
511vfmax_vf        000110 . ..... ..... 101 ..... 1010111 @r_vm
512vfsgnj_vv       001000 . ..... ..... 001 ..... 1010111 @r_vm
513vfsgnj_vf       001000 . ..... ..... 101 ..... 1010111 @r_vm
514vfsgnjn_vv      001001 . ..... ..... 001 ..... 1010111 @r_vm
515vfsgnjn_vf      001001 . ..... ..... 101 ..... 1010111 @r_vm
516vfsgnjx_vv      001010 . ..... ..... 001 ..... 1010111 @r_vm
517vfsgnjx_vf      001010 . ..... ..... 101 ..... 1010111 @r_vm
518vmfeq_vv        011000 . ..... ..... 001 ..... 1010111 @r_vm
519vmfeq_vf        011000 . ..... ..... 101 ..... 1010111 @r_vm
520vmfne_vv        011100 . ..... ..... 001 ..... 1010111 @r_vm
521vmfne_vf        011100 . ..... ..... 101 ..... 1010111 @r_vm
522vmflt_vv        011011 . ..... ..... 001 ..... 1010111 @r_vm
523vmflt_vf        011011 . ..... ..... 101 ..... 1010111 @r_vm
524vmfle_vv        011001 . ..... ..... 001 ..... 1010111 @r_vm
525vmfle_vf        011001 . ..... ..... 101 ..... 1010111 @r_vm
526vmfgt_vf        011101 . ..... ..... 101 ..... 1010111 @r_vm
527vmfge_vf        011111 . ..... ..... 101 ..... 1010111 @r_vm
528vmford_vv       011010 . ..... ..... 001 ..... 1010111 @r_vm
529vmford_vf       011010 . ..... ..... 101 ..... 1010111 @r_vm
530vfclass_v       100011 . ..... 10000 001 ..... 1010111 @r2_vm
531vfmerge_vfm     010111 0 ..... ..... 101 ..... 1010111 @r_vm_0
532vfmv_v_f        010111 1 00000 ..... 101 ..... 1010111 @r2
533vfcvt_xu_f_v    100010 . ..... 00000 001 ..... 1010111 @r2_vm
534vfcvt_x_f_v     100010 . ..... 00001 001 ..... 1010111 @r2_vm
535vfcvt_f_xu_v    100010 . ..... 00010 001 ..... 1010111 @r2_vm
536vfcvt_f_x_v     100010 . ..... 00011 001 ..... 1010111 @r2_vm
537vfwcvt_xu_f_v   100010 . ..... 01000 001 ..... 1010111 @r2_vm
538vfwcvt_x_f_v    100010 . ..... 01001 001 ..... 1010111 @r2_vm
539vfwcvt_f_xu_v   100010 . ..... 01010 001 ..... 1010111 @r2_vm
540vfwcvt_f_x_v    100010 . ..... 01011 001 ..... 1010111 @r2_vm
541vfwcvt_f_f_v    100010 . ..... 01100 001 ..... 1010111 @r2_vm
542vfncvt_xu_f_v   100010 . ..... 10000 001 ..... 1010111 @r2_vm
543vfncvt_x_f_v    100010 . ..... 10001 001 ..... 1010111 @r2_vm
544vfncvt_f_xu_v   100010 . ..... 10010 001 ..... 1010111 @r2_vm
545vfncvt_f_x_v    100010 . ..... 10011 001 ..... 1010111 @r2_vm
546vfncvt_f_f_v    100010 . ..... 10100 001 ..... 1010111 @r2_vm
547vredsum_vs      000000 . ..... ..... 010 ..... 1010111 @r_vm
548vredand_vs      000001 . ..... ..... 010 ..... 1010111 @r_vm
549vredor_vs       000010 . ..... ..... 010 ..... 1010111 @r_vm
550vredxor_vs      000011 . ..... ..... 010 ..... 1010111 @r_vm
551vredminu_vs     000100 . ..... ..... 010 ..... 1010111 @r_vm
552vredmin_vs      000101 . ..... ..... 010 ..... 1010111 @r_vm
553vredmaxu_vs     000110 . ..... ..... 010 ..... 1010111 @r_vm
554vredmax_vs      000111 . ..... ..... 010 ..... 1010111 @r_vm
555vwredsumu_vs    110000 . ..... ..... 000 ..... 1010111 @r_vm
556vwredsum_vs     110001 . ..... ..... 000 ..... 1010111 @r_vm
557# Vector ordered and unordered reduction sum
558vfredsum_vs     0000-1 . ..... ..... 001 ..... 1010111 @r_vm
559vfredmin_vs     000101 . ..... ..... 001 ..... 1010111 @r_vm
560vfredmax_vs     000111 . ..... ..... 001 ..... 1010111 @r_vm
561# Vector widening ordered and unordered float reduction sum
562vfwredsum_vs    1100-1 . ..... ..... 001 ..... 1010111 @r_vm
563vmand_mm        011001 - ..... ..... 010 ..... 1010111 @r
564vmnand_mm       011101 - ..... ..... 010 ..... 1010111 @r
565vmandnot_mm     011000 - ..... ..... 010 ..... 1010111 @r
566vmxor_mm        011011 - ..... ..... 010 ..... 1010111 @r
567vmor_mm         011010 - ..... ..... 010 ..... 1010111 @r
568vmnor_mm        011110 - ..... ..... 010 ..... 1010111 @r
569vmornot_mm      011100 - ..... ..... 010 ..... 1010111 @r
570vmxnor_mm       011111 - ..... ..... 010 ..... 1010111 @r
571vmpopc_m        010100 . ..... ----- 010 ..... 1010111 @r2_vm
572vmfirst_m       010101 . ..... ----- 010 ..... 1010111 @r2_vm
573vmsbf_m         010110 . ..... 00001 010 ..... 1010111 @r2_vm
574vmsif_m         010110 . ..... 00011 010 ..... 1010111 @r2_vm
575vmsof_m         010110 . ..... 00010 010 ..... 1010111 @r2_vm
576viota_m         010110 . ..... 10000 010 ..... 1010111 @r2_vm
577vid_v           010110 . 00000 10001 010 ..... 1010111 @r1_vm
578vext_x_v        001100 1 ..... ..... 010 ..... 1010111 @r
579vmv_s_x         001101 1 00000 ..... 110 ..... 1010111 @r2
580vfmv_f_s        001100 1 ..... 00000 001 ..... 1010111 @r2rd
581vfmv_s_f        001101 1 00000 ..... 101 ..... 1010111 @r2
582vslideup_vx     001110 . ..... ..... 100 ..... 1010111 @r_vm
583vslideup_vi     001110 . ..... ..... 011 ..... 1010111 @r_vm
584vslide1up_vx    001110 . ..... ..... 110 ..... 1010111 @r_vm
585vslidedown_vx   001111 . ..... ..... 100 ..... 1010111 @r_vm
586vslidedown_vi   001111 . ..... ..... 011 ..... 1010111 @r_vm
587vslide1down_vx  001111 . ..... ..... 110 ..... 1010111 @r_vm
588vrgather_vv     001100 . ..... ..... 000 ..... 1010111 @r_vm
589vrgather_vx     001100 . ..... ..... 100 ..... 1010111 @r_vm
590vrgather_vi     001100 . ..... ..... 011 ..... 1010111 @r_vm
591vcompress_vm    010111 - ..... ..... 010 ..... 1010111 @r
592
593vsetvli         0 ........... ..... 111 ..... 1010111  @r2_zimm
594vsetvl          1000000 ..... ..... 111 ..... 1010111  @r
595