xref: /openbmc/qemu/target/riscv/insn32.decode (revision c30a0757)
1#
2# RISC-V translation routines for the RVXI Base Integer Instruction Set.
3#
4# Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de
5#                    Bastian Koppelmann, kbastian@mail.uni-paderborn.de
6#
7# This program is free software; you can redistribute it and/or modify it
8# under the terms and conditions of the GNU General Public License,
9# version 2 or later, as published by the Free Software Foundation.
10#
11# This program is distributed in the hope it will be useful, but WITHOUT
12# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14# more details.
15#
16# You should have received a copy of the GNU General Public License along with
17# this program.  If not, see <http://www.gnu.org/licenses/>.
18
19# Fields:
20%rs3       27:5
21%rs2       20:5
22%rs1       15:5
23%rd        7:5
24%sh5       20:5
25
26%sh10    20:10
27%csr    20:12
28%rm     12:3
29%nf     29:3                     !function=ex_plus_1
30
31# immediates:
32%imm_i    20:s12
33%imm_s    25:s7 7:5
34%imm_b    31:s1 7:1 25:6 8:4     !function=ex_shift_1
35%imm_j    31:s1 12:8 20:1 21:10  !function=ex_shift_1
36%imm_u    12:s20                 !function=ex_shift_12
37
38# Argument sets:
39&empty
40&b    imm rs2 rs1
41&i    imm rs1 rd
42&j    imm rd
43&r    rd rs1 rs2
44&s    imm rs1 rs2
45&u    imm rd
46&shift     shamt rs1 rd
47&atomic    aq rl rs2 rs1 rd
48&rmrr      vm rd rs1 rs2
49&rmr       vm rd rs2
50&rwdvm     vm wd rd rs1 rs2
51&r2nfvm    vm rd rs1 nf
52&rnfvm     vm rd rs1 rs2 nf
53
54# Formats 32:
55@r       .......   ..... ..... ... ..... ....... &r                %rs2 %rs1 %rd
56@i       ............    ..... ... ..... ....... &i      imm=%imm_i     %rs1 %rd
57@b       .......   ..... ..... ... ..... ....... &b      imm=%imm_b %rs2 %rs1
58@s       .......   ..... ..... ... ..... ....... &s      imm=%imm_s %rs2 %rs1
59@u       ....................      ..... ....... &u      imm=%imm_u          %rd
60@j       ....................      ..... ....... &j      imm=%imm_j          %rd
61
62@sh      ......  ...... .....  ... ..... ....... &shift  shamt=%sh10      %rs1 %rd
63@csr     ............   .....  ... ..... .......               %csr     %rs1 %rd
64
65@atom_ld ..... aq:1 rl:1 ..... ........ ..... ....... &atomic rs2=0     %rs1 %rd
66@atom_st ..... aq:1 rl:1 ..... ........ ..... ....... &atomic %rs2      %rs1 %rd
67
68@r4_rm   ..... ..  ..... ..... ... ..... ....... %rs3 %rs2 %rs1 %rm %rd
69@r_rm    .......   ..... ..... ... ..... ....... %rs2 %rs1 %rm %rd
70@r2_rm   .......   ..... ..... ... ..... ....... %rs1 %rm %rd
71@r2      .......   ..... ..... ... ..... ....... %rs1 %rd
72@r2_nfvm ... ... vm:1 ..... ..... ... ..... ....... &r2nfvm %nf %rs1 %rd
73@r2_vm   ...... vm:1 ..... ..... ... ..... ....... &rmr %rs2 %rd
74@r1_vm   ...... vm:1 ..... ..... ... ..... ....... %rd
75@r_nfvm  ... ... vm:1 ..... ..... ... ..... ....... &rnfvm %nf %rs2 %rs1 %rd
76@r2rd    .......   ..... ..... ... ..... ....... %rs2 %rd
77@r_vm    ...... vm:1 ..... ..... ... ..... ....... &rmrr %rs2 %rs1 %rd
78@r_vm_1  ...... . ..... ..... ... ..... .......    &rmrr vm=1 %rs2 %rs1 %rd
79@r_vm_0  ...... . ..... ..... ... ..... .......    &rmrr vm=0 %rs2 %rs1 %rd
80@r_wdvm  ..... wd:1 vm:1 ..... ..... ... ..... ....... &rwdvm %rs2 %rs1 %rd
81@r2_zimm . zimm:11  ..... ... ..... ....... %rs1 %rd
82@r2_s    .......   ..... ..... ... ..... ....... %rs2 %rs1
83
84@hfence_gvma ....... ..... .....   ... ..... ....... %rs2 %rs1
85@hfence_vvma ....... ..... .....   ... ..... ....... %rs2 %rs1
86
87@sfence_vma ....... ..... .....   ... ..... ....... %rs2 %rs1
88@sfence_vm  ....... ..... .....   ... ..... ....... %rs1
89
90# Formats 64:
91@sh5     .......  ..... .....  ... ..... ....... &shift  shamt=%sh5      %rs1 %rd
92
93# *** Privileged Instructions ***
94ecall       000000000000     00000 000 00000 1110011
95ebreak      000000000001     00000 000 00000 1110011
96uret        0000000    00010 00000 000 00000 1110011
97sret        0001000    00010 00000 000 00000 1110011
98mret        0011000    00010 00000 000 00000 1110011
99wfi         0001000    00101 00000 000 00000 1110011
100sfence_vma  0001001    ..... ..... 000 00000 1110011 @sfence_vma
101sfence_vm   0001000    00100 ..... 000 00000 1110011 @sfence_vm
102
103# *** RV32I Base Instruction Set ***
104lui      ....................       ..... 0110111 @u
105auipc    ....................       ..... 0010111 @u
106jal      ....................       ..... 1101111 @j
107jalr     ............     ..... 000 ..... 1100111 @i
108beq      ....... .....    ..... 000 ..... 1100011 @b
109bne      ....... .....    ..... 001 ..... 1100011 @b
110blt      ....... .....    ..... 100 ..... 1100011 @b
111bge      ....... .....    ..... 101 ..... 1100011 @b
112bltu     ....... .....    ..... 110 ..... 1100011 @b
113bgeu     ....... .....    ..... 111 ..... 1100011 @b
114lb       ............     ..... 000 ..... 0000011 @i
115lh       ............     ..... 001 ..... 0000011 @i
116lw       ............     ..... 010 ..... 0000011 @i
117lbu      ............     ..... 100 ..... 0000011 @i
118lhu      ............     ..... 101 ..... 0000011 @i
119sb       .......  .....   ..... 000 ..... 0100011 @s
120sh       .......  .....   ..... 001 ..... 0100011 @s
121sw       .......  .....   ..... 010 ..... 0100011 @s
122addi     ............     ..... 000 ..... 0010011 @i
123slti     ............     ..... 010 ..... 0010011 @i
124sltiu    ............     ..... 011 ..... 0010011 @i
125xori     ............     ..... 100 ..... 0010011 @i
126ori      ............     ..... 110 ..... 0010011 @i
127andi     ............     ..... 111 ..... 0010011 @i
128slli     00.... ......    ..... 001 ..... 0010011 @sh
129srli     00.... ......    ..... 101 ..... 0010011 @sh
130srai     01.... ......    ..... 101 ..... 0010011 @sh
131add      0000000 .....    ..... 000 ..... 0110011 @r
132sub      0100000 .....    ..... 000 ..... 0110011 @r
133sll      0000000 .....    ..... 001 ..... 0110011 @r
134slt      0000000 .....    ..... 010 ..... 0110011 @r
135sltu     0000000 .....    ..... 011 ..... 0110011 @r
136xor      0000000 .....    ..... 100 ..... 0110011 @r
137srl      0000000 .....    ..... 101 ..... 0110011 @r
138sra      0100000 .....    ..... 101 ..... 0110011 @r
139or       0000000 .....    ..... 110 ..... 0110011 @r
140and      0000000 .....    ..... 111 ..... 0110011 @r
141fence    ---- pred:4 succ:4 ----- 000 ----- 0001111
142fence_i  ---- ----   ----   ----- 001 ----- 0001111
143csrrw    ............     ..... 001 ..... 1110011 @csr
144csrrs    ............     ..... 010 ..... 1110011 @csr
145csrrc    ............     ..... 011 ..... 1110011 @csr
146csrrwi   ............     ..... 101 ..... 1110011 @csr
147csrrsi   ............     ..... 110 ..... 1110011 @csr
148csrrci   ............     ..... 111 ..... 1110011 @csr
149
150# *** RV64I Base Instruction Set (in addition to RV32I) ***
151lwu      ............   ..... 110 ..... 0000011 @i
152ld       ............   ..... 011 ..... 0000011 @i
153sd       ....... .....  ..... 011 ..... 0100011 @s
154addiw    ............   ..... 000 ..... 0011011 @i
155slliw    0000000 .....  ..... 001 ..... 0011011 @sh5
156srliw    0000000 .....  ..... 101 ..... 0011011 @sh5
157sraiw    0100000 .....  ..... 101 ..... 0011011 @sh5
158addw     0000000 .....  ..... 000 ..... 0111011 @r
159subw     0100000 .....  ..... 000 ..... 0111011 @r
160sllw     0000000 .....  ..... 001 ..... 0111011 @r
161srlw     0000000 .....  ..... 101 ..... 0111011 @r
162sraw     0100000 .....  ..... 101 ..... 0111011 @r
163
164# *** RV32M Standard Extension ***
165mul      0000001 .....  ..... 000 ..... 0110011 @r
166mulh     0000001 .....  ..... 001 ..... 0110011 @r
167mulhsu   0000001 .....  ..... 010 ..... 0110011 @r
168mulhu    0000001 .....  ..... 011 ..... 0110011 @r
169div      0000001 .....  ..... 100 ..... 0110011 @r
170divu     0000001 .....  ..... 101 ..... 0110011 @r
171rem      0000001 .....  ..... 110 ..... 0110011 @r
172remu     0000001 .....  ..... 111 ..... 0110011 @r
173
174# *** RV64M Standard Extension (in addition to RV32M) ***
175mulw     0000001 .....  ..... 000 ..... 0111011 @r
176divw     0000001 .....  ..... 100 ..... 0111011 @r
177divuw    0000001 .....  ..... 101 ..... 0111011 @r
178remw     0000001 .....  ..... 110 ..... 0111011 @r
179remuw    0000001 .....  ..... 111 ..... 0111011 @r
180
181# *** RV32A Standard Extension ***
182lr_w       00010 . . 00000 ..... 010 ..... 0101111 @atom_ld
183sc_w       00011 . . ..... ..... 010 ..... 0101111 @atom_st
184amoswap_w  00001 . . ..... ..... 010 ..... 0101111 @atom_st
185amoadd_w   00000 . . ..... ..... 010 ..... 0101111 @atom_st
186amoxor_w   00100 . . ..... ..... 010 ..... 0101111 @atom_st
187amoand_w   01100 . . ..... ..... 010 ..... 0101111 @atom_st
188amoor_w    01000 . . ..... ..... 010 ..... 0101111 @atom_st
189amomin_w   10000 . . ..... ..... 010 ..... 0101111 @atom_st
190amomax_w   10100 . . ..... ..... 010 ..... 0101111 @atom_st
191amominu_w  11000 . . ..... ..... 010 ..... 0101111 @atom_st
192amomaxu_w  11100 . . ..... ..... 010 ..... 0101111 @atom_st
193
194# *** RV64A Standard Extension (in addition to RV32A) ***
195lr_d       00010 . . 00000 ..... 011 ..... 0101111 @atom_ld
196sc_d       00011 . . ..... ..... 011 ..... 0101111 @atom_st
197amoswap_d  00001 . . ..... ..... 011 ..... 0101111 @atom_st
198amoadd_d   00000 . . ..... ..... 011 ..... 0101111 @atom_st
199amoxor_d   00100 . . ..... ..... 011 ..... 0101111 @atom_st
200amoand_d   01100 . . ..... ..... 011 ..... 0101111 @atom_st
201amoor_d    01000 . . ..... ..... 011 ..... 0101111 @atom_st
202amomin_d   10000 . . ..... ..... 011 ..... 0101111 @atom_st
203amomax_d   10100 . . ..... ..... 011 ..... 0101111 @atom_st
204amominu_d  11000 . . ..... ..... 011 ..... 0101111 @atom_st
205amomaxu_d  11100 . . ..... ..... 011 ..... 0101111 @atom_st
206
207# *** RV32F Standard Extension ***
208flw        ............   ..... 010 ..... 0000111 @i
209fsw        .......  ..... ..... 010 ..... 0100111 @s
210fmadd_s    ..... 00 ..... ..... ... ..... 1000011 @r4_rm
211fmsub_s    ..... 00 ..... ..... ... ..... 1000111 @r4_rm
212fnmsub_s   ..... 00 ..... ..... ... ..... 1001011 @r4_rm
213fnmadd_s   ..... 00 ..... ..... ... ..... 1001111 @r4_rm
214fadd_s     0000000  ..... ..... ... ..... 1010011 @r_rm
215fsub_s     0000100  ..... ..... ... ..... 1010011 @r_rm
216fmul_s     0001000  ..... ..... ... ..... 1010011 @r_rm
217fdiv_s     0001100  ..... ..... ... ..... 1010011 @r_rm
218fsqrt_s    0101100  00000 ..... ... ..... 1010011 @r2_rm
219fsgnj_s    0010000  ..... ..... 000 ..... 1010011 @r
220fsgnjn_s   0010000  ..... ..... 001 ..... 1010011 @r
221fsgnjx_s   0010000  ..... ..... 010 ..... 1010011 @r
222fmin_s     0010100  ..... ..... 000 ..... 1010011 @r
223fmax_s     0010100  ..... ..... 001 ..... 1010011 @r
224fcvt_w_s   1100000  00000 ..... ... ..... 1010011 @r2_rm
225fcvt_wu_s  1100000  00001 ..... ... ..... 1010011 @r2_rm
226fmv_x_w    1110000  00000 ..... 000 ..... 1010011 @r2
227feq_s      1010000  ..... ..... 010 ..... 1010011 @r
228flt_s      1010000  ..... ..... 001 ..... 1010011 @r
229fle_s      1010000  ..... ..... 000 ..... 1010011 @r
230fclass_s   1110000  00000 ..... 001 ..... 1010011 @r2
231fcvt_s_w   1101000  00000 ..... ... ..... 1010011 @r2_rm
232fcvt_s_wu  1101000  00001 ..... ... ..... 1010011 @r2_rm
233fmv_w_x    1111000  00000 ..... 000 ..... 1010011 @r2
234
235# *** RV64F Standard Extension (in addition to RV32F) ***
236fcvt_l_s   1100000  00010 ..... ... ..... 1010011 @r2_rm
237fcvt_lu_s  1100000  00011 ..... ... ..... 1010011 @r2_rm
238fcvt_s_l   1101000  00010 ..... ... ..... 1010011 @r2_rm
239fcvt_s_lu  1101000  00011 ..... ... ..... 1010011 @r2_rm
240
241# *** RV32D Standard Extension ***
242fld        ............   ..... 011 ..... 0000111 @i
243fsd        ....... .....  ..... 011 ..... 0100111 @s
244fmadd_d    ..... 01 ..... ..... ... ..... 1000011 @r4_rm
245fmsub_d    ..... 01 ..... ..... ... ..... 1000111 @r4_rm
246fnmsub_d   ..... 01 ..... ..... ... ..... 1001011 @r4_rm
247fnmadd_d   ..... 01 ..... ..... ... ..... 1001111 @r4_rm
248fadd_d     0000001  ..... ..... ... ..... 1010011 @r_rm
249fsub_d     0000101  ..... ..... ... ..... 1010011 @r_rm
250fmul_d     0001001  ..... ..... ... ..... 1010011 @r_rm
251fdiv_d     0001101  ..... ..... ... ..... 1010011 @r_rm
252fsqrt_d    0101101  00000 ..... ... ..... 1010011 @r2_rm
253fsgnj_d    0010001  ..... ..... 000 ..... 1010011 @r
254fsgnjn_d   0010001  ..... ..... 001 ..... 1010011 @r
255fsgnjx_d   0010001  ..... ..... 010 ..... 1010011 @r
256fmin_d     0010101  ..... ..... 000 ..... 1010011 @r
257fmax_d     0010101  ..... ..... 001 ..... 1010011 @r
258fcvt_s_d   0100000  00001 ..... ... ..... 1010011 @r2_rm
259fcvt_d_s   0100001  00000 ..... ... ..... 1010011 @r2_rm
260feq_d      1010001  ..... ..... 010 ..... 1010011 @r
261flt_d      1010001  ..... ..... 001 ..... 1010011 @r
262fle_d      1010001  ..... ..... 000 ..... 1010011 @r
263fclass_d   1110001  00000 ..... 001 ..... 1010011 @r2
264fcvt_w_d   1100001  00000 ..... ... ..... 1010011 @r2_rm
265fcvt_wu_d  1100001  00001 ..... ... ..... 1010011 @r2_rm
266fcvt_d_w   1101001  00000 ..... ... ..... 1010011 @r2_rm
267fcvt_d_wu  1101001  00001 ..... ... ..... 1010011 @r2_rm
268
269# *** RV64D Standard Extension (in addition to RV32D) ***
270fcvt_l_d   1100001  00010 ..... ... ..... 1010011 @r2_rm
271fcvt_lu_d  1100001  00011 ..... ... ..... 1010011 @r2_rm
272fmv_x_d    1110001  00000 ..... 000 ..... 1010011 @r2
273fcvt_d_l   1101001  00010 ..... ... ..... 1010011 @r2_rm
274fcvt_d_lu  1101001  00011 ..... ... ..... 1010011 @r2_rm
275fmv_d_x    1111001  00000 ..... 000 ..... 1010011 @r2
276
277# *** RV32H Base Instruction Set ***
278hlv_b       0110000  00000  ..... 100 ..... 1110011 @r2
279hlv_bu      0110000  00001  ..... 100 ..... 1110011 @r2
280hlv_h       0110010  00000  ..... 100 ..... 1110011 @r2
281hlv_hu      0110010  00001  ..... 100 ..... 1110011 @r2
282hlvx_hu     0110010  00011  ..... 100 ..... 1110011 @r2
283hlv_w       0110100  00000  ..... 100 ..... 1110011 @r2
284hlvx_wu     0110100  00011  ..... 100 ..... 1110011 @r2
285hsv_b       0110001  .....  ..... 100 00000 1110011 @r2_s
286hsv_h       0110011  .....  ..... 100 00000 1110011 @r2_s
287hsv_w       0110101  .....  ..... 100 00000 1110011 @r2_s
288hfence_gvma 0110001  .....  ..... 000 00000 1110011 @hfence_gvma
289hfence_vvma 0010001  .....  ..... 000 00000 1110011 @hfence_vvma
290
291# *** RV64H Base Instruction Set ***
292hlv_wu    0110100  00001   ..... 100 ..... 1110011 @r2
293hlv_d     0110110  00000   ..... 100 ..... 1110011 @r2
294hsv_d     0110111  .....   ..... 100 00000 1110011 @r2_s
295
296# *** Vector loads and stores are encoded within LOADFP/STORE-FP ***
297vlb_v      ... 100 . 00000 ..... 000 ..... 0000111 @r2_nfvm
298vlh_v      ... 100 . 00000 ..... 101 ..... 0000111 @r2_nfvm
299vlw_v      ... 100 . 00000 ..... 110 ..... 0000111 @r2_nfvm
300vle_v      ... 000 . 00000 ..... 111 ..... 0000111 @r2_nfvm
301vlbu_v     ... 000 . 00000 ..... 000 ..... 0000111 @r2_nfvm
302vlhu_v     ... 000 . 00000 ..... 101 ..... 0000111 @r2_nfvm
303vlwu_v     ... 000 . 00000 ..... 110 ..... 0000111 @r2_nfvm
304vlbff_v    ... 100 . 10000 ..... 000 ..... 0000111 @r2_nfvm
305vlhff_v    ... 100 . 10000 ..... 101 ..... 0000111 @r2_nfvm
306vlwff_v    ... 100 . 10000 ..... 110 ..... 0000111 @r2_nfvm
307vleff_v    ... 000 . 10000 ..... 111 ..... 0000111 @r2_nfvm
308vlbuff_v   ... 000 . 10000 ..... 000 ..... 0000111 @r2_nfvm
309vlhuff_v   ... 000 . 10000 ..... 101 ..... 0000111 @r2_nfvm
310vlwuff_v   ... 000 . 10000 ..... 110 ..... 0000111 @r2_nfvm
311vsb_v      ... 000 . 00000 ..... 000 ..... 0100111 @r2_nfvm
312vsh_v      ... 000 . 00000 ..... 101 ..... 0100111 @r2_nfvm
313vsw_v      ... 000 . 00000 ..... 110 ..... 0100111 @r2_nfvm
314vse_v      ... 000 . 00000 ..... 111 ..... 0100111 @r2_nfvm
315
316vlsb_v     ... 110 . ..... ..... 000 ..... 0000111 @r_nfvm
317vlsh_v     ... 110 . ..... ..... 101 ..... 0000111 @r_nfvm
318vlsw_v     ... 110 . ..... ..... 110 ..... 0000111 @r_nfvm
319vlse_v     ... 010 . ..... ..... 111 ..... 0000111 @r_nfvm
320vlsbu_v    ... 010 . ..... ..... 000 ..... 0000111 @r_nfvm
321vlshu_v    ... 010 . ..... ..... 101 ..... 0000111 @r_nfvm
322vlswu_v    ... 010 . ..... ..... 110 ..... 0000111 @r_nfvm
323vssb_v     ... 010 . ..... ..... 000 ..... 0100111 @r_nfvm
324vssh_v     ... 010 . ..... ..... 101 ..... 0100111 @r_nfvm
325vssw_v     ... 010 . ..... ..... 110 ..... 0100111 @r_nfvm
326vsse_v     ... 010 . ..... ..... 111 ..... 0100111 @r_nfvm
327
328vlxb_v     ... 111 . ..... ..... 000 ..... 0000111 @r_nfvm
329vlxh_v     ... 111 . ..... ..... 101 ..... 0000111 @r_nfvm
330vlxw_v     ... 111 . ..... ..... 110 ..... 0000111 @r_nfvm
331vlxe_v     ... 011 . ..... ..... 111 ..... 0000111 @r_nfvm
332vlxbu_v    ... 011 . ..... ..... 000 ..... 0000111 @r_nfvm
333vlxhu_v    ... 011 . ..... ..... 101 ..... 0000111 @r_nfvm
334vlxwu_v    ... 011 . ..... ..... 110 ..... 0000111 @r_nfvm
335# Vector ordered-indexed and unordered-indexed store insns.
336vsxb_v     ... -11 . ..... ..... 000 ..... 0100111 @r_nfvm
337vsxh_v     ... -11 . ..... ..... 101 ..... 0100111 @r_nfvm
338vsxw_v     ... -11 . ..... ..... 110 ..... 0100111 @r_nfvm
339vsxe_v     ... -11 . ..... ..... 111 ..... 0100111 @r_nfvm
340
341#*** Vector AMO operations are encoded under the standard AMO major opcode ***
342vamoswapw_v     00001 . . ..... ..... 110 ..... 0101111 @r_wdvm
343vamoaddw_v      00000 . . ..... ..... 110 ..... 0101111 @r_wdvm
344vamoxorw_v      00100 . . ..... ..... 110 ..... 0101111 @r_wdvm
345vamoandw_v      01100 . . ..... ..... 110 ..... 0101111 @r_wdvm
346vamoorw_v       01000 . . ..... ..... 110 ..... 0101111 @r_wdvm
347vamominw_v      10000 . . ..... ..... 110 ..... 0101111 @r_wdvm
348vamomaxw_v      10100 . . ..... ..... 110 ..... 0101111 @r_wdvm
349vamominuw_v     11000 . . ..... ..... 110 ..... 0101111 @r_wdvm
350vamomaxuw_v     11100 . . ..... ..... 110 ..... 0101111 @r_wdvm
351
352# *** new major opcode OP-V ***
353vadd_vv         000000 . ..... ..... 000 ..... 1010111 @r_vm
354vadd_vx         000000 . ..... ..... 100 ..... 1010111 @r_vm
355vadd_vi         000000 . ..... ..... 011 ..... 1010111 @r_vm
356vsub_vv         000010 . ..... ..... 000 ..... 1010111 @r_vm
357vsub_vx         000010 . ..... ..... 100 ..... 1010111 @r_vm
358vrsub_vx        000011 . ..... ..... 100 ..... 1010111 @r_vm
359vrsub_vi        000011 . ..... ..... 011 ..... 1010111 @r_vm
360vwaddu_vv       110000 . ..... ..... 010 ..... 1010111 @r_vm
361vwaddu_vx       110000 . ..... ..... 110 ..... 1010111 @r_vm
362vwadd_vv        110001 . ..... ..... 010 ..... 1010111 @r_vm
363vwadd_vx        110001 . ..... ..... 110 ..... 1010111 @r_vm
364vwsubu_vv       110010 . ..... ..... 010 ..... 1010111 @r_vm
365vwsubu_vx       110010 . ..... ..... 110 ..... 1010111 @r_vm
366vwsub_vv        110011 . ..... ..... 010 ..... 1010111 @r_vm
367vwsub_vx        110011 . ..... ..... 110 ..... 1010111 @r_vm
368vwaddu_wv       110100 . ..... ..... 010 ..... 1010111 @r_vm
369vwaddu_wx       110100 . ..... ..... 110 ..... 1010111 @r_vm
370vwadd_wv        110101 . ..... ..... 010 ..... 1010111 @r_vm
371vwadd_wx        110101 . ..... ..... 110 ..... 1010111 @r_vm
372vwsubu_wv       110110 . ..... ..... 010 ..... 1010111 @r_vm
373vwsubu_wx       110110 . ..... ..... 110 ..... 1010111 @r_vm
374vwsub_wv        110111 . ..... ..... 010 ..... 1010111 @r_vm
375vwsub_wx        110111 . ..... ..... 110 ..... 1010111 @r_vm
376vadc_vvm        010000 1 ..... ..... 000 ..... 1010111 @r_vm_1
377vadc_vxm        010000 1 ..... ..... 100 ..... 1010111 @r_vm_1
378vadc_vim        010000 1 ..... ..... 011 ..... 1010111 @r_vm_1
379vmadc_vvm       010001 1 ..... ..... 000 ..... 1010111 @r_vm_1
380vmadc_vxm       010001 1 ..... ..... 100 ..... 1010111 @r_vm_1
381vmadc_vim       010001 1 ..... ..... 011 ..... 1010111 @r_vm_1
382vsbc_vvm        010010 1 ..... ..... 000 ..... 1010111 @r_vm_1
383vsbc_vxm        010010 1 ..... ..... 100 ..... 1010111 @r_vm_1
384vmsbc_vvm       010011 1 ..... ..... 000 ..... 1010111 @r_vm_1
385vmsbc_vxm       010011 1 ..... ..... 100 ..... 1010111 @r_vm_1
386vand_vv         001001 . ..... ..... 000 ..... 1010111 @r_vm
387vand_vx         001001 . ..... ..... 100 ..... 1010111 @r_vm
388vand_vi         001001 . ..... ..... 011 ..... 1010111 @r_vm
389vor_vv          001010 . ..... ..... 000 ..... 1010111 @r_vm
390vor_vx          001010 . ..... ..... 100 ..... 1010111 @r_vm
391vor_vi          001010 . ..... ..... 011 ..... 1010111 @r_vm
392vxor_vv         001011 . ..... ..... 000 ..... 1010111 @r_vm
393vxor_vx         001011 . ..... ..... 100 ..... 1010111 @r_vm
394vxor_vi         001011 . ..... ..... 011 ..... 1010111 @r_vm
395vsll_vv         100101 . ..... ..... 000 ..... 1010111 @r_vm
396vsll_vx         100101 . ..... ..... 100 ..... 1010111 @r_vm
397vsll_vi         100101 . ..... ..... 011 ..... 1010111 @r_vm
398vsrl_vv         101000 . ..... ..... 000 ..... 1010111 @r_vm
399vsrl_vx         101000 . ..... ..... 100 ..... 1010111 @r_vm
400vsrl_vi         101000 . ..... ..... 011 ..... 1010111 @r_vm
401vsra_vv         101001 . ..... ..... 000 ..... 1010111 @r_vm
402vsra_vx         101001 . ..... ..... 100 ..... 1010111 @r_vm
403vsra_vi         101001 . ..... ..... 011 ..... 1010111 @r_vm
404vnsrl_vv        101100 . ..... ..... 000 ..... 1010111 @r_vm
405vnsrl_vx        101100 . ..... ..... 100 ..... 1010111 @r_vm
406vnsrl_vi        101100 . ..... ..... 011 ..... 1010111 @r_vm
407vnsra_vv        101101 . ..... ..... 000 ..... 1010111 @r_vm
408vnsra_vx        101101 . ..... ..... 100 ..... 1010111 @r_vm
409vnsra_vi        101101 . ..... ..... 011 ..... 1010111 @r_vm
410vmseq_vv        011000 . ..... ..... 000 ..... 1010111 @r_vm
411vmseq_vx        011000 . ..... ..... 100 ..... 1010111 @r_vm
412vmseq_vi        011000 . ..... ..... 011 ..... 1010111 @r_vm
413vmsne_vv        011001 . ..... ..... 000 ..... 1010111 @r_vm
414vmsne_vx        011001 . ..... ..... 100 ..... 1010111 @r_vm
415vmsne_vi        011001 . ..... ..... 011 ..... 1010111 @r_vm
416vmsltu_vv       011010 . ..... ..... 000 ..... 1010111 @r_vm
417vmsltu_vx       011010 . ..... ..... 100 ..... 1010111 @r_vm
418vmslt_vv        011011 . ..... ..... 000 ..... 1010111 @r_vm
419vmslt_vx        011011 . ..... ..... 100 ..... 1010111 @r_vm
420vmsleu_vv       011100 . ..... ..... 000 ..... 1010111 @r_vm
421vmsleu_vx       011100 . ..... ..... 100 ..... 1010111 @r_vm
422vmsleu_vi       011100 . ..... ..... 011 ..... 1010111 @r_vm
423vmsle_vv        011101 . ..... ..... 000 ..... 1010111 @r_vm
424vmsle_vx        011101 . ..... ..... 100 ..... 1010111 @r_vm
425vmsle_vi        011101 . ..... ..... 011 ..... 1010111 @r_vm
426vmsgtu_vx       011110 . ..... ..... 100 ..... 1010111 @r_vm
427vmsgtu_vi       011110 . ..... ..... 011 ..... 1010111 @r_vm
428vmsgt_vx        011111 . ..... ..... 100 ..... 1010111 @r_vm
429vmsgt_vi        011111 . ..... ..... 011 ..... 1010111 @r_vm
430vminu_vv        000100 . ..... ..... 000 ..... 1010111 @r_vm
431vminu_vx        000100 . ..... ..... 100 ..... 1010111 @r_vm
432vmin_vv         000101 . ..... ..... 000 ..... 1010111 @r_vm
433vmin_vx         000101 . ..... ..... 100 ..... 1010111 @r_vm
434vmaxu_vv        000110 . ..... ..... 000 ..... 1010111 @r_vm
435vmaxu_vx        000110 . ..... ..... 100 ..... 1010111 @r_vm
436vmax_vv         000111 . ..... ..... 000 ..... 1010111 @r_vm
437vmax_vx         000111 . ..... ..... 100 ..... 1010111 @r_vm
438vmul_vv         100101 . ..... ..... 010 ..... 1010111 @r_vm
439vmul_vx         100101 . ..... ..... 110 ..... 1010111 @r_vm
440vmulh_vv        100111 . ..... ..... 010 ..... 1010111 @r_vm
441vmulh_vx        100111 . ..... ..... 110 ..... 1010111 @r_vm
442vmulhu_vv       100100 . ..... ..... 010 ..... 1010111 @r_vm
443vmulhu_vx       100100 . ..... ..... 110 ..... 1010111 @r_vm
444vmulhsu_vv      100110 . ..... ..... 010 ..... 1010111 @r_vm
445vmulhsu_vx      100110 . ..... ..... 110 ..... 1010111 @r_vm
446vdivu_vv        100000 . ..... ..... 010 ..... 1010111 @r_vm
447vdivu_vx        100000 . ..... ..... 110 ..... 1010111 @r_vm
448vdiv_vv         100001 . ..... ..... 010 ..... 1010111 @r_vm
449vdiv_vx         100001 . ..... ..... 110 ..... 1010111 @r_vm
450vremu_vv        100010 . ..... ..... 010 ..... 1010111 @r_vm
451vremu_vx        100010 . ..... ..... 110 ..... 1010111 @r_vm
452vrem_vv         100011 . ..... ..... 010 ..... 1010111 @r_vm
453vrem_vx         100011 . ..... ..... 110 ..... 1010111 @r_vm
454vwmulu_vv       111000 . ..... ..... 010 ..... 1010111 @r_vm
455vwmulu_vx       111000 . ..... ..... 110 ..... 1010111 @r_vm
456vwmulsu_vv      111010 . ..... ..... 010 ..... 1010111 @r_vm
457vwmulsu_vx      111010 . ..... ..... 110 ..... 1010111 @r_vm
458vwmul_vv        111011 . ..... ..... 010 ..... 1010111 @r_vm
459vwmul_vx        111011 . ..... ..... 110 ..... 1010111 @r_vm
460vmacc_vv        101101 . ..... ..... 010 ..... 1010111 @r_vm
461vmacc_vx        101101 . ..... ..... 110 ..... 1010111 @r_vm
462vnmsac_vv       101111 . ..... ..... 010 ..... 1010111 @r_vm
463vnmsac_vx       101111 . ..... ..... 110 ..... 1010111 @r_vm
464vmadd_vv        101001 . ..... ..... 010 ..... 1010111 @r_vm
465vmadd_vx        101001 . ..... ..... 110 ..... 1010111 @r_vm
466vnmsub_vv       101011 . ..... ..... 010 ..... 1010111 @r_vm
467vnmsub_vx       101011 . ..... ..... 110 ..... 1010111 @r_vm
468vwmaccu_vv      111100 . ..... ..... 010 ..... 1010111 @r_vm
469vwmaccu_vx      111100 . ..... ..... 110 ..... 1010111 @r_vm
470vwmacc_vv       111101 . ..... ..... 010 ..... 1010111 @r_vm
471vwmacc_vx       111101 . ..... ..... 110 ..... 1010111 @r_vm
472vwmaccsu_vv     111110 . ..... ..... 010 ..... 1010111 @r_vm
473vwmaccsu_vx     111110 . ..... ..... 110 ..... 1010111 @r_vm
474vwmaccus_vx     111111 . ..... ..... 110 ..... 1010111 @r_vm
475vmv_v_v         010111 1 00000 ..... 000 ..... 1010111 @r2
476vmv_v_x         010111 1 00000 ..... 100 ..... 1010111 @r2
477vmv_v_i         010111 1 00000 ..... 011 ..... 1010111 @r2
478vmerge_vvm      010111 0 ..... ..... 000 ..... 1010111 @r_vm_0
479vmerge_vxm      010111 0 ..... ..... 100 ..... 1010111 @r_vm_0
480vmerge_vim      010111 0 ..... ..... 011 ..... 1010111 @r_vm_0
481vsaddu_vv       100000 . ..... ..... 000 ..... 1010111 @r_vm
482vsaddu_vx       100000 . ..... ..... 100 ..... 1010111 @r_vm
483vsaddu_vi       100000 . ..... ..... 011 ..... 1010111 @r_vm
484vsadd_vv        100001 . ..... ..... 000 ..... 1010111 @r_vm
485vsadd_vx        100001 . ..... ..... 100 ..... 1010111 @r_vm
486vsadd_vi        100001 . ..... ..... 011 ..... 1010111 @r_vm
487vssubu_vv       100010 . ..... ..... 000 ..... 1010111 @r_vm
488vssubu_vx       100010 . ..... ..... 100 ..... 1010111 @r_vm
489vssub_vv        100011 . ..... ..... 000 ..... 1010111 @r_vm
490vssub_vx        100011 . ..... ..... 100 ..... 1010111 @r_vm
491vaadd_vv        100100 . ..... ..... 000 ..... 1010111 @r_vm
492vaadd_vx        100100 . ..... ..... 100 ..... 1010111 @r_vm
493vaadd_vi        100100 . ..... ..... 011 ..... 1010111 @r_vm
494vasub_vv        100110 . ..... ..... 000 ..... 1010111 @r_vm
495vasub_vx        100110 . ..... ..... 100 ..... 1010111 @r_vm
496vsmul_vv        100111 . ..... ..... 000 ..... 1010111 @r_vm
497vsmul_vx        100111 . ..... ..... 100 ..... 1010111 @r_vm
498vwsmaccu_vv     111100 . ..... ..... 000 ..... 1010111 @r_vm
499vwsmaccu_vx     111100 . ..... ..... 100 ..... 1010111 @r_vm
500vwsmacc_vv      111101 . ..... ..... 000 ..... 1010111 @r_vm
501vwsmacc_vx      111101 . ..... ..... 100 ..... 1010111 @r_vm
502vwsmaccsu_vv    111110 . ..... ..... 000 ..... 1010111 @r_vm
503vwsmaccsu_vx    111110 . ..... ..... 100 ..... 1010111 @r_vm
504vwsmaccus_vx    111111 . ..... ..... 100 ..... 1010111 @r_vm
505vssrl_vv        101010 . ..... ..... 000 ..... 1010111 @r_vm
506vssrl_vx        101010 . ..... ..... 100 ..... 1010111 @r_vm
507vssrl_vi        101010 . ..... ..... 011 ..... 1010111 @r_vm
508vssra_vv        101011 . ..... ..... 000 ..... 1010111 @r_vm
509vssra_vx        101011 . ..... ..... 100 ..... 1010111 @r_vm
510vssra_vi        101011 . ..... ..... 011 ..... 1010111 @r_vm
511vnclipu_vv      101110 . ..... ..... 000 ..... 1010111 @r_vm
512vnclipu_vx      101110 . ..... ..... 100 ..... 1010111 @r_vm
513vnclipu_vi      101110 . ..... ..... 011 ..... 1010111 @r_vm
514vnclip_vv       101111 . ..... ..... 000 ..... 1010111 @r_vm
515vnclip_vx       101111 . ..... ..... 100 ..... 1010111 @r_vm
516vnclip_vi       101111 . ..... ..... 011 ..... 1010111 @r_vm
517vfadd_vv        000000 . ..... ..... 001 ..... 1010111 @r_vm
518vfadd_vf        000000 . ..... ..... 101 ..... 1010111 @r_vm
519vfsub_vv        000010 . ..... ..... 001 ..... 1010111 @r_vm
520vfsub_vf        000010 . ..... ..... 101 ..... 1010111 @r_vm
521vfrsub_vf       100111 . ..... ..... 101 ..... 1010111 @r_vm
522vfwadd_vv       110000 . ..... ..... 001 ..... 1010111 @r_vm
523vfwadd_vf       110000 . ..... ..... 101 ..... 1010111 @r_vm
524vfwadd_wv       110100 . ..... ..... 001 ..... 1010111 @r_vm
525vfwadd_wf       110100 . ..... ..... 101 ..... 1010111 @r_vm
526vfwsub_vv       110010 . ..... ..... 001 ..... 1010111 @r_vm
527vfwsub_vf       110010 . ..... ..... 101 ..... 1010111 @r_vm
528vfwsub_wv       110110 . ..... ..... 001 ..... 1010111 @r_vm
529vfwsub_wf       110110 . ..... ..... 101 ..... 1010111 @r_vm
530vfmul_vv        100100 . ..... ..... 001 ..... 1010111 @r_vm
531vfmul_vf        100100 . ..... ..... 101 ..... 1010111 @r_vm
532vfdiv_vv        100000 . ..... ..... 001 ..... 1010111 @r_vm
533vfdiv_vf        100000 . ..... ..... 101 ..... 1010111 @r_vm
534vfrdiv_vf       100001 . ..... ..... 101 ..... 1010111 @r_vm
535vfwmul_vv       111000 . ..... ..... 001 ..... 1010111 @r_vm
536vfwmul_vf       111000 . ..... ..... 101 ..... 1010111 @r_vm
537vfmacc_vv       101100 . ..... ..... 001 ..... 1010111 @r_vm
538vfnmacc_vv      101101 . ..... ..... 001 ..... 1010111 @r_vm
539vfnmacc_vf      101101 . ..... ..... 101 ..... 1010111 @r_vm
540vfmacc_vf       101100 . ..... ..... 101 ..... 1010111 @r_vm
541vfmsac_vv       101110 . ..... ..... 001 ..... 1010111 @r_vm
542vfmsac_vf       101110 . ..... ..... 101 ..... 1010111 @r_vm
543vfnmsac_vv      101111 . ..... ..... 001 ..... 1010111 @r_vm
544vfnmsac_vf      101111 . ..... ..... 101 ..... 1010111 @r_vm
545vfmadd_vv       101000 . ..... ..... 001 ..... 1010111 @r_vm
546vfmadd_vf       101000 . ..... ..... 101 ..... 1010111 @r_vm
547vfnmadd_vv      101001 . ..... ..... 001 ..... 1010111 @r_vm
548vfnmadd_vf      101001 . ..... ..... 101 ..... 1010111 @r_vm
549vfmsub_vv       101010 . ..... ..... 001 ..... 1010111 @r_vm
550vfmsub_vf       101010 . ..... ..... 101 ..... 1010111 @r_vm
551vfnmsub_vv      101011 . ..... ..... 001 ..... 1010111 @r_vm
552vfnmsub_vf      101011 . ..... ..... 101 ..... 1010111 @r_vm
553vfwmacc_vv      111100 . ..... ..... 001 ..... 1010111 @r_vm
554vfwmacc_vf      111100 . ..... ..... 101 ..... 1010111 @r_vm
555vfwnmacc_vv     111101 . ..... ..... 001 ..... 1010111 @r_vm
556vfwnmacc_vf     111101 . ..... ..... 101 ..... 1010111 @r_vm
557vfwmsac_vv      111110 . ..... ..... 001 ..... 1010111 @r_vm
558vfwmsac_vf      111110 . ..... ..... 101 ..... 1010111 @r_vm
559vfwnmsac_vv     111111 . ..... ..... 001 ..... 1010111 @r_vm
560vfwnmsac_vf     111111 . ..... ..... 101 ..... 1010111 @r_vm
561vfsqrt_v        100011 . ..... 00000 001 ..... 1010111 @r2_vm
562vfmin_vv        000100 . ..... ..... 001 ..... 1010111 @r_vm
563vfmin_vf        000100 . ..... ..... 101 ..... 1010111 @r_vm
564vfmax_vv        000110 . ..... ..... 001 ..... 1010111 @r_vm
565vfmax_vf        000110 . ..... ..... 101 ..... 1010111 @r_vm
566vfsgnj_vv       001000 . ..... ..... 001 ..... 1010111 @r_vm
567vfsgnj_vf       001000 . ..... ..... 101 ..... 1010111 @r_vm
568vfsgnjn_vv      001001 . ..... ..... 001 ..... 1010111 @r_vm
569vfsgnjn_vf      001001 . ..... ..... 101 ..... 1010111 @r_vm
570vfsgnjx_vv      001010 . ..... ..... 001 ..... 1010111 @r_vm
571vfsgnjx_vf      001010 . ..... ..... 101 ..... 1010111 @r_vm
572vmfeq_vv        011000 . ..... ..... 001 ..... 1010111 @r_vm
573vmfeq_vf        011000 . ..... ..... 101 ..... 1010111 @r_vm
574vmfne_vv        011100 . ..... ..... 001 ..... 1010111 @r_vm
575vmfne_vf        011100 . ..... ..... 101 ..... 1010111 @r_vm
576vmflt_vv        011011 . ..... ..... 001 ..... 1010111 @r_vm
577vmflt_vf        011011 . ..... ..... 101 ..... 1010111 @r_vm
578vmfle_vv        011001 . ..... ..... 001 ..... 1010111 @r_vm
579vmfle_vf        011001 . ..... ..... 101 ..... 1010111 @r_vm
580vmfgt_vf        011101 . ..... ..... 101 ..... 1010111 @r_vm
581vmfge_vf        011111 . ..... ..... 101 ..... 1010111 @r_vm
582vmford_vv       011010 . ..... ..... 001 ..... 1010111 @r_vm
583vmford_vf       011010 . ..... ..... 101 ..... 1010111 @r_vm
584vfclass_v       100011 . ..... 10000 001 ..... 1010111 @r2_vm
585vfmerge_vfm     010111 0 ..... ..... 101 ..... 1010111 @r_vm_0
586vfmv_v_f        010111 1 00000 ..... 101 ..... 1010111 @r2
587vfcvt_xu_f_v    100010 . ..... 00000 001 ..... 1010111 @r2_vm
588vfcvt_x_f_v     100010 . ..... 00001 001 ..... 1010111 @r2_vm
589vfcvt_f_xu_v    100010 . ..... 00010 001 ..... 1010111 @r2_vm
590vfcvt_f_x_v     100010 . ..... 00011 001 ..... 1010111 @r2_vm
591vfwcvt_xu_f_v   100010 . ..... 01000 001 ..... 1010111 @r2_vm
592vfwcvt_x_f_v    100010 . ..... 01001 001 ..... 1010111 @r2_vm
593vfwcvt_f_xu_v   100010 . ..... 01010 001 ..... 1010111 @r2_vm
594vfwcvt_f_x_v    100010 . ..... 01011 001 ..... 1010111 @r2_vm
595vfwcvt_f_f_v    100010 . ..... 01100 001 ..... 1010111 @r2_vm
596vfncvt_xu_f_v   100010 . ..... 10000 001 ..... 1010111 @r2_vm
597vfncvt_x_f_v    100010 . ..... 10001 001 ..... 1010111 @r2_vm
598vfncvt_f_xu_v   100010 . ..... 10010 001 ..... 1010111 @r2_vm
599vfncvt_f_x_v    100010 . ..... 10011 001 ..... 1010111 @r2_vm
600vfncvt_f_f_v    100010 . ..... 10100 001 ..... 1010111 @r2_vm
601vredsum_vs      000000 . ..... ..... 010 ..... 1010111 @r_vm
602vredand_vs      000001 . ..... ..... 010 ..... 1010111 @r_vm
603vredor_vs       000010 . ..... ..... 010 ..... 1010111 @r_vm
604vredxor_vs      000011 . ..... ..... 010 ..... 1010111 @r_vm
605vredminu_vs     000100 . ..... ..... 010 ..... 1010111 @r_vm
606vredmin_vs      000101 . ..... ..... 010 ..... 1010111 @r_vm
607vredmaxu_vs     000110 . ..... ..... 010 ..... 1010111 @r_vm
608vredmax_vs      000111 . ..... ..... 010 ..... 1010111 @r_vm
609vwredsumu_vs    110000 . ..... ..... 000 ..... 1010111 @r_vm
610vwredsum_vs     110001 . ..... ..... 000 ..... 1010111 @r_vm
611# Vector ordered and unordered reduction sum
612vfredsum_vs     0000-1 . ..... ..... 001 ..... 1010111 @r_vm
613vfredmin_vs     000101 . ..... ..... 001 ..... 1010111 @r_vm
614vfredmax_vs     000111 . ..... ..... 001 ..... 1010111 @r_vm
615# Vector widening ordered and unordered float reduction sum
616vfwredsum_vs    1100-1 . ..... ..... 001 ..... 1010111 @r_vm
617vmand_mm        011001 - ..... ..... 010 ..... 1010111 @r
618vmnand_mm       011101 - ..... ..... 010 ..... 1010111 @r
619vmandnot_mm     011000 - ..... ..... 010 ..... 1010111 @r
620vmxor_mm        011011 - ..... ..... 010 ..... 1010111 @r
621vmor_mm         011010 - ..... ..... 010 ..... 1010111 @r
622vmnor_mm        011110 - ..... ..... 010 ..... 1010111 @r
623vmornot_mm      011100 - ..... ..... 010 ..... 1010111 @r
624vmxnor_mm       011111 - ..... ..... 010 ..... 1010111 @r
625vmpopc_m        010100 . ..... ----- 010 ..... 1010111 @r2_vm
626vmfirst_m       010101 . ..... ----- 010 ..... 1010111 @r2_vm
627vmsbf_m         010110 . ..... 00001 010 ..... 1010111 @r2_vm
628vmsif_m         010110 . ..... 00011 010 ..... 1010111 @r2_vm
629vmsof_m         010110 . ..... 00010 010 ..... 1010111 @r2_vm
630viota_m         010110 . ..... 10000 010 ..... 1010111 @r2_vm
631vid_v           010110 . 00000 10001 010 ..... 1010111 @r1_vm
632vext_x_v        001100 1 ..... ..... 010 ..... 1010111 @r
633vmv_s_x         001101 1 00000 ..... 110 ..... 1010111 @r2
634vfmv_f_s        001100 1 ..... 00000 001 ..... 1010111 @r2rd
635vfmv_s_f        001101 1 00000 ..... 101 ..... 1010111 @r2
636vslideup_vx     001110 . ..... ..... 100 ..... 1010111 @r_vm
637vslideup_vi     001110 . ..... ..... 011 ..... 1010111 @r_vm
638vslide1up_vx    001110 . ..... ..... 110 ..... 1010111 @r_vm
639vslidedown_vx   001111 . ..... ..... 100 ..... 1010111 @r_vm
640vslidedown_vi   001111 . ..... ..... 011 ..... 1010111 @r_vm
641vslide1down_vx  001111 . ..... ..... 110 ..... 1010111 @r_vm
642vrgather_vv     001100 . ..... ..... 000 ..... 1010111 @r_vm
643vrgather_vx     001100 . ..... ..... 100 ..... 1010111 @r_vm
644vrgather_vi     001100 . ..... ..... 011 ..... 1010111 @r_vm
645vcompress_vm    010111 - ..... ..... 010 ..... 1010111 @r
646
647vsetvli         0 ........... ..... 111 ..... 1010111  @r2_zimm
648vsetvl          1000000 ..... ..... 111 ..... 1010111  @r
649
650#*** Vector AMO operations (in addition to Zvamo) ***
651vamoswapd_v     00001 . . ..... ..... 111 ..... 0101111 @r_wdvm
652vamoaddd_v      00000 . . ..... ..... 111 ..... 0101111 @r_wdvm
653vamoxord_v      00100 . . ..... ..... 111 ..... 0101111 @r_wdvm
654vamoandd_v      01100 . . ..... ..... 111 ..... 0101111 @r_wdvm
655vamoord_v       01000 . . ..... ..... 111 ..... 0101111 @r_wdvm
656vamomind_v      10000 . . ..... ..... 111 ..... 0101111 @r_wdvm
657vamomaxd_v      10100 . . ..... ..... 111 ..... 0101111 @r_wdvm
658vamominud_v     11000 . . ..... ..... 111 ..... 0101111 @r_wdvm
659vamomaxud_v     11100 . . ..... ..... 111 ..... 0101111 @r_wdvm
660