1# 2# RISC-V translation routines for the RVXI Base Integer Instruction Set. 3# 4# Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de 5# Bastian Koppelmann, kbastian@mail.uni-paderborn.de 6# 7# This program is free software; you can redistribute it and/or modify it 8# under the terms and conditions of the GNU General Public License, 9# version 2 or later, as published by the Free Software Foundation. 10# 11# This program is distributed in the hope it will be useful, but WITHOUT 12# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14# more details. 15# 16# You should have received a copy of the GNU General Public License along with 17# this program. If not, see <http://www.gnu.org/licenses/>. 18 19# Fields: 20%rs3 27:5 21%rs2 20:5 22%rs1 15:5 23%rd 7:5 24%sh5 20:5 25%sh6 20:6 26 27%sh7 20:7 28%csr 20:12 29%rm 12:3 30%nf 29:3 !function=ex_plus_1 31 32# immediates: 33%imm_i 20:s12 34%imm_s 25:s7 7:5 35%imm_b 31:s1 7:1 25:6 8:4 !function=ex_shift_1 36%imm_j 31:s1 12:8 20:1 21:10 !function=ex_shift_1 37%imm_u 12:s20 !function=ex_shift_12 38%imm_bs 30:2 !function=ex_shift_3 39%imm_rnum 20:4 40 41# Argument sets: 42&empty 43&b imm rs2 rs1 44&i imm rs1 rd 45&j imm rd 46&r rd rs1 rs2 47&r2 rd rs1 48&r2_s rs1 rs2 49&s imm rs1 rs2 50&u imm rd 51&shift shamt rs1 rd 52&atomic aq rl rs2 rs1 rd 53&rmrr vm rd rs1 rs2 54&rmr vm rd rs2 55&r2nfvm vm rd rs1 nf 56&rnfvm vm rd rs1 rs2 nf 57&k_aes shamt rs2 rs1 rd 58 59# Formats 32: 60@r ....... ..... ..... ... ..... ....... &r %rs2 %rs1 %rd 61@i ............ ..... ... ..... ....... &i imm=%imm_i %rs1 %rd 62@b ....... ..... ..... ... ..... ....... &b imm=%imm_b %rs2 %rs1 63@s ....... ..... ..... ... ..... ....... &s imm=%imm_s %rs2 %rs1 64@u .................... ..... ....... &u imm=%imm_u %rd 65@j .................... ..... ....... &j imm=%imm_j %rd 66 67@sh ...... ...... ..... ... ..... ....... &shift shamt=%sh7 %rs1 %rd 68@csr ............ ..... ... ..... ....... %csr %rs1 %rd 69 70@atom_ld ..... aq:1 rl:1 ..... ........ ..... ....... &atomic rs2=0 %rs1 %rd 71@atom_st ..... aq:1 rl:1 ..... ........ ..... ....... &atomic %rs2 %rs1 %rd 72 73@r4_rm ..... .. ..... ..... ... ..... ....... %rs3 %rs2 %rs1 %rm %rd 74@r_rm ....... ..... ..... ... ..... ....... %rs2 %rs1 %rm %rd 75@r2_rm ....... ..... ..... ... ..... ....... %rs1 %rm %rd 76@r2 ....... ..... ..... ... ..... ....... &r2 %rs1 %rd 77@r2_nfvm ... ... vm:1 ..... ..... ... ..... ....... &r2nfvm %nf %rs1 %rd 78@r2_vm ...... vm:1 ..... ..... ... ..... ....... &rmr %rs2 %rd 79@r1_vm ...... vm:1 ..... ..... ... ..... ....... %rd 80@r_nfvm ... ... vm:1 ..... ..... ... ..... ....... &rnfvm %nf %rs2 %rs1 %rd 81@r2rd ....... ..... ..... ... ..... ....... %rs2 %rd 82@r_vm ...... vm:1 ..... ..... ... ..... ....... &rmrr %rs2 %rs1 %rd 83@r_vm_1 ...... . ..... ..... ... ..... ....... &rmrr vm=1 %rs2 %rs1 %rd 84@r_vm_0 ...... . ..... ..... ... ..... ....... &rmrr vm=0 %rs2 %rs1 %rd 85@r2_zimm11 . zimm:11 ..... ... ..... ....... %rs1 %rd 86@r2_zimm10 .. zimm:10 ..... ... ..... ....... %rs1 %rd 87@r2_s ....... ..... ..... ... ..... ....... %rs2 %rs1 88 89@hfence_gvma ....... ..... ..... ... ..... ....... %rs2 %rs1 90@hfence_vvma ....... ..... ..... ... ..... ....... %rs2 %rs1 91 92@sfence_vma ....... ..... ..... ... ..... ....... %rs2 %rs1 93@sfence_vm ....... ..... ..... ... ..... ....... %rs1 94 95@k_aes .. ..... ..... ..... ... ..... ....... &k_aes shamt=%imm_bs %rs2 %rs1 %rd 96@i_aes .. ..... ..... ..... ... ..... ....... &i imm=%imm_rnum %rs1 %rd 97 98# Formats 64: 99@sh5 ....... ..... ..... ... ..... ....... &shift shamt=%sh5 %rs1 %rd 100 101# Formats 128: 102@sh6 ...... ...... ..... ... ..... ....... &shift shamt=%sh6 %rs1 %rd 103 104# *** Privileged Instructions *** 105ecall 000000000000 00000 000 00000 1110011 106ebreak 000000000001 00000 000 00000 1110011 107uret 0000000 00010 00000 000 00000 1110011 108sret 0001000 00010 00000 000 00000 1110011 109mret 0011000 00010 00000 000 00000 1110011 110wfi 0001000 00101 00000 000 00000 1110011 111sfence_vma 0001001 ..... ..... 000 00000 1110011 @sfence_vma 112sfence_vm 0001000 00100 ..... 000 00000 1110011 @sfence_vm 113 114# *** RV32I Base Instruction Set *** 115lui .................... ..... 0110111 @u 116auipc .................... ..... 0010111 @u 117jal .................... ..... 1101111 @j 118jalr ............ ..... 000 ..... 1100111 @i 119beq ....... ..... ..... 000 ..... 1100011 @b 120bne ....... ..... ..... 001 ..... 1100011 @b 121blt ....... ..... ..... 100 ..... 1100011 @b 122bge ....... ..... ..... 101 ..... 1100011 @b 123bltu ....... ..... ..... 110 ..... 1100011 @b 124bgeu ....... ..... ..... 111 ..... 1100011 @b 125lb ............ ..... 000 ..... 0000011 @i 126lh ............ ..... 001 ..... 0000011 @i 127lw ............ ..... 010 ..... 0000011 @i 128lbu ............ ..... 100 ..... 0000011 @i 129lhu ............ ..... 101 ..... 0000011 @i 130sb ....... ..... ..... 000 ..... 0100011 @s 131sh ....... ..... ..... 001 ..... 0100011 @s 132sw ....... ..... ..... 010 ..... 0100011 @s 133addi ............ ..... 000 ..... 0010011 @i 134slti ............ ..... 010 ..... 0010011 @i 135sltiu ............ ..... 011 ..... 0010011 @i 136xori ............ ..... 100 ..... 0010011 @i 137ori ............ ..... 110 ..... 0010011 @i 138andi ............ ..... 111 ..... 0010011 @i 139slli 00000. ...... ..... 001 ..... 0010011 @sh 140srli 00000. ...... ..... 101 ..... 0010011 @sh 141srai 01000. ...... ..... 101 ..... 0010011 @sh 142add 0000000 ..... ..... 000 ..... 0110011 @r 143sub 0100000 ..... ..... 000 ..... 0110011 @r 144sll 0000000 ..... ..... 001 ..... 0110011 @r 145slt 0000000 ..... ..... 010 ..... 0110011 @r 146sltu 0000000 ..... ..... 011 ..... 0110011 @r 147xor 0000000 ..... ..... 100 ..... 0110011 @r 148srl 0000000 ..... ..... 101 ..... 0110011 @r 149sra 0100000 ..... ..... 101 ..... 0110011 @r 150or 0000000 ..... ..... 110 ..... 0110011 @r 151and 0000000 ..... ..... 111 ..... 0110011 @r 152 153{ 154 pause 0000 0001 0000 00000 000 00000 0001111 155 fence ---- pred:4 succ:4 ----- 000 ----- 0001111 156} 157 158fence_i ---- ---- ---- ----- 001 ----- 0001111 159csrrw ............ ..... 001 ..... 1110011 @csr 160csrrs ............ ..... 010 ..... 1110011 @csr 161csrrc ............ ..... 011 ..... 1110011 @csr 162csrrwi ............ ..... 101 ..... 1110011 @csr 163csrrsi ............ ..... 110 ..... 1110011 @csr 164csrrci ............ ..... 111 ..... 1110011 @csr 165 166# *** RV64I Base Instruction Set (in addition to RV32I) *** 167lwu ............ ..... 110 ..... 0000011 @i 168ld ............ ..... 011 ..... 0000011 @i 169sd ....... ..... ..... 011 ..... 0100011 @s 170addiw ............ ..... 000 ..... 0011011 @i 171slliw 0000000 ..... ..... 001 ..... 0011011 @sh5 172srliw 0000000 ..... ..... 101 ..... 0011011 @sh5 173sraiw 0100000 ..... ..... 101 ..... 0011011 @sh5 174addw 0000000 ..... ..... 000 ..... 0111011 @r 175subw 0100000 ..... ..... 000 ..... 0111011 @r 176sllw 0000000 ..... ..... 001 ..... 0111011 @r 177srlw 0000000 ..... ..... 101 ..... 0111011 @r 178sraw 0100000 ..... ..... 101 ..... 0111011 @r 179 180# *** RV128I Base Instruction Set (in addition to RV64I) *** 181ldu ............ ..... 111 ..... 0000011 @i 182lq ............ ..... 010 ..... 0001111 @i 183sq ............ ..... 100 ..... 0100011 @s 184addid ............ ..... 000 ..... 1011011 @i 185sllid 000000 ...... ..... 001 ..... 1011011 @sh6 186srlid 000000 ...... ..... 101 ..... 1011011 @sh6 187sraid 010000 ...... ..... 101 ..... 1011011 @sh6 188addd 0000000 ..... ..... 000 ..... 1111011 @r 189subd 0100000 ..... ..... 000 ..... 1111011 @r 190slld 0000000 ..... ..... 001 ..... 1111011 @r 191srld 0000000 ..... ..... 101 ..... 1111011 @r 192srad 0100000 ..... ..... 101 ..... 1111011 @r 193 194# *** RV32M Standard Extension *** 195mul 0000001 ..... ..... 000 ..... 0110011 @r 196mulh 0000001 ..... ..... 001 ..... 0110011 @r 197mulhsu 0000001 ..... ..... 010 ..... 0110011 @r 198mulhu 0000001 ..... ..... 011 ..... 0110011 @r 199div 0000001 ..... ..... 100 ..... 0110011 @r 200divu 0000001 ..... ..... 101 ..... 0110011 @r 201rem 0000001 ..... ..... 110 ..... 0110011 @r 202remu 0000001 ..... ..... 111 ..... 0110011 @r 203 204# *** RV64M Standard Extension (in addition to RV32M) *** 205mulw 0000001 ..... ..... 000 ..... 0111011 @r 206divw 0000001 ..... ..... 100 ..... 0111011 @r 207divuw 0000001 ..... ..... 101 ..... 0111011 @r 208remw 0000001 ..... ..... 110 ..... 0111011 @r 209remuw 0000001 ..... ..... 111 ..... 0111011 @r 210 211# *** RV128M Standard Extension (in addition to RV64M) *** 212muld 0000001 ..... ..... 000 ..... 1111011 @r 213divd 0000001 ..... ..... 100 ..... 1111011 @r 214divud 0000001 ..... ..... 101 ..... 1111011 @r 215remd 0000001 ..... ..... 110 ..... 1111011 @r 216remud 0000001 ..... ..... 111 ..... 1111011 @r 217 218# *** RV32A Standard Extension *** 219lr_w 00010 . . 00000 ..... 010 ..... 0101111 @atom_ld 220sc_w 00011 . . ..... ..... 010 ..... 0101111 @atom_st 221amoswap_w 00001 . . ..... ..... 010 ..... 0101111 @atom_st 222amoadd_w 00000 . . ..... ..... 010 ..... 0101111 @atom_st 223amoxor_w 00100 . . ..... ..... 010 ..... 0101111 @atom_st 224amoand_w 01100 . . ..... ..... 010 ..... 0101111 @atom_st 225amoor_w 01000 . . ..... ..... 010 ..... 0101111 @atom_st 226amomin_w 10000 . . ..... ..... 010 ..... 0101111 @atom_st 227amomax_w 10100 . . ..... ..... 010 ..... 0101111 @atom_st 228amominu_w 11000 . . ..... ..... 010 ..... 0101111 @atom_st 229amomaxu_w 11100 . . ..... ..... 010 ..... 0101111 @atom_st 230 231# *** RV64A Standard Extension (in addition to RV32A) *** 232lr_d 00010 . . 00000 ..... 011 ..... 0101111 @atom_ld 233sc_d 00011 . . ..... ..... 011 ..... 0101111 @atom_st 234amoswap_d 00001 . . ..... ..... 011 ..... 0101111 @atom_st 235amoadd_d 00000 . . ..... ..... 011 ..... 0101111 @atom_st 236amoxor_d 00100 . . ..... ..... 011 ..... 0101111 @atom_st 237amoand_d 01100 . . ..... ..... 011 ..... 0101111 @atom_st 238amoor_d 01000 . . ..... ..... 011 ..... 0101111 @atom_st 239amomin_d 10000 . . ..... ..... 011 ..... 0101111 @atom_st 240amomax_d 10100 . . ..... ..... 011 ..... 0101111 @atom_st 241amominu_d 11000 . . ..... ..... 011 ..... 0101111 @atom_st 242amomaxu_d 11100 . . ..... ..... 011 ..... 0101111 @atom_st 243 244# *** RV32F Standard Extension *** 245flw ............ ..... 010 ..... 0000111 @i 246fsw ....... ..... ..... 010 ..... 0100111 @s 247fmadd_s ..... 00 ..... ..... ... ..... 1000011 @r4_rm 248fmsub_s ..... 00 ..... ..... ... ..... 1000111 @r4_rm 249fnmsub_s ..... 00 ..... ..... ... ..... 1001011 @r4_rm 250fnmadd_s ..... 00 ..... ..... ... ..... 1001111 @r4_rm 251fadd_s 0000000 ..... ..... ... ..... 1010011 @r_rm 252fsub_s 0000100 ..... ..... ... ..... 1010011 @r_rm 253fmul_s 0001000 ..... ..... ... ..... 1010011 @r_rm 254fdiv_s 0001100 ..... ..... ... ..... 1010011 @r_rm 255fsqrt_s 0101100 00000 ..... ... ..... 1010011 @r2_rm 256fsgnj_s 0010000 ..... ..... 000 ..... 1010011 @r 257fsgnjn_s 0010000 ..... ..... 001 ..... 1010011 @r 258fsgnjx_s 0010000 ..... ..... 010 ..... 1010011 @r 259fmin_s 0010100 ..... ..... 000 ..... 1010011 @r 260fmax_s 0010100 ..... ..... 001 ..... 1010011 @r 261fcvt_w_s 1100000 00000 ..... ... ..... 1010011 @r2_rm 262fcvt_wu_s 1100000 00001 ..... ... ..... 1010011 @r2_rm 263fmv_x_w 1110000 00000 ..... 000 ..... 1010011 @r2 264feq_s 1010000 ..... ..... 010 ..... 1010011 @r 265flt_s 1010000 ..... ..... 001 ..... 1010011 @r 266fle_s 1010000 ..... ..... 000 ..... 1010011 @r 267fclass_s 1110000 00000 ..... 001 ..... 1010011 @r2 268fcvt_s_w 1101000 00000 ..... ... ..... 1010011 @r2_rm 269fcvt_s_wu 1101000 00001 ..... ... ..... 1010011 @r2_rm 270fmv_w_x 1111000 00000 ..... 000 ..... 1010011 @r2 271 272# *** RV64F Standard Extension (in addition to RV32F) *** 273fcvt_l_s 1100000 00010 ..... ... ..... 1010011 @r2_rm 274fcvt_lu_s 1100000 00011 ..... ... ..... 1010011 @r2_rm 275fcvt_s_l 1101000 00010 ..... ... ..... 1010011 @r2_rm 276fcvt_s_lu 1101000 00011 ..... ... ..... 1010011 @r2_rm 277 278# *** RV32D Standard Extension *** 279fld ............ ..... 011 ..... 0000111 @i 280fsd ....... ..... ..... 011 ..... 0100111 @s 281fmadd_d ..... 01 ..... ..... ... ..... 1000011 @r4_rm 282fmsub_d ..... 01 ..... ..... ... ..... 1000111 @r4_rm 283fnmsub_d ..... 01 ..... ..... ... ..... 1001011 @r4_rm 284fnmadd_d ..... 01 ..... ..... ... ..... 1001111 @r4_rm 285fadd_d 0000001 ..... ..... ... ..... 1010011 @r_rm 286fsub_d 0000101 ..... ..... ... ..... 1010011 @r_rm 287fmul_d 0001001 ..... ..... ... ..... 1010011 @r_rm 288fdiv_d 0001101 ..... ..... ... ..... 1010011 @r_rm 289fsqrt_d 0101101 00000 ..... ... ..... 1010011 @r2_rm 290fsgnj_d 0010001 ..... ..... 000 ..... 1010011 @r 291fsgnjn_d 0010001 ..... ..... 001 ..... 1010011 @r 292fsgnjx_d 0010001 ..... ..... 010 ..... 1010011 @r 293fmin_d 0010101 ..... ..... 000 ..... 1010011 @r 294fmax_d 0010101 ..... ..... 001 ..... 1010011 @r 295fcvt_s_d 0100000 00001 ..... ... ..... 1010011 @r2_rm 296fcvt_d_s 0100001 00000 ..... ... ..... 1010011 @r2_rm 297feq_d 1010001 ..... ..... 010 ..... 1010011 @r 298flt_d 1010001 ..... ..... 001 ..... 1010011 @r 299fle_d 1010001 ..... ..... 000 ..... 1010011 @r 300fclass_d 1110001 00000 ..... 001 ..... 1010011 @r2 301fcvt_w_d 1100001 00000 ..... ... ..... 1010011 @r2_rm 302fcvt_wu_d 1100001 00001 ..... ... ..... 1010011 @r2_rm 303fcvt_d_w 1101001 00000 ..... ... ..... 1010011 @r2_rm 304fcvt_d_wu 1101001 00001 ..... ... ..... 1010011 @r2_rm 305 306# *** RV64D Standard Extension (in addition to RV32D) *** 307fcvt_l_d 1100001 00010 ..... ... ..... 1010011 @r2_rm 308fcvt_lu_d 1100001 00011 ..... ... ..... 1010011 @r2_rm 309fmv_x_d 1110001 00000 ..... 000 ..... 1010011 @r2 310fcvt_d_l 1101001 00010 ..... ... ..... 1010011 @r2_rm 311fcvt_d_lu 1101001 00011 ..... ... ..... 1010011 @r2_rm 312fmv_d_x 1111001 00000 ..... 000 ..... 1010011 @r2 313 314# *** RV32H Base Instruction Set *** 315hlv_b 0110000 00000 ..... 100 ..... 1110011 @r2 316hlv_bu 0110000 00001 ..... 100 ..... 1110011 @r2 317hlv_h 0110010 00000 ..... 100 ..... 1110011 @r2 318hlv_hu 0110010 00001 ..... 100 ..... 1110011 @r2 319hlvx_hu 0110010 00011 ..... 100 ..... 1110011 @r2 320hlv_w 0110100 00000 ..... 100 ..... 1110011 @r2 321hlvx_wu 0110100 00011 ..... 100 ..... 1110011 @r2 322hsv_b 0110001 ..... ..... 100 00000 1110011 @r2_s 323hsv_h 0110011 ..... ..... 100 00000 1110011 @r2_s 324hsv_w 0110101 ..... ..... 100 00000 1110011 @r2_s 325hfence_gvma 0110001 ..... ..... 000 00000 1110011 @hfence_gvma 326hfence_vvma 0010001 ..... ..... 000 00000 1110011 @hfence_vvma 327 328# *** RV64H Base Instruction Set *** 329hlv_wu 0110100 00001 ..... 100 ..... 1110011 @r2 330hlv_d 0110110 00000 ..... 100 ..... 1110011 @r2 331hsv_d 0110111 ..... ..... 100 00000 1110011 @r2_s 332 333# *** Vector loads and stores are encoded within LOADFP/STORE-FP *** 334# Vector unit-stride load/store insns. 335vle8_v ... 000 . 00000 ..... 000 ..... 0000111 @r2_nfvm 336vle16_v ... 000 . 00000 ..... 101 ..... 0000111 @r2_nfvm 337vle32_v ... 000 . 00000 ..... 110 ..... 0000111 @r2_nfvm 338vle64_v ... 000 . 00000 ..... 111 ..... 0000111 @r2_nfvm 339vse8_v ... 000 . 00000 ..... 000 ..... 0100111 @r2_nfvm 340vse16_v ... 000 . 00000 ..... 101 ..... 0100111 @r2_nfvm 341vse32_v ... 000 . 00000 ..... 110 ..... 0100111 @r2_nfvm 342vse64_v ... 000 . 00000 ..... 111 ..... 0100111 @r2_nfvm 343 344# Vector unit-stride mask load/store insns. 345vlm_v 000 000 1 01011 ..... 000 ..... 0000111 @r2 346vsm_v 000 000 1 01011 ..... 000 ..... 0100111 @r2 347 348# Vector strided insns. 349vlse8_v ... 010 . ..... ..... 000 ..... 0000111 @r_nfvm 350vlse16_v ... 010 . ..... ..... 101 ..... 0000111 @r_nfvm 351vlse32_v ... 010 . ..... ..... 110 ..... 0000111 @r_nfvm 352vlse64_v ... 010 . ..... ..... 111 ..... 0000111 @r_nfvm 353vsse8_v ... 010 . ..... ..... 000 ..... 0100111 @r_nfvm 354vsse16_v ... 010 . ..... ..... 101 ..... 0100111 @r_nfvm 355vsse32_v ... 010 . ..... ..... 110 ..... 0100111 @r_nfvm 356vsse64_v ... 010 . ..... ..... 111 ..... 0100111 @r_nfvm 357 358# Vector ordered-indexed and unordered-indexed load insns. 359vlxei8_v ... 0-1 . ..... ..... 000 ..... 0000111 @r_nfvm 360vlxei16_v ... 0-1 . ..... ..... 101 ..... 0000111 @r_nfvm 361vlxei32_v ... 0-1 . ..... ..... 110 ..... 0000111 @r_nfvm 362vlxei64_v ... 0-1 . ..... ..... 111 ..... 0000111 @r_nfvm 363 364# Vector ordered-indexed and unordered-indexed store insns. 365vsxei8_v ... 0-1 . ..... ..... 000 ..... 0100111 @r_nfvm 366vsxei16_v ... 0-1 . ..... ..... 101 ..... 0100111 @r_nfvm 367vsxei32_v ... 0-1 . ..... ..... 110 ..... 0100111 @r_nfvm 368vsxei64_v ... 0-1 . ..... ..... 111 ..... 0100111 @r_nfvm 369 370# Vector unit-stride fault-only-first load insns. 371vle8ff_v ... 000 . 10000 ..... 000 ..... 0000111 @r2_nfvm 372vle16ff_v ... 000 . 10000 ..... 101 ..... 0000111 @r2_nfvm 373vle32ff_v ... 000 . 10000 ..... 110 ..... 0000111 @r2_nfvm 374vle64ff_v ... 000 . 10000 ..... 111 ..... 0000111 @r2_nfvm 375 376# Vector whole register insns 377vl1re8_v 000 000 1 01000 ..... 000 ..... 0000111 @r2 378vl1re16_v 000 000 1 01000 ..... 101 ..... 0000111 @r2 379vl1re32_v 000 000 1 01000 ..... 110 ..... 0000111 @r2 380vl1re64_v 000 000 1 01000 ..... 111 ..... 0000111 @r2 381vl2re8_v 001 000 1 01000 ..... 000 ..... 0000111 @r2 382vl2re16_v 001 000 1 01000 ..... 101 ..... 0000111 @r2 383vl2re32_v 001 000 1 01000 ..... 110 ..... 0000111 @r2 384vl2re64_v 001 000 1 01000 ..... 111 ..... 0000111 @r2 385vl4re8_v 011 000 1 01000 ..... 000 ..... 0000111 @r2 386vl4re16_v 011 000 1 01000 ..... 101 ..... 0000111 @r2 387vl4re32_v 011 000 1 01000 ..... 110 ..... 0000111 @r2 388vl4re64_v 011 000 1 01000 ..... 111 ..... 0000111 @r2 389vl8re8_v 111 000 1 01000 ..... 000 ..... 0000111 @r2 390vl8re16_v 111 000 1 01000 ..... 101 ..... 0000111 @r2 391vl8re32_v 111 000 1 01000 ..... 110 ..... 0000111 @r2 392vl8re64_v 111 000 1 01000 ..... 111 ..... 0000111 @r2 393vs1r_v 000 000 1 01000 ..... 000 ..... 0100111 @r2 394vs2r_v 001 000 1 01000 ..... 000 ..... 0100111 @r2 395vs4r_v 011 000 1 01000 ..... 000 ..... 0100111 @r2 396vs8r_v 111 000 1 01000 ..... 000 ..... 0100111 @r2 397 398# *** new major opcode OP-V *** 399vadd_vv 000000 . ..... ..... 000 ..... 1010111 @r_vm 400vadd_vx 000000 . ..... ..... 100 ..... 1010111 @r_vm 401vadd_vi 000000 . ..... ..... 011 ..... 1010111 @r_vm 402vsub_vv 000010 . ..... ..... 000 ..... 1010111 @r_vm 403vsub_vx 000010 . ..... ..... 100 ..... 1010111 @r_vm 404vrsub_vx 000011 . ..... ..... 100 ..... 1010111 @r_vm 405vrsub_vi 000011 . ..... ..... 011 ..... 1010111 @r_vm 406vwaddu_vv 110000 . ..... ..... 010 ..... 1010111 @r_vm 407vwaddu_vx 110000 . ..... ..... 110 ..... 1010111 @r_vm 408vwadd_vv 110001 . ..... ..... 010 ..... 1010111 @r_vm 409vwadd_vx 110001 . ..... ..... 110 ..... 1010111 @r_vm 410vwsubu_vv 110010 . ..... ..... 010 ..... 1010111 @r_vm 411vwsubu_vx 110010 . ..... ..... 110 ..... 1010111 @r_vm 412vwsub_vv 110011 . ..... ..... 010 ..... 1010111 @r_vm 413vwsub_vx 110011 . ..... ..... 110 ..... 1010111 @r_vm 414vwaddu_wv 110100 . ..... ..... 010 ..... 1010111 @r_vm 415vwaddu_wx 110100 . ..... ..... 110 ..... 1010111 @r_vm 416vwadd_wv 110101 . ..... ..... 010 ..... 1010111 @r_vm 417vwadd_wx 110101 . ..... ..... 110 ..... 1010111 @r_vm 418vwsubu_wv 110110 . ..... ..... 010 ..... 1010111 @r_vm 419vwsubu_wx 110110 . ..... ..... 110 ..... 1010111 @r_vm 420vwsub_wv 110111 . ..... ..... 010 ..... 1010111 @r_vm 421vwsub_wx 110111 . ..... ..... 110 ..... 1010111 @r_vm 422vadc_vvm 010000 0 ..... ..... 000 ..... 1010111 @r_vm_1 423vadc_vxm 010000 0 ..... ..... 100 ..... 1010111 @r_vm_1 424vadc_vim 010000 0 ..... ..... 011 ..... 1010111 @r_vm_1 425vmadc_vvm 010001 . ..... ..... 000 ..... 1010111 @r_vm 426vmadc_vxm 010001 . ..... ..... 100 ..... 1010111 @r_vm 427vmadc_vim 010001 . ..... ..... 011 ..... 1010111 @r_vm 428vsbc_vvm 010010 0 ..... ..... 000 ..... 1010111 @r_vm_1 429vsbc_vxm 010010 0 ..... ..... 100 ..... 1010111 @r_vm_1 430vmsbc_vvm 010011 . ..... ..... 000 ..... 1010111 @r_vm 431vmsbc_vxm 010011 . ..... ..... 100 ..... 1010111 @r_vm 432vand_vv 001001 . ..... ..... 000 ..... 1010111 @r_vm 433vand_vx 001001 . ..... ..... 100 ..... 1010111 @r_vm 434vand_vi 001001 . ..... ..... 011 ..... 1010111 @r_vm 435vor_vv 001010 . ..... ..... 000 ..... 1010111 @r_vm 436vor_vx 001010 . ..... ..... 100 ..... 1010111 @r_vm 437vor_vi 001010 . ..... ..... 011 ..... 1010111 @r_vm 438vxor_vv 001011 . ..... ..... 000 ..... 1010111 @r_vm 439vxor_vx 001011 . ..... ..... 100 ..... 1010111 @r_vm 440vxor_vi 001011 . ..... ..... 011 ..... 1010111 @r_vm 441vsll_vv 100101 . ..... ..... 000 ..... 1010111 @r_vm 442vsll_vx 100101 . ..... ..... 100 ..... 1010111 @r_vm 443vsll_vi 100101 . ..... ..... 011 ..... 1010111 @r_vm 444vsrl_vv 101000 . ..... ..... 000 ..... 1010111 @r_vm 445vsrl_vx 101000 . ..... ..... 100 ..... 1010111 @r_vm 446vsrl_vi 101000 . ..... ..... 011 ..... 1010111 @r_vm 447vsra_vv 101001 . ..... ..... 000 ..... 1010111 @r_vm 448vsra_vx 101001 . ..... ..... 100 ..... 1010111 @r_vm 449vsra_vi 101001 . ..... ..... 011 ..... 1010111 @r_vm 450vnsrl_wv 101100 . ..... ..... 000 ..... 1010111 @r_vm 451vnsrl_wx 101100 . ..... ..... 100 ..... 1010111 @r_vm 452vnsrl_wi 101100 . ..... ..... 011 ..... 1010111 @r_vm 453vnsra_wv 101101 . ..... ..... 000 ..... 1010111 @r_vm 454vnsra_wx 101101 . ..... ..... 100 ..... 1010111 @r_vm 455vnsra_wi 101101 . ..... ..... 011 ..... 1010111 @r_vm 456vmseq_vv 011000 . ..... ..... 000 ..... 1010111 @r_vm 457vmseq_vx 011000 . ..... ..... 100 ..... 1010111 @r_vm 458vmseq_vi 011000 . ..... ..... 011 ..... 1010111 @r_vm 459vmsne_vv 011001 . ..... ..... 000 ..... 1010111 @r_vm 460vmsne_vx 011001 . ..... ..... 100 ..... 1010111 @r_vm 461vmsne_vi 011001 . ..... ..... 011 ..... 1010111 @r_vm 462vmsltu_vv 011010 . ..... ..... 000 ..... 1010111 @r_vm 463vmsltu_vx 011010 . ..... ..... 100 ..... 1010111 @r_vm 464vmslt_vv 011011 . ..... ..... 000 ..... 1010111 @r_vm 465vmslt_vx 011011 . ..... ..... 100 ..... 1010111 @r_vm 466vmsleu_vv 011100 . ..... ..... 000 ..... 1010111 @r_vm 467vmsleu_vx 011100 . ..... ..... 100 ..... 1010111 @r_vm 468vmsleu_vi 011100 . ..... ..... 011 ..... 1010111 @r_vm 469vmsle_vv 011101 . ..... ..... 000 ..... 1010111 @r_vm 470vmsle_vx 011101 . ..... ..... 100 ..... 1010111 @r_vm 471vmsle_vi 011101 . ..... ..... 011 ..... 1010111 @r_vm 472vmsgtu_vx 011110 . ..... ..... 100 ..... 1010111 @r_vm 473vmsgtu_vi 011110 . ..... ..... 011 ..... 1010111 @r_vm 474vmsgt_vx 011111 . ..... ..... 100 ..... 1010111 @r_vm 475vmsgt_vi 011111 . ..... ..... 011 ..... 1010111 @r_vm 476vminu_vv 000100 . ..... ..... 000 ..... 1010111 @r_vm 477vminu_vx 000100 . ..... ..... 100 ..... 1010111 @r_vm 478vmin_vv 000101 . ..... ..... 000 ..... 1010111 @r_vm 479vmin_vx 000101 . ..... ..... 100 ..... 1010111 @r_vm 480vmaxu_vv 000110 . ..... ..... 000 ..... 1010111 @r_vm 481vmaxu_vx 000110 . ..... ..... 100 ..... 1010111 @r_vm 482vmax_vv 000111 . ..... ..... 000 ..... 1010111 @r_vm 483vmax_vx 000111 . ..... ..... 100 ..... 1010111 @r_vm 484vmul_vv 100101 . ..... ..... 010 ..... 1010111 @r_vm 485vmul_vx 100101 . ..... ..... 110 ..... 1010111 @r_vm 486vmulh_vv 100111 . ..... ..... 010 ..... 1010111 @r_vm 487vmulh_vx 100111 . ..... ..... 110 ..... 1010111 @r_vm 488vmulhu_vv 100100 . ..... ..... 010 ..... 1010111 @r_vm 489vmulhu_vx 100100 . ..... ..... 110 ..... 1010111 @r_vm 490vmulhsu_vv 100110 . ..... ..... 010 ..... 1010111 @r_vm 491vmulhsu_vx 100110 . ..... ..... 110 ..... 1010111 @r_vm 492vdivu_vv 100000 . ..... ..... 010 ..... 1010111 @r_vm 493vdivu_vx 100000 . ..... ..... 110 ..... 1010111 @r_vm 494vdiv_vv 100001 . ..... ..... 010 ..... 1010111 @r_vm 495vdiv_vx 100001 . ..... ..... 110 ..... 1010111 @r_vm 496vremu_vv 100010 . ..... ..... 010 ..... 1010111 @r_vm 497vremu_vx 100010 . ..... ..... 110 ..... 1010111 @r_vm 498vrem_vv 100011 . ..... ..... 010 ..... 1010111 @r_vm 499vrem_vx 100011 . ..... ..... 110 ..... 1010111 @r_vm 500vwmulu_vv 111000 . ..... ..... 010 ..... 1010111 @r_vm 501vwmulu_vx 111000 . ..... ..... 110 ..... 1010111 @r_vm 502vwmulsu_vv 111010 . ..... ..... 010 ..... 1010111 @r_vm 503vwmulsu_vx 111010 . ..... ..... 110 ..... 1010111 @r_vm 504vwmul_vv 111011 . ..... ..... 010 ..... 1010111 @r_vm 505vwmul_vx 111011 . ..... ..... 110 ..... 1010111 @r_vm 506vmacc_vv 101101 . ..... ..... 010 ..... 1010111 @r_vm 507vmacc_vx 101101 . ..... ..... 110 ..... 1010111 @r_vm 508vnmsac_vv 101111 . ..... ..... 010 ..... 1010111 @r_vm 509vnmsac_vx 101111 . ..... ..... 110 ..... 1010111 @r_vm 510vmadd_vv 101001 . ..... ..... 010 ..... 1010111 @r_vm 511vmadd_vx 101001 . ..... ..... 110 ..... 1010111 @r_vm 512vnmsub_vv 101011 . ..... ..... 010 ..... 1010111 @r_vm 513vnmsub_vx 101011 . ..... ..... 110 ..... 1010111 @r_vm 514vwmaccu_vv 111100 . ..... ..... 010 ..... 1010111 @r_vm 515vwmaccu_vx 111100 . ..... ..... 110 ..... 1010111 @r_vm 516vwmacc_vv 111101 . ..... ..... 010 ..... 1010111 @r_vm 517vwmacc_vx 111101 . ..... ..... 110 ..... 1010111 @r_vm 518vwmaccsu_vv 111111 . ..... ..... 010 ..... 1010111 @r_vm 519vwmaccsu_vx 111111 . ..... ..... 110 ..... 1010111 @r_vm 520vwmaccus_vx 111110 . ..... ..... 110 ..... 1010111 @r_vm 521vmv_v_v 010111 1 00000 ..... 000 ..... 1010111 @r2 522vmv_v_x 010111 1 00000 ..... 100 ..... 1010111 @r2 523vmv_v_i 010111 1 00000 ..... 011 ..... 1010111 @r2 524vmerge_vvm 010111 0 ..... ..... 000 ..... 1010111 @r_vm_0 525vmerge_vxm 010111 0 ..... ..... 100 ..... 1010111 @r_vm_0 526vmerge_vim 010111 0 ..... ..... 011 ..... 1010111 @r_vm_0 527vsaddu_vv 100000 . ..... ..... 000 ..... 1010111 @r_vm 528vsaddu_vx 100000 . ..... ..... 100 ..... 1010111 @r_vm 529vsaddu_vi 100000 . ..... ..... 011 ..... 1010111 @r_vm 530vsadd_vv 100001 . ..... ..... 000 ..... 1010111 @r_vm 531vsadd_vx 100001 . ..... ..... 100 ..... 1010111 @r_vm 532vsadd_vi 100001 . ..... ..... 011 ..... 1010111 @r_vm 533vssubu_vv 100010 . ..... ..... 000 ..... 1010111 @r_vm 534vssubu_vx 100010 . ..... ..... 100 ..... 1010111 @r_vm 535vssub_vv 100011 . ..... ..... 000 ..... 1010111 @r_vm 536vssub_vx 100011 . ..... ..... 100 ..... 1010111 @r_vm 537vaadd_vv 001001 . ..... ..... 010 ..... 1010111 @r_vm 538vaadd_vx 001001 . ..... ..... 110 ..... 1010111 @r_vm 539vaaddu_vv 001000 . ..... ..... 010 ..... 1010111 @r_vm 540vaaddu_vx 001000 . ..... ..... 110 ..... 1010111 @r_vm 541vasub_vv 001011 . ..... ..... 010 ..... 1010111 @r_vm 542vasub_vx 001011 . ..... ..... 110 ..... 1010111 @r_vm 543vasubu_vv 001010 . ..... ..... 010 ..... 1010111 @r_vm 544vasubu_vx 001010 . ..... ..... 110 ..... 1010111 @r_vm 545vsmul_vv 100111 . ..... ..... 000 ..... 1010111 @r_vm 546vsmul_vx 100111 . ..... ..... 100 ..... 1010111 @r_vm 547vssrl_vv 101010 . ..... ..... 000 ..... 1010111 @r_vm 548vssrl_vx 101010 . ..... ..... 100 ..... 1010111 @r_vm 549vssrl_vi 101010 . ..... ..... 011 ..... 1010111 @r_vm 550vssra_vv 101011 . ..... ..... 000 ..... 1010111 @r_vm 551vssra_vx 101011 . ..... ..... 100 ..... 1010111 @r_vm 552vssra_vi 101011 . ..... ..... 011 ..... 1010111 @r_vm 553vnclipu_wv 101110 . ..... ..... 000 ..... 1010111 @r_vm 554vnclipu_wx 101110 . ..... ..... 100 ..... 1010111 @r_vm 555vnclipu_wi 101110 . ..... ..... 011 ..... 1010111 @r_vm 556vnclip_wv 101111 . ..... ..... 000 ..... 1010111 @r_vm 557vnclip_wx 101111 . ..... ..... 100 ..... 1010111 @r_vm 558vnclip_wi 101111 . ..... ..... 011 ..... 1010111 @r_vm 559vfadd_vv 000000 . ..... ..... 001 ..... 1010111 @r_vm 560vfadd_vf 000000 . ..... ..... 101 ..... 1010111 @r_vm 561vfsub_vv 000010 . ..... ..... 001 ..... 1010111 @r_vm 562vfsub_vf 000010 . ..... ..... 101 ..... 1010111 @r_vm 563vfrsub_vf 100111 . ..... ..... 101 ..... 1010111 @r_vm 564vfwadd_vv 110000 . ..... ..... 001 ..... 1010111 @r_vm 565vfwadd_vf 110000 . ..... ..... 101 ..... 1010111 @r_vm 566vfwadd_wv 110100 . ..... ..... 001 ..... 1010111 @r_vm 567vfwadd_wf 110100 . ..... ..... 101 ..... 1010111 @r_vm 568vfwsub_vv 110010 . ..... ..... 001 ..... 1010111 @r_vm 569vfwsub_vf 110010 . ..... ..... 101 ..... 1010111 @r_vm 570vfwsub_wv 110110 . ..... ..... 001 ..... 1010111 @r_vm 571vfwsub_wf 110110 . ..... ..... 101 ..... 1010111 @r_vm 572vfmul_vv 100100 . ..... ..... 001 ..... 1010111 @r_vm 573vfmul_vf 100100 . ..... ..... 101 ..... 1010111 @r_vm 574vfdiv_vv 100000 . ..... ..... 001 ..... 1010111 @r_vm 575vfdiv_vf 100000 . ..... ..... 101 ..... 1010111 @r_vm 576vfrdiv_vf 100001 . ..... ..... 101 ..... 1010111 @r_vm 577vfwmul_vv 111000 . ..... ..... 001 ..... 1010111 @r_vm 578vfwmul_vf 111000 . ..... ..... 101 ..... 1010111 @r_vm 579vfmacc_vv 101100 . ..... ..... 001 ..... 1010111 @r_vm 580vfnmacc_vv 101101 . ..... ..... 001 ..... 1010111 @r_vm 581vfnmacc_vf 101101 . ..... ..... 101 ..... 1010111 @r_vm 582vfmacc_vf 101100 . ..... ..... 101 ..... 1010111 @r_vm 583vfmsac_vv 101110 . ..... ..... 001 ..... 1010111 @r_vm 584vfmsac_vf 101110 . ..... ..... 101 ..... 1010111 @r_vm 585vfnmsac_vv 101111 . ..... ..... 001 ..... 1010111 @r_vm 586vfnmsac_vf 101111 . ..... ..... 101 ..... 1010111 @r_vm 587vfmadd_vv 101000 . ..... ..... 001 ..... 1010111 @r_vm 588vfmadd_vf 101000 . ..... ..... 101 ..... 1010111 @r_vm 589vfnmadd_vv 101001 . ..... ..... 001 ..... 1010111 @r_vm 590vfnmadd_vf 101001 . ..... ..... 101 ..... 1010111 @r_vm 591vfmsub_vv 101010 . ..... ..... 001 ..... 1010111 @r_vm 592vfmsub_vf 101010 . ..... ..... 101 ..... 1010111 @r_vm 593vfnmsub_vv 101011 . ..... ..... 001 ..... 1010111 @r_vm 594vfnmsub_vf 101011 . ..... ..... 101 ..... 1010111 @r_vm 595vfwmacc_vv 111100 . ..... ..... 001 ..... 1010111 @r_vm 596vfwmacc_vf 111100 . ..... ..... 101 ..... 1010111 @r_vm 597vfwnmacc_vv 111101 . ..... ..... 001 ..... 1010111 @r_vm 598vfwnmacc_vf 111101 . ..... ..... 101 ..... 1010111 @r_vm 599vfwmsac_vv 111110 . ..... ..... 001 ..... 1010111 @r_vm 600vfwmsac_vf 111110 . ..... ..... 101 ..... 1010111 @r_vm 601vfwnmsac_vv 111111 . ..... ..... 001 ..... 1010111 @r_vm 602vfwnmsac_vf 111111 . ..... ..... 101 ..... 1010111 @r_vm 603vfsqrt_v 010011 . ..... 00000 001 ..... 1010111 @r2_vm 604vfrsqrt7_v 010011 . ..... 00100 001 ..... 1010111 @r2_vm 605vfrec7_v 010011 . ..... 00101 001 ..... 1010111 @r2_vm 606vfmin_vv 000100 . ..... ..... 001 ..... 1010111 @r_vm 607vfmin_vf 000100 . ..... ..... 101 ..... 1010111 @r_vm 608vfmax_vv 000110 . ..... ..... 001 ..... 1010111 @r_vm 609vfmax_vf 000110 . ..... ..... 101 ..... 1010111 @r_vm 610vfsgnj_vv 001000 . ..... ..... 001 ..... 1010111 @r_vm 611vfsgnj_vf 001000 . ..... ..... 101 ..... 1010111 @r_vm 612vfsgnjn_vv 001001 . ..... ..... 001 ..... 1010111 @r_vm 613vfsgnjn_vf 001001 . ..... ..... 101 ..... 1010111 @r_vm 614vfsgnjx_vv 001010 . ..... ..... 001 ..... 1010111 @r_vm 615vfsgnjx_vf 001010 . ..... ..... 101 ..... 1010111 @r_vm 616vfslide1up_vf 001110 . ..... ..... 101 ..... 1010111 @r_vm 617vfslide1down_vf 001111 . ..... ..... 101 ..... 1010111 @r_vm 618vmfeq_vv 011000 . ..... ..... 001 ..... 1010111 @r_vm 619vmfeq_vf 011000 . ..... ..... 101 ..... 1010111 @r_vm 620vmfne_vv 011100 . ..... ..... 001 ..... 1010111 @r_vm 621vmfne_vf 011100 . ..... ..... 101 ..... 1010111 @r_vm 622vmflt_vv 011011 . ..... ..... 001 ..... 1010111 @r_vm 623vmflt_vf 011011 . ..... ..... 101 ..... 1010111 @r_vm 624vmfle_vv 011001 . ..... ..... 001 ..... 1010111 @r_vm 625vmfle_vf 011001 . ..... ..... 101 ..... 1010111 @r_vm 626vmfgt_vf 011101 . ..... ..... 101 ..... 1010111 @r_vm 627vmfge_vf 011111 . ..... ..... 101 ..... 1010111 @r_vm 628vfclass_v 010011 . ..... 10000 001 ..... 1010111 @r2_vm 629vfmerge_vfm 010111 0 ..... ..... 101 ..... 1010111 @r_vm_0 630vfmv_v_f 010111 1 00000 ..... 101 ..... 1010111 @r2 631 632vfcvt_xu_f_v 010010 . ..... 00000 001 ..... 1010111 @r2_vm 633vfcvt_x_f_v 010010 . ..... 00001 001 ..... 1010111 @r2_vm 634vfcvt_f_xu_v 010010 . ..... 00010 001 ..... 1010111 @r2_vm 635vfcvt_f_x_v 010010 . ..... 00011 001 ..... 1010111 @r2_vm 636vfcvt_rtz_xu_f_v 010010 . ..... 00110 001 ..... 1010111 @r2_vm 637vfcvt_rtz_x_f_v 010010 . ..... 00111 001 ..... 1010111 @r2_vm 638 639vfwcvt_xu_f_v 010010 . ..... 01000 001 ..... 1010111 @r2_vm 640vfwcvt_x_f_v 010010 . ..... 01001 001 ..... 1010111 @r2_vm 641vfwcvt_f_xu_v 010010 . ..... 01010 001 ..... 1010111 @r2_vm 642vfwcvt_f_x_v 010010 . ..... 01011 001 ..... 1010111 @r2_vm 643vfwcvt_f_f_v 010010 . ..... 01100 001 ..... 1010111 @r2_vm 644vfwcvt_rtz_xu_f_v 010010 . ..... 01110 001 ..... 1010111 @r2_vm 645vfwcvt_rtz_x_f_v 010010 . ..... 01111 001 ..... 1010111 @r2_vm 646 647vfncvt_xu_f_w 010010 . ..... 10000 001 ..... 1010111 @r2_vm 648vfncvt_x_f_w 010010 . ..... 10001 001 ..... 1010111 @r2_vm 649vfncvt_f_xu_w 010010 . ..... 10010 001 ..... 1010111 @r2_vm 650vfncvt_f_x_w 010010 . ..... 10011 001 ..... 1010111 @r2_vm 651vfncvt_f_f_w 010010 . ..... 10100 001 ..... 1010111 @r2_vm 652vfncvt_rod_f_f_w 010010 . ..... 10101 001 ..... 1010111 @r2_vm 653vfncvt_rtz_xu_f_w 010010 . ..... 10110 001 ..... 1010111 @r2_vm 654vfncvt_rtz_x_f_w 010010 . ..... 10111 001 ..... 1010111 @r2_vm 655 656vredsum_vs 000000 . ..... ..... 010 ..... 1010111 @r_vm 657vredand_vs 000001 . ..... ..... 010 ..... 1010111 @r_vm 658vredor_vs 000010 . ..... ..... 010 ..... 1010111 @r_vm 659vredxor_vs 000011 . ..... ..... 010 ..... 1010111 @r_vm 660vredminu_vs 000100 . ..... ..... 010 ..... 1010111 @r_vm 661vredmin_vs 000101 . ..... ..... 010 ..... 1010111 @r_vm 662vredmaxu_vs 000110 . ..... ..... 010 ..... 1010111 @r_vm 663vredmax_vs 000111 . ..... ..... 010 ..... 1010111 @r_vm 664vwredsumu_vs 110000 . ..... ..... 000 ..... 1010111 @r_vm 665vwredsum_vs 110001 . ..... ..... 000 ..... 1010111 @r_vm 666# Vector ordered and unordered reduction sum 667vfredusum_vs 000001 . ..... ..... 001 ..... 1010111 @r_vm 668vfredosum_vs 000011 . ..... ..... 001 ..... 1010111 @r_vm 669vfredmin_vs 000101 . ..... ..... 001 ..... 1010111 @r_vm 670vfredmax_vs 000111 . ..... ..... 001 ..... 1010111 @r_vm 671# Vector widening ordered and unordered float reduction sum 672vfwredusum_vs 110001 . ..... ..... 001 ..... 1010111 @r_vm 673vfwredosum_vs 110011 . ..... ..... 001 ..... 1010111 @r_vm 674vmand_mm 011001 - ..... ..... 010 ..... 1010111 @r 675vmnand_mm 011101 - ..... ..... 010 ..... 1010111 @r 676vmandn_mm 011000 - ..... ..... 010 ..... 1010111 @r 677vmxor_mm 011011 - ..... ..... 010 ..... 1010111 @r 678vmor_mm 011010 - ..... ..... 010 ..... 1010111 @r 679vmnor_mm 011110 - ..... ..... 010 ..... 1010111 @r 680vmorn_mm 011100 - ..... ..... 010 ..... 1010111 @r 681vmxnor_mm 011111 - ..... ..... 010 ..... 1010111 @r 682vcpop_m 010000 . ..... 10000 010 ..... 1010111 @r2_vm 683vfirst_m 010000 . ..... 10001 010 ..... 1010111 @r2_vm 684vmsbf_m 010100 . ..... 00001 010 ..... 1010111 @r2_vm 685vmsif_m 010100 . ..... 00011 010 ..... 1010111 @r2_vm 686vmsof_m 010100 . ..... 00010 010 ..... 1010111 @r2_vm 687viota_m 010100 . ..... 10000 010 ..... 1010111 @r2_vm 688vid_v 010100 . 00000 10001 010 ..... 1010111 @r1_vm 689vmv_x_s 010000 1 ..... 00000 010 ..... 1010111 @r2rd 690vmv_s_x 010000 1 00000 ..... 110 ..... 1010111 @r2 691vfmv_f_s 010000 1 ..... 00000 001 ..... 1010111 @r2rd 692vfmv_s_f 010000 1 00000 ..... 101 ..... 1010111 @r2 693vslideup_vx 001110 . ..... ..... 100 ..... 1010111 @r_vm 694vslideup_vi 001110 . ..... ..... 011 ..... 1010111 @r_vm 695vslide1up_vx 001110 . ..... ..... 110 ..... 1010111 @r_vm 696vslidedown_vx 001111 . ..... ..... 100 ..... 1010111 @r_vm 697vslidedown_vi 001111 . ..... ..... 011 ..... 1010111 @r_vm 698vslide1down_vx 001111 . ..... ..... 110 ..... 1010111 @r_vm 699vrgather_vv 001100 . ..... ..... 000 ..... 1010111 @r_vm 700vrgatherei16_vv 001110 . ..... ..... 000 ..... 1010111 @r_vm 701vrgather_vx 001100 . ..... ..... 100 ..... 1010111 @r_vm 702vrgather_vi 001100 . ..... ..... 011 ..... 1010111 @r_vm 703vcompress_vm 010111 - ..... ..... 010 ..... 1010111 @r 704vmv1r_v 100111 1 ..... 00000 011 ..... 1010111 @r2rd 705vmv2r_v 100111 1 ..... 00001 011 ..... 1010111 @r2rd 706vmv4r_v 100111 1 ..... 00011 011 ..... 1010111 @r2rd 707vmv8r_v 100111 1 ..... 00111 011 ..... 1010111 @r2rd 708 709# Vector Integer Extension 710vzext_vf2 010010 . ..... 00110 010 ..... 1010111 @r2_vm 711vzext_vf4 010010 . ..... 00100 010 ..... 1010111 @r2_vm 712vzext_vf8 010010 . ..... 00010 010 ..... 1010111 @r2_vm 713vsext_vf2 010010 . ..... 00111 010 ..... 1010111 @r2_vm 714vsext_vf4 010010 . ..... 00101 010 ..... 1010111 @r2_vm 715vsext_vf8 010010 . ..... 00011 010 ..... 1010111 @r2_vm 716 717vsetvli 0 ........... ..... 111 ..... 1010111 @r2_zimm11 718vsetivli 11 .......... ..... 111 ..... 1010111 @r2_zimm10 719vsetvl 1000000 ..... ..... 111 ..... 1010111 @r 720 721# *** Zawrs Standard Extension *** 722wrs_nto 000000001101 00000 000 00000 1110011 723wrs_sto 000000011101 00000 000 00000 1110011 724 725# *** RV32 Zba Standard Extension *** 726sh1add 0010000 .......... 010 ..... 0110011 @r 727sh2add 0010000 .......... 100 ..... 0110011 @r 728sh3add 0010000 .......... 110 ..... 0110011 @r 729 730# *** RV64 Zba Standard Extension (in addition to RV32 Zba) *** 731add_uw 0000100 .......... 000 ..... 0111011 @r 732sh1add_uw 0010000 .......... 010 ..... 0111011 @r 733sh2add_uw 0010000 .......... 100 ..... 0111011 @r 734sh3add_uw 0010000 .......... 110 ..... 0111011 @r 735slli_uw 00001 ............ 001 ..... 0011011 @sh 736 737# *** RV32 Zbb/Zbkb Standard Extension *** 738andn 0100000 .......... 111 ..... 0110011 @r 739rol 0110000 .......... 001 ..... 0110011 @r 740ror 0110000 .......... 101 ..... 0110011 @r 741rori 01100 ............ 101 ..... 0010011 @sh 742# The encoding for rev8 differs between RV32 and RV64. 743# rev8_32 denotes the RV32 variant. 744rev8_32 011010 011000 ..... 101 ..... 0010011 @r2 745# The encoding for zext.h differs between RV32 and RV64. 746# zext_h_32 denotes the RV32 variant. 747{ 748 zext_h_32 0000100 00000 ..... 100 ..... 0110011 @r2 749 pack 0000100 ..... ..... 100 ..... 0110011 @r 750} 751xnor 0100000 .......... 100 ..... 0110011 @r 752# *** RV32 extra Zbb Standard Extension *** 753clz 011000 000000 ..... 001 ..... 0010011 @r2 754cpop 011000 000010 ..... 001 ..... 0010011 @r2 755ctz 011000 000001 ..... 001 ..... 0010011 @r2 756max 0000101 .......... 110 ..... 0110011 @r 757maxu 0000101 .......... 111 ..... 0110011 @r 758min 0000101 .......... 100 ..... 0110011 @r 759minu 0000101 .......... 101 ..... 0110011 @r 760orc_b 001010 000111 ..... 101 ..... 0010011 @r2 761orn 0100000 .......... 110 ..... 0110011 @r 762sext_b 011000 000100 ..... 001 ..... 0010011 @r2 763sext_h 011000 000101 ..... 001 ..... 0010011 @r2 764# *** RV32 extra Zbkb Standard Extension *** 765brev8 0110100 00111 ..... 101 ..... 0010011 @r2 #grevi 766packh 0000100 .......... 111 ..... 0110011 @r 767unzip 0000100 01111 ..... 101 ..... 0010011 @r2 #unshfl 768zip 0000100 01111 ..... 001 ..... 0010011 @r2 #shfl 769 770# *** RV64 Zbb/Zbkb Standard Extension (in addition to RV32 Zbb/Zbkb) *** 771# The encoding for rev8 differs between RV32 and RV64. 772# When executing on RV64, the encoding used in RV32 is an illegal 773# instruction, so we use different handler functions to differentiate. 774rev8_64 011010 111000 ..... 101 ..... 0010011 @r2 775rolw 0110000 .......... 001 ..... 0111011 @r 776roriw 0110000 .......... 101 ..... 0011011 @sh5 777rorw 0110000 .......... 101 ..... 0111011 @r 778# The encoding for zext.h differs between RV32 and RV64. 779# When executing on RV64, the encoding used in RV32 is an illegal 780# instruction, so we use different handler functions to differentiate. 781{ 782 zext_h_64 0000100 00000 ..... 100 ..... 0111011 @r2 783 packw 0000100 ..... ..... 100 ..... 0111011 @r 784} 785# *** RV64 extra Zbb Standard Extension (in addition to RV32 Zbb) *** 786clzw 0110000 00000 ..... 001 ..... 0011011 @r2 787ctzw 0110000 00001 ..... 001 ..... 0011011 @r2 788cpopw 0110000 00010 ..... 001 ..... 0011011 @r2 789 790# *** RV32 Zbc/Zbkc Standard Extension *** 791clmul 0000101 .......... 001 ..... 0110011 @r 792clmulh 0000101 .......... 011 ..... 0110011 @r 793# *** RV32 extra Zbc Standard Extension *** 794clmulr 0000101 .......... 010 ..... 0110011 @r 795 796# *** RV32 Zbkx Standard Extension *** 797xperm4 0010100 .......... 010 ..... 0110011 @r 798xperm8 0010100 .......... 100 ..... 0110011 @r 799 800# *** RV32 Zbs Standard Extension *** 801bclr 0100100 .......... 001 ..... 0110011 @r 802bclri 01001. ........... 001 ..... 0010011 @sh 803bext 0100100 .......... 101 ..... 0110011 @r 804bexti 01001. ........... 101 ..... 0010011 @sh 805binv 0110100 .......... 001 ..... 0110011 @r 806binvi 01101. ........... 001 ..... 0010011 @sh 807bset 0010100 .......... 001 ..... 0110011 @r 808bseti 00101. ........... 001 ..... 0010011 @sh 809 810# *** RV32 Zfh Extension *** 811flh ............ ..... 001 ..... 0000111 @i 812fsh ....... ..... ..... 001 ..... 0100111 @s 813fmadd_h ..... 10 ..... ..... ... ..... 1000011 @r4_rm 814fmsub_h ..... 10 ..... ..... ... ..... 1000111 @r4_rm 815fnmsub_h ..... 10 ..... ..... ... ..... 1001011 @r4_rm 816fnmadd_h ..... 10 ..... ..... ... ..... 1001111 @r4_rm 817fadd_h 0000010 ..... ..... ... ..... 1010011 @r_rm 818fsub_h 0000110 ..... ..... ... ..... 1010011 @r_rm 819fmul_h 0001010 ..... ..... ... ..... 1010011 @r_rm 820fdiv_h 0001110 ..... ..... ... ..... 1010011 @r_rm 821fsqrt_h 0101110 00000 ..... ... ..... 1010011 @r2_rm 822fsgnj_h 0010010 ..... ..... 000 ..... 1010011 @r 823fsgnjn_h 0010010 ..... ..... 001 ..... 1010011 @r 824fsgnjx_h 0010010 ..... ..... 010 ..... 1010011 @r 825fmin_h 0010110 ..... ..... 000 ..... 1010011 @r 826fmax_h 0010110 ..... ..... 001 ..... 1010011 @r 827fcvt_h_s 0100010 00000 ..... ... ..... 1010011 @r2_rm 828fcvt_s_h 0100000 00010 ..... ... ..... 1010011 @r2_rm 829fcvt_h_d 0100010 00001 ..... ... ..... 1010011 @r2_rm 830fcvt_d_h 0100001 00010 ..... ... ..... 1010011 @r2_rm 831fcvt_w_h 1100010 00000 ..... ... ..... 1010011 @r2_rm 832fcvt_wu_h 1100010 00001 ..... ... ..... 1010011 @r2_rm 833fmv_x_h 1110010 00000 ..... 000 ..... 1010011 @r2 834feq_h 1010010 ..... ..... 010 ..... 1010011 @r 835flt_h 1010010 ..... ..... 001 ..... 1010011 @r 836fle_h 1010010 ..... ..... 000 ..... 1010011 @r 837fclass_h 1110010 00000 ..... 001 ..... 1010011 @r2 838fcvt_h_w 1101010 00000 ..... ... ..... 1010011 @r2_rm 839fcvt_h_wu 1101010 00001 ..... ... ..... 1010011 @r2_rm 840fmv_h_x 1111010 00000 ..... 000 ..... 1010011 @r2 841 842# *** RV64 Zfh Extension (in addition to RV32 Zfh) *** 843fcvt_l_h 1100010 00010 ..... ... ..... 1010011 @r2_rm 844fcvt_lu_h 1100010 00011 ..... ... ..... 1010011 @r2_rm 845fcvt_h_l 1101010 00010 ..... ... ..... 1010011 @r2_rm 846fcvt_h_lu 1101010 00011 ..... ... ..... 1010011 @r2_rm 847 848# *** Svinval Standard Extension *** 849sinval_vma 0001011 ..... ..... 000 00000 1110011 @sfence_vma 850sfence_w_inval 0001100 00000 00000 000 00000 1110011 851sfence_inval_ir 0001100 00001 00000 000 00000 1110011 852hinval_vvma 0010011 ..... ..... 000 00000 1110011 @hfence_vvma 853hinval_gvma 0110011 ..... ..... 000 00000 1110011 @hfence_gvma 854 855# *** RV32 Zknd Standard Extension *** 856aes32dsmi .. 10111 ..... ..... 000 ..... 0110011 @k_aes 857aes32dsi .. 10101 ..... ..... 000 ..... 0110011 @k_aes 858# *** RV64 Zknd Standard Extension *** 859aes64dsm 00 11111 ..... ..... 000 ..... 0110011 @r 860aes64ds 00 11101 ..... ..... 000 ..... 0110011 @r 861aes64im 00 11000 00000 ..... 001 ..... 0010011 @r2 862# *** RV32 Zkne Standard Extension *** 863aes32esmi .. 10011 ..... ..... 000 ..... 0110011 @k_aes 864aes32esi .. 10001 ..... ..... 000 ..... 0110011 @k_aes 865# *** RV64 Zkne Standard Extension *** 866aes64es 00 11001 ..... ..... 000 ..... 0110011 @r 867aes64esm 00 11011 ..... ..... 000 ..... 0110011 @r 868# *** RV64 Zkne/zknd Standard Extension *** 869aes64ks2 01 11111 ..... ..... 000 ..... 0110011 @r 870aes64ks1i 00 11000 1.... ..... 001 ..... 0010011 @i_aes 871# *** RV32 Zknh Standard Extension *** 872sha256sig0 00 01000 00010 ..... 001 ..... 0010011 @r2 873sha256sig1 00 01000 00011 ..... 001 ..... 0010011 @r2 874sha256sum0 00 01000 00000 ..... 001 ..... 0010011 @r2 875sha256sum1 00 01000 00001 ..... 001 ..... 0010011 @r2 876sha512sum0r 01 01000 ..... ..... 000 ..... 0110011 @r 877sha512sum1r 01 01001 ..... ..... 000 ..... 0110011 @r 878sha512sig0l 01 01010 ..... ..... 000 ..... 0110011 @r 879sha512sig0h 01 01110 ..... ..... 000 ..... 0110011 @r 880sha512sig1l 01 01011 ..... ..... 000 ..... 0110011 @r 881sha512sig1h 01 01111 ..... ..... 000 ..... 0110011 @r 882# *** RV64 Zknh Standard Extension *** 883sha512sig0 00 01000 00110 ..... 001 ..... 0010011 @r2 884sha512sig1 00 01000 00111 ..... 001 ..... 0010011 @r2 885sha512sum0 00 01000 00100 ..... 001 ..... 0010011 @r2 886sha512sum1 00 01000 00101 ..... 001 ..... 0010011 @r2 887# *** RV32 Zksh Standard Extension *** 888sm3p0 00 01000 01000 ..... 001 ..... 0010011 @r2 889sm3p1 00 01000 01001 ..... 001 ..... 0010011 @r2 890# *** RV32 Zksed Standard Extension *** 891sm4ed .. 11000 ..... ..... 000 ..... 0110011 @k_aes 892sm4ks .. 11010 ..... ..... 000 ..... 0110011 @k_aes 893 894# *** RV32 Zicond Standard Extension *** 895czero_eqz 0000111 ..... ..... 101 ..... 0110011 @r 896czero_nez 0000111 ..... ..... 111 ..... 0110011 @r 897