xref: /openbmc/qemu/target/riscv/insn32.decode (revision b8429ded)
1#
2# RISC-V translation routines for the RVXI Base Integer Instruction Set.
3#
4# Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de
5#                    Bastian Koppelmann, kbastian@mail.uni-paderborn.de
6#
7# This program is free software; you can redistribute it and/or modify it
8# under the terms and conditions of the GNU General Public License,
9# version 2 or later, as published by the Free Software Foundation.
10#
11# This program is distributed in the hope it will be useful, but WITHOUT
12# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14# more details.
15#
16# You should have received a copy of the GNU General Public License along with
17# this program.  If not, see <http://www.gnu.org/licenses/>.
18
19# Fields:
20%rs3       27:5
21%rs2       20:5
22%rs1       15:5
23%rd        7:5
24
25%sh10    20:10
26%csr    20:12
27%rm     12:3
28
29# immediates:
30%imm_i    20:s12
31%imm_s    25:s7 7:5
32%imm_b    31:s1 7:1 25:6 8:4     !function=ex_shift_1
33%imm_j    31:s1 12:8 20:1 21:10  !function=ex_shift_1
34%imm_u    12:s20                 !function=ex_shift_12
35
36# Argument sets:
37&empty
38&b    imm rs2 rs1
39&i    imm rs1 rd
40&j    imm rd
41&r    rd rs1 rs2
42&s    imm rs1 rs2
43&u    imm rd
44&shift     shamt rs1 rd
45&atomic    aq rl rs2 rs1 rd
46
47# Formats 32:
48@r       .......   ..... ..... ... ..... ....... &r                %rs2 %rs1 %rd
49@i       ............    ..... ... ..... ....... &i      imm=%imm_i     %rs1 %rd
50@b       .......   ..... ..... ... ..... ....... &b      imm=%imm_b %rs2 %rs1
51@s       .......   ..... ..... ... ..... ....... &s      imm=%imm_s %rs2 %rs1
52@u       ....................      ..... ....... &u      imm=%imm_u          %rd
53@j       ....................      ..... ....... &j      imm=%imm_j          %rd
54
55@sh      ......  ...... .....  ... ..... ....... &shift  shamt=%sh10      %rs1 %rd
56@csr     ............   .....  ... ..... .......               %csr     %rs1 %rd
57
58@atom_ld ..... aq:1 rl:1 ..... ........ ..... ....... &atomic rs2=0     %rs1 %rd
59@atom_st ..... aq:1 rl:1 ..... ........ ..... ....... &atomic %rs2      %rs1 %rd
60
61@r4_rm   ..... ..  ..... ..... ... ..... ....... %rs3 %rs2 %rs1 %rm %rd
62@r_rm    .......   ..... ..... ... ..... ....... %rs2 %rs1 %rm %rd
63@r2_rm   .......   ..... ..... ... ..... ....... %rs1 %rm %rd
64@r2      .......   ..... ..... ... ..... ....... %rs1 %rd
65
66@hfence_gvma ....... ..... .....   ... ..... ....... %rs2 %rs1
67@hfence_vvma ....... ..... .....   ... ..... ....... %rs2 %rs1
68
69@sfence_vma ....... ..... .....   ... ..... ....... %rs2 %rs1
70@sfence_vm  ....... ..... .....   ... ..... ....... %rs1
71
72
73# *** Privileged Instructions ***
74ecall       000000000000     00000 000 00000 1110011
75ebreak      000000000001     00000 000 00000 1110011
76uret        0000000    00010 00000 000 00000 1110011
77sret        0001000    00010 00000 000 00000 1110011
78mret        0011000    00010 00000 000 00000 1110011
79wfi         0001000    00101 00000 000 00000 1110011
80sfence_vma  0001001    ..... ..... 000 00000 1110011 @sfence_vma
81sfence_vm   0001000    00100 ..... 000 00000 1110011 @sfence_vm
82
83# *** RV32I Base Instruction Set ***
84lui      ....................       ..... 0110111 @u
85auipc    ....................       ..... 0010111 @u
86jal      ....................       ..... 1101111 @j
87jalr     ............     ..... 000 ..... 1100111 @i
88beq      ....... .....    ..... 000 ..... 1100011 @b
89bne      ....... .....    ..... 001 ..... 1100011 @b
90blt      ....... .....    ..... 100 ..... 1100011 @b
91bge      ....... .....    ..... 101 ..... 1100011 @b
92bltu     ....... .....    ..... 110 ..... 1100011 @b
93bgeu     ....... .....    ..... 111 ..... 1100011 @b
94lb       ............     ..... 000 ..... 0000011 @i
95lh       ............     ..... 001 ..... 0000011 @i
96lw       ............     ..... 010 ..... 0000011 @i
97lbu      ............     ..... 100 ..... 0000011 @i
98lhu      ............     ..... 101 ..... 0000011 @i
99sb       .......  .....   ..... 000 ..... 0100011 @s
100sh       .......  .....   ..... 001 ..... 0100011 @s
101sw       .......  .....   ..... 010 ..... 0100011 @s
102addi     ............     ..... 000 ..... 0010011 @i
103slti     ............     ..... 010 ..... 0010011 @i
104sltiu    ............     ..... 011 ..... 0010011 @i
105xori     ............     ..... 100 ..... 0010011 @i
106ori      ............     ..... 110 ..... 0010011 @i
107andi     ............     ..... 111 ..... 0010011 @i
108slli     00.... ......    ..... 001 ..... 0010011 @sh
109srli     00.... ......    ..... 101 ..... 0010011 @sh
110srai     01.... ......    ..... 101 ..... 0010011 @sh
111add      0000000 .....    ..... 000 ..... 0110011 @r
112sub      0100000 .....    ..... 000 ..... 0110011 @r
113sll      0000000 .....    ..... 001 ..... 0110011 @r
114slt      0000000 .....    ..... 010 ..... 0110011 @r
115sltu     0000000 .....    ..... 011 ..... 0110011 @r
116xor      0000000 .....    ..... 100 ..... 0110011 @r
117srl      0000000 .....    ..... 101 ..... 0110011 @r
118sra      0100000 .....    ..... 101 ..... 0110011 @r
119or       0000000 .....    ..... 110 ..... 0110011 @r
120and      0000000 .....    ..... 111 ..... 0110011 @r
121fence    ---- pred:4 succ:4 ----- 000 ----- 0001111
122fence_i  ---- ----   ----   ----- 001 ----- 0001111
123csrrw    ............     ..... 001 ..... 1110011 @csr
124csrrs    ............     ..... 010 ..... 1110011 @csr
125csrrc    ............     ..... 011 ..... 1110011 @csr
126csrrwi   ............     ..... 101 ..... 1110011 @csr
127csrrsi   ............     ..... 110 ..... 1110011 @csr
128csrrci   ............     ..... 111 ..... 1110011 @csr
129
130# *** RV32M Standard Extension ***
131mul      0000001 .....  ..... 000 ..... 0110011 @r
132mulh     0000001 .....  ..... 001 ..... 0110011 @r
133mulhsu   0000001 .....  ..... 010 ..... 0110011 @r
134mulhu    0000001 .....  ..... 011 ..... 0110011 @r
135div      0000001 .....  ..... 100 ..... 0110011 @r
136divu     0000001 .....  ..... 101 ..... 0110011 @r
137rem      0000001 .....  ..... 110 ..... 0110011 @r
138remu     0000001 .....  ..... 111 ..... 0110011 @r
139
140# *** RV32A Standard Extension ***
141lr_w       00010 . . 00000 ..... 010 ..... 0101111 @atom_ld
142sc_w       00011 . . ..... ..... 010 ..... 0101111 @atom_st
143amoswap_w  00001 . . ..... ..... 010 ..... 0101111 @atom_st
144amoadd_w   00000 . . ..... ..... 010 ..... 0101111 @atom_st
145amoxor_w   00100 . . ..... ..... 010 ..... 0101111 @atom_st
146amoand_w   01100 . . ..... ..... 010 ..... 0101111 @atom_st
147amoor_w    01000 . . ..... ..... 010 ..... 0101111 @atom_st
148amomin_w   10000 . . ..... ..... 010 ..... 0101111 @atom_st
149amomax_w   10100 . . ..... ..... 010 ..... 0101111 @atom_st
150amominu_w  11000 . . ..... ..... 010 ..... 0101111 @atom_st
151amomaxu_w  11100 . . ..... ..... 010 ..... 0101111 @atom_st
152
153# *** RV32F Standard Extension ***
154flw        ............   ..... 010 ..... 0000111 @i
155fsw        .......  ..... ..... 010 ..... 0100111 @s
156fmadd_s    ..... 00 ..... ..... ... ..... 1000011 @r4_rm
157fmsub_s    ..... 00 ..... ..... ... ..... 1000111 @r4_rm
158fnmsub_s   ..... 00 ..... ..... ... ..... 1001011 @r4_rm
159fnmadd_s   ..... 00 ..... ..... ... ..... 1001111 @r4_rm
160fadd_s     0000000  ..... ..... ... ..... 1010011 @r_rm
161fsub_s     0000100  ..... ..... ... ..... 1010011 @r_rm
162fmul_s     0001000  ..... ..... ... ..... 1010011 @r_rm
163fdiv_s     0001100  ..... ..... ... ..... 1010011 @r_rm
164fsqrt_s    0101100  00000 ..... ... ..... 1010011 @r2_rm
165fsgnj_s    0010000  ..... ..... 000 ..... 1010011 @r
166fsgnjn_s   0010000  ..... ..... 001 ..... 1010011 @r
167fsgnjx_s   0010000  ..... ..... 010 ..... 1010011 @r
168fmin_s     0010100  ..... ..... 000 ..... 1010011 @r
169fmax_s     0010100  ..... ..... 001 ..... 1010011 @r
170fcvt_w_s   1100000  00000 ..... ... ..... 1010011 @r2_rm
171fcvt_wu_s  1100000  00001 ..... ... ..... 1010011 @r2_rm
172fmv_x_w    1110000  00000 ..... 000 ..... 1010011 @r2
173feq_s      1010000  ..... ..... 010 ..... 1010011 @r
174flt_s      1010000  ..... ..... 001 ..... 1010011 @r
175fle_s      1010000  ..... ..... 000 ..... 1010011 @r
176fclass_s   1110000  00000 ..... 001 ..... 1010011 @r2
177fcvt_s_w   1101000  00000 ..... ... ..... 1010011 @r2_rm
178fcvt_s_wu  1101000  00001 ..... ... ..... 1010011 @r2_rm
179fmv_w_x    1111000  00000 ..... 000 ..... 1010011 @r2
180
181# *** RV32D Standard Extension ***
182fld        ............   ..... 011 ..... 0000111 @i
183fsd        ....... .....  ..... 011 ..... 0100111 @s
184fmadd_d    ..... 01 ..... ..... ... ..... 1000011 @r4_rm
185fmsub_d    ..... 01 ..... ..... ... ..... 1000111 @r4_rm
186fnmsub_d   ..... 01 ..... ..... ... ..... 1001011 @r4_rm
187fnmadd_d   ..... 01 ..... ..... ... ..... 1001111 @r4_rm
188fadd_d     0000001  ..... ..... ... ..... 1010011 @r_rm
189fsub_d     0000101  ..... ..... ... ..... 1010011 @r_rm
190fmul_d     0001001  ..... ..... ... ..... 1010011 @r_rm
191fdiv_d     0001101  ..... ..... ... ..... 1010011 @r_rm
192fsqrt_d    0101101  00000 ..... ... ..... 1010011 @r2_rm
193fsgnj_d    0010001  ..... ..... 000 ..... 1010011 @r
194fsgnjn_d   0010001  ..... ..... 001 ..... 1010011 @r
195fsgnjx_d   0010001  ..... ..... 010 ..... 1010011 @r
196fmin_d     0010101  ..... ..... 000 ..... 1010011 @r
197fmax_d     0010101  ..... ..... 001 ..... 1010011 @r
198fcvt_s_d   0100000  00001 ..... ... ..... 1010011 @r2_rm
199fcvt_d_s   0100001  00000 ..... ... ..... 1010011 @r2_rm
200feq_d      1010001  ..... ..... 010 ..... 1010011 @r
201flt_d      1010001  ..... ..... 001 ..... 1010011 @r
202fle_d      1010001  ..... ..... 000 ..... 1010011 @r
203fclass_d   1110001  00000 ..... 001 ..... 1010011 @r2
204fcvt_w_d   1100001  00000 ..... ... ..... 1010011 @r2_rm
205fcvt_wu_d  1100001  00001 ..... ... ..... 1010011 @r2_rm
206fcvt_d_w   1101001  00000 ..... ... ..... 1010011 @r2_rm
207fcvt_d_wu  1101001  00001 ..... ... ..... 1010011 @r2_rm
208
209# *** RV32H Base Instruction Set ***
210hfence_gvma 0110001  .....  ..... 000 00000 1110011 @hfence_gvma
211hfence_vvma 0010001  .....  ..... 000 00000 1110011 @hfence_vvma
212