1# 2# RISC-V translation routines for the RVXI Base Integer Instruction Set. 3# 4# Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de 5# Bastian Koppelmann, kbastian@mail.uni-paderborn.de 6# 7# This program is free software; you can redistribute it and/or modify it 8# under the terms and conditions of the GNU General Public License, 9# version 2 or later, as published by the Free Software Foundation. 10# 11# This program is distributed in the hope it will be useful, but WITHOUT 12# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14# more details. 15# 16# You should have received a copy of the GNU General Public License along with 17# this program. If not, see <http://www.gnu.org/licenses/>. 18 19# Fields: 20%rs3 27:5 21%rs2 20:5 22%rs1 15:5 23%rd 7:5 24%sh5 20:5 25 26%sh7 20:7 27%csr 20:12 28%rm 12:3 29%nf 29:3 !function=ex_plus_1 30 31# immediates: 32%imm_i 20:s12 33%imm_s 25:s7 7:5 34%imm_b 31:s1 7:1 25:6 8:4 !function=ex_shift_1 35%imm_j 31:s1 12:8 20:1 21:10 !function=ex_shift_1 36%imm_u 12:s20 !function=ex_shift_12 37 38# Argument sets: 39&empty 40&b imm rs2 rs1 41&i imm rs1 rd 42&j imm rd 43&r rd rs1 rs2 44&r2 rd rs1 45&r2_s rs1 rs2 46&s imm rs1 rs2 47&u imm rd 48&shift shamt rs1 rd 49&atomic aq rl rs2 rs1 rd 50&rmrr vm rd rs1 rs2 51&rmr vm rd rs2 52&r2nfvm vm rd rs1 nf 53&rnfvm vm rd rs1 rs2 nf 54 55# Formats 32: 56@r ....... ..... ..... ... ..... ....... &r %rs2 %rs1 %rd 57@i ............ ..... ... ..... ....... &i imm=%imm_i %rs1 %rd 58@b ....... ..... ..... ... ..... ....... &b imm=%imm_b %rs2 %rs1 59@s ....... ..... ..... ... ..... ....... &s imm=%imm_s %rs2 %rs1 60@u .................... ..... ....... &u imm=%imm_u %rd 61@j .................... ..... ....... &j imm=%imm_j %rd 62 63@sh ...... ...... ..... ... ..... ....... &shift shamt=%sh7 %rs1 %rd 64@csr ............ ..... ... ..... ....... %csr %rs1 %rd 65 66@atom_ld ..... aq:1 rl:1 ..... ........ ..... ....... &atomic rs2=0 %rs1 %rd 67@atom_st ..... aq:1 rl:1 ..... ........ ..... ....... &atomic %rs2 %rs1 %rd 68 69@r4_rm ..... .. ..... ..... ... ..... ....... %rs3 %rs2 %rs1 %rm %rd 70@r_rm ....... ..... ..... ... ..... ....... %rs2 %rs1 %rm %rd 71@r2_rm ....... ..... ..... ... ..... ....... %rs1 %rm %rd 72@r2 ....... ..... ..... ... ..... ....... &r2 %rs1 %rd 73@r2_nfvm ... ... vm:1 ..... ..... ... ..... ....... &r2nfvm %nf %rs1 %rd 74@r2_vm ...... vm:1 ..... ..... ... ..... ....... &rmr %rs2 %rd 75@r1_vm ...... vm:1 ..... ..... ... ..... ....... %rd 76@r_nfvm ... ... vm:1 ..... ..... ... ..... ....... &rnfvm %nf %rs2 %rs1 %rd 77@r2rd ....... ..... ..... ... ..... ....... %rs2 %rd 78@r_vm ...... vm:1 ..... ..... ... ..... ....... &rmrr %rs2 %rs1 %rd 79@r_vm_1 ...... . ..... ..... ... ..... ....... &rmrr vm=1 %rs2 %rs1 %rd 80@r_vm_0 ...... . ..... ..... ... ..... ....... &rmrr vm=0 %rs2 %rs1 %rd 81@r2_zimm11 . zimm:11 ..... ... ..... ....... %rs1 %rd 82@r2_zimm10 .. zimm:10 ..... ... ..... ....... %rs1 %rd 83@r2_s ....... ..... ..... ... ..... ....... %rs2 %rs1 84 85@hfence_gvma ....... ..... ..... ... ..... ....... %rs2 %rs1 86@hfence_vvma ....... ..... ..... ... ..... ....... %rs2 %rs1 87 88@sfence_vma ....... ..... ..... ... ..... ....... %rs2 %rs1 89@sfence_vm ....... ..... ..... ... ..... ....... %rs1 90 91# Formats 64: 92@sh5 ....... ..... ..... ... ..... ....... &shift shamt=%sh5 %rs1 %rd 93 94# *** Privileged Instructions *** 95ecall 000000000000 00000 000 00000 1110011 96ebreak 000000000001 00000 000 00000 1110011 97uret 0000000 00010 00000 000 00000 1110011 98sret 0001000 00010 00000 000 00000 1110011 99mret 0011000 00010 00000 000 00000 1110011 100wfi 0001000 00101 00000 000 00000 1110011 101sfence_vma 0001001 ..... ..... 000 00000 1110011 @sfence_vma 102sfence_vm 0001000 00100 ..... 000 00000 1110011 @sfence_vm 103 104# *** RV32I Base Instruction Set *** 105lui .................... ..... 0110111 @u 106auipc .................... ..... 0010111 @u 107jal .................... ..... 1101111 @j 108jalr ............ ..... 000 ..... 1100111 @i 109beq ....... ..... ..... 000 ..... 1100011 @b 110bne ....... ..... ..... 001 ..... 1100011 @b 111blt ....... ..... ..... 100 ..... 1100011 @b 112bge ....... ..... ..... 101 ..... 1100011 @b 113bltu ....... ..... ..... 110 ..... 1100011 @b 114bgeu ....... ..... ..... 111 ..... 1100011 @b 115lb ............ ..... 000 ..... 0000011 @i 116lh ............ ..... 001 ..... 0000011 @i 117lw ............ ..... 010 ..... 0000011 @i 118lbu ............ ..... 100 ..... 0000011 @i 119lhu ............ ..... 101 ..... 0000011 @i 120sb ....... ..... ..... 000 ..... 0100011 @s 121sh ....... ..... ..... 001 ..... 0100011 @s 122sw ....... ..... ..... 010 ..... 0100011 @s 123addi ............ ..... 000 ..... 0010011 @i 124slti ............ ..... 010 ..... 0010011 @i 125sltiu ............ ..... 011 ..... 0010011 @i 126xori ............ ..... 100 ..... 0010011 @i 127ori ............ ..... 110 ..... 0010011 @i 128andi ............ ..... 111 ..... 0010011 @i 129slli 00000. ...... ..... 001 ..... 0010011 @sh 130srli 00000. ...... ..... 101 ..... 0010011 @sh 131srai 01000. ...... ..... 101 ..... 0010011 @sh 132add 0000000 ..... ..... 000 ..... 0110011 @r 133sub 0100000 ..... ..... 000 ..... 0110011 @r 134sll 0000000 ..... ..... 001 ..... 0110011 @r 135slt 0000000 ..... ..... 010 ..... 0110011 @r 136sltu 0000000 ..... ..... 011 ..... 0110011 @r 137xor 0000000 ..... ..... 100 ..... 0110011 @r 138srl 0000000 ..... ..... 101 ..... 0110011 @r 139sra 0100000 ..... ..... 101 ..... 0110011 @r 140or 0000000 ..... ..... 110 ..... 0110011 @r 141and 0000000 ..... ..... 111 ..... 0110011 @r 142fence ---- pred:4 succ:4 ----- 000 ----- 0001111 143fence_i ---- ---- ---- ----- 001 ----- 0001111 144csrrw ............ ..... 001 ..... 1110011 @csr 145csrrs ............ ..... 010 ..... 1110011 @csr 146csrrc ............ ..... 011 ..... 1110011 @csr 147csrrwi ............ ..... 101 ..... 1110011 @csr 148csrrsi ............ ..... 110 ..... 1110011 @csr 149csrrci ............ ..... 111 ..... 1110011 @csr 150 151# *** RV64I Base Instruction Set (in addition to RV32I) *** 152lwu ............ ..... 110 ..... 0000011 @i 153ld ............ ..... 011 ..... 0000011 @i 154sd ....... ..... ..... 011 ..... 0100011 @s 155addiw ............ ..... 000 ..... 0011011 @i 156slliw 0000000 ..... ..... 001 ..... 0011011 @sh5 157srliw 0000000 ..... ..... 101 ..... 0011011 @sh5 158sraiw 0100000 ..... ..... 101 ..... 0011011 @sh5 159addw 0000000 ..... ..... 000 ..... 0111011 @r 160subw 0100000 ..... ..... 000 ..... 0111011 @r 161sllw 0000000 ..... ..... 001 ..... 0111011 @r 162srlw 0000000 ..... ..... 101 ..... 0111011 @r 163sraw 0100000 ..... ..... 101 ..... 0111011 @r 164 165# *** RV128I Base Instruction Set (in addition to RV64I) *** 166ldu ............ ..... 111 ..... 0000011 @i 167lq ............ ..... 010 ..... 0001111 @i 168sq ............ ..... 100 ..... 0100011 @s 169 170# *** RV32M Standard Extension *** 171mul 0000001 ..... ..... 000 ..... 0110011 @r 172mulh 0000001 ..... ..... 001 ..... 0110011 @r 173mulhsu 0000001 ..... ..... 010 ..... 0110011 @r 174mulhu 0000001 ..... ..... 011 ..... 0110011 @r 175div 0000001 ..... ..... 100 ..... 0110011 @r 176divu 0000001 ..... ..... 101 ..... 0110011 @r 177rem 0000001 ..... ..... 110 ..... 0110011 @r 178remu 0000001 ..... ..... 111 ..... 0110011 @r 179 180# *** RV64M Standard Extension (in addition to RV32M) *** 181mulw 0000001 ..... ..... 000 ..... 0111011 @r 182divw 0000001 ..... ..... 100 ..... 0111011 @r 183divuw 0000001 ..... ..... 101 ..... 0111011 @r 184remw 0000001 ..... ..... 110 ..... 0111011 @r 185remuw 0000001 ..... ..... 111 ..... 0111011 @r 186 187# *** RV32A Standard Extension *** 188lr_w 00010 . . 00000 ..... 010 ..... 0101111 @atom_ld 189sc_w 00011 . . ..... ..... 010 ..... 0101111 @atom_st 190amoswap_w 00001 . . ..... ..... 010 ..... 0101111 @atom_st 191amoadd_w 00000 . . ..... ..... 010 ..... 0101111 @atom_st 192amoxor_w 00100 . . ..... ..... 010 ..... 0101111 @atom_st 193amoand_w 01100 . . ..... ..... 010 ..... 0101111 @atom_st 194amoor_w 01000 . . ..... ..... 010 ..... 0101111 @atom_st 195amomin_w 10000 . . ..... ..... 010 ..... 0101111 @atom_st 196amomax_w 10100 . . ..... ..... 010 ..... 0101111 @atom_st 197amominu_w 11000 . . ..... ..... 010 ..... 0101111 @atom_st 198amomaxu_w 11100 . . ..... ..... 010 ..... 0101111 @atom_st 199 200# *** RV64A Standard Extension (in addition to RV32A) *** 201lr_d 00010 . . 00000 ..... 011 ..... 0101111 @atom_ld 202sc_d 00011 . . ..... ..... 011 ..... 0101111 @atom_st 203amoswap_d 00001 . . ..... ..... 011 ..... 0101111 @atom_st 204amoadd_d 00000 . . ..... ..... 011 ..... 0101111 @atom_st 205amoxor_d 00100 . . ..... ..... 011 ..... 0101111 @atom_st 206amoand_d 01100 . . ..... ..... 011 ..... 0101111 @atom_st 207amoor_d 01000 . . ..... ..... 011 ..... 0101111 @atom_st 208amomin_d 10000 . . ..... ..... 011 ..... 0101111 @atom_st 209amomax_d 10100 . . ..... ..... 011 ..... 0101111 @atom_st 210amominu_d 11000 . . ..... ..... 011 ..... 0101111 @atom_st 211amomaxu_d 11100 . . ..... ..... 011 ..... 0101111 @atom_st 212 213# *** RV32F Standard Extension *** 214flw ............ ..... 010 ..... 0000111 @i 215fsw ....... ..... ..... 010 ..... 0100111 @s 216fmadd_s ..... 00 ..... ..... ... ..... 1000011 @r4_rm 217fmsub_s ..... 00 ..... ..... ... ..... 1000111 @r4_rm 218fnmsub_s ..... 00 ..... ..... ... ..... 1001011 @r4_rm 219fnmadd_s ..... 00 ..... ..... ... ..... 1001111 @r4_rm 220fadd_s 0000000 ..... ..... ... ..... 1010011 @r_rm 221fsub_s 0000100 ..... ..... ... ..... 1010011 @r_rm 222fmul_s 0001000 ..... ..... ... ..... 1010011 @r_rm 223fdiv_s 0001100 ..... ..... ... ..... 1010011 @r_rm 224fsqrt_s 0101100 00000 ..... ... ..... 1010011 @r2_rm 225fsgnj_s 0010000 ..... ..... 000 ..... 1010011 @r 226fsgnjn_s 0010000 ..... ..... 001 ..... 1010011 @r 227fsgnjx_s 0010000 ..... ..... 010 ..... 1010011 @r 228fmin_s 0010100 ..... ..... 000 ..... 1010011 @r 229fmax_s 0010100 ..... ..... 001 ..... 1010011 @r 230fcvt_w_s 1100000 00000 ..... ... ..... 1010011 @r2_rm 231fcvt_wu_s 1100000 00001 ..... ... ..... 1010011 @r2_rm 232fmv_x_w 1110000 00000 ..... 000 ..... 1010011 @r2 233feq_s 1010000 ..... ..... 010 ..... 1010011 @r 234flt_s 1010000 ..... ..... 001 ..... 1010011 @r 235fle_s 1010000 ..... ..... 000 ..... 1010011 @r 236fclass_s 1110000 00000 ..... 001 ..... 1010011 @r2 237fcvt_s_w 1101000 00000 ..... ... ..... 1010011 @r2_rm 238fcvt_s_wu 1101000 00001 ..... ... ..... 1010011 @r2_rm 239fmv_w_x 1111000 00000 ..... 000 ..... 1010011 @r2 240 241# *** RV64F Standard Extension (in addition to RV32F) *** 242fcvt_l_s 1100000 00010 ..... ... ..... 1010011 @r2_rm 243fcvt_lu_s 1100000 00011 ..... ... ..... 1010011 @r2_rm 244fcvt_s_l 1101000 00010 ..... ... ..... 1010011 @r2_rm 245fcvt_s_lu 1101000 00011 ..... ... ..... 1010011 @r2_rm 246 247# *** RV32D Standard Extension *** 248fld ............ ..... 011 ..... 0000111 @i 249fsd ....... ..... ..... 011 ..... 0100111 @s 250fmadd_d ..... 01 ..... ..... ... ..... 1000011 @r4_rm 251fmsub_d ..... 01 ..... ..... ... ..... 1000111 @r4_rm 252fnmsub_d ..... 01 ..... ..... ... ..... 1001011 @r4_rm 253fnmadd_d ..... 01 ..... ..... ... ..... 1001111 @r4_rm 254fadd_d 0000001 ..... ..... ... ..... 1010011 @r_rm 255fsub_d 0000101 ..... ..... ... ..... 1010011 @r_rm 256fmul_d 0001001 ..... ..... ... ..... 1010011 @r_rm 257fdiv_d 0001101 ..... ..... ... ..... 1010011 @r_rm 258fsqrt_d 0101101 00000 ..... ... ..... 1010011 @r2_rm 259fsgnj_d 0010001 ..... ..... 000 ..... 1010011 @r 260fsgnjn_d 0010001 ..... ..... 001 ..... 1010011 @r 261fsgnjx_d 0010001 ..... ..... 010 ..... 1010011 @r 262fmin_d 0010101 ..... ..... 000 ..... 1010011 @r 263fmax_d 0010101 ..... ..... 001 ..... 1010011 @r 264fcvt_s_d 0100000 00001 ..... ... ..... 1010011 @r2_rm 265fcvt_d_s 0100001 00000 ..... ... ..... 1010011 @r2_rm 266feq_d 1010001 ..... ..... 010 ..... 1010011 @r 267flt_d 1010001 ..... ..... 001 ..... 1010011 @r 268fle_d 1010001 ..... ..... 000 ..... 1010011 @r 269fclass_d 1110001 00000 ..... 001 ..... 1010011 @r2 270fcvt_w_d 1100001 00000 ..... ... ..... 1010011 @r2_rm 271fcvt_wu_d 1100001 00001 ..... ... ..... 1010011 @r2_rm 272fcvt_d_w 1101001 00000 ..... ... ..... 1010011 @r2_rm 273fcvt_d_wu 1101001 00001 ..... ... ..... 1010011 @r2_rm 274 275# *** RV64D Standard Extension (in addition to RV32D) *** 276fcvt_l_d 1100001 00010 ..... ... ..... 1010011 @r2_rm 277fcvt_lu_d 1100001 00011 ..... ... ..... 1010011 @r2_rm 278fmv_x_d 1110001 00000 ..... 000 ..... 1010011 @r2 279fcvt_d_l 1101001 00010 ..... ... ..... 1010011 @r2_rm 280fcvt_d_lu 1101001 00011 ..... ... ..... 1010011 @r2_rm 281fmv_d_x 1111001 00000 ..... 000 ..... 1010011 @r2 282 283# *** RV32H Base Instruction Set *** 284hlv_b 0110000 00000 ..... 100 ..... 1110011 @r2 285hlv_bu 0110000 00001 ..... 100 ..... 1110011 @r2 286hlv_h 0110010 00000 ..... 100 ..... 1110011 @r2 287hlv_hu 0110010 00001 ..... 100 ..... 1110011 @r2 288hlvx_hu 0110010 00011 ..... 100 ..... 1110011 @r2 289hlv_w 0110100 00000 ..... 100 ..... 1110011 @r2 290hlvx_wu 0110100 00011 ..... 100 ..... 1110011 @r2 291hsv_b 0110001 ..... ..... 100 00000 1110011 @r2_s 292hsv_h 0110011 ..... ..... 100 00000 1110011 @r2_s 293hsv_w 0110101 ..... ..... 100 00000 1110011 @r2_s 294hfence_gvma 0110001 ..... ..... 000 00000 1110011 @hfence_gvma 295hfence_vvma 0010001 ..... ..... 000 00000 1110011 @hfence_vvma 296 297# *** RV64H Base Instruction Set *** 298hlv_wu 0110100 00001 ..... 100 ..... 1110011 @r2 299hlv_d 0110110 00000 ..... 100 ..... 1110011 @r2 300hsv_d 0110111 ..... ..... 100 00000 1110011 @r2_s 301 302# *** Vector loads and stores are encoded within LOADFP/STORE-FP *** 303# Vector unit-stride load/store insns. 304vle8_v ... 000 . 00000 ..... 000 ..... 0000111 @r2_nfvm 305vle16_v ... 000 . 00000 ..... 101 ..... 0000111 @r2_nfvm 306vle32_v ... 000 . 00000 ..... 110 ..... 0000111 @r2_nfvm 307vle64_v ... 000 . 00000 ..... 111 ..... 0000111 @r2_nfvm 308vse8_v ... 000 . 00000 ..... 000 ..... 0100111 @r2_nfvm 309vse16_v ... 000 . 00000 ..... 101 ..... 0100111 @r2_nfvm 310vse32_v ... 000 . 00000 ..... 110 ..... 0100111 @r2_nfvm 311vse64_v ... 000 . 00000 ..... 111 ..... 0100111 @r2_nfvm 312 313# Vector unit-stride mask load/store insns. 314vlm_v 000 000 1 01011 ..... 000 ..... 0000111 @r2 315vsm_v 000 000 1 01011 ..... 000 ..... 0100111 @r2 316 317# Vector strided insns. 318vlse8_v ... 010 . ..... ..... 000 ..... 0000111 @r_nfvm 319vlse16_v ... 010 . ..... ..... 101 ..... 0000111 @r_nfvm 320vlse32_v ... 010 . ..... ..... 110 ..... 0000111 @r_nfvm 321vlse64_v ... 010 . ..... ..... 111 ..... 0000111 @r_nfvm 322vsse8_v ... 010 . ..... ..... 000 ..... 0100111 @r_nfvm 323vsse16_v ... 010 . ..... ..... 101 ..... 0100111 @r_nfvm 324vsse32_v ... 010 . ..... ..... 110 ..... 0100111 @r_nfvm 325vsse64_v ... 010 . ..... ..... 111 ..... 0100111 @r_nfvm 326 327# Vector ordered-indexed and unordered-indexed load insns. 328vlxei8_v ... 0-1 . ..... ..... 000 ..... 0000111 @r_nfvm 329vlxei16_v ... 0-1 . ..... ..... 101 ..... 0000111 @r_nfvm 330vlxei32_v ... 0-1 . ..... ..... 110 ..... 0000111 @r_nfvm 331vlxei64_v ... 0-1 . ..... ..... 111 ..... 0000111 @r_nfvm 332 333# Vector ordered-indexed and unordered-indexed store insns. 334vsxei8_v ... 0-1 . ..... ..... 000 ..... 0100111 @r_nfvm 335vsxei16_v ... 0-1 . ..... ..... 101 ..... 0100111 @r_nfvm 336vsxei32_v ... 0-1 . ..... ..... 110 ..... 0100111 @r_nfvm 337vsxei64_v ... 0-1 . ..... ..... 111 ..... 0100111 @r_nfvm 338 339# Vector unit-stride fault-only-first load insns. 340vle8ff_v ... 000 . 10000 ..... 000 ..... 0000111 @r2_nfvm 341vle16ff_v ... 000 . 10000 ..... 101 ..... 0000111 @r2_nfvm 342vle32ff_v ... 000 . 10000 ..... 110 ..... 0000111 @r2_nfvm 343vle64ff_v ... 000 . 10000 ..... 111 ..... 0000111 @r2_nfvm 344 345# Vector whole register insns 346vl1re8_v 000 000 1 01000 ..... 000 ..... 0000111 @r2 347vl1re16_v 000 000 1 01000 ..... 101 ..... 0000111 @r2 348vl1re32_v 000 000 1 01000 ..... 110 ..... 0000111 @r2 349vl1re64_v 000 000 1 01000 ..... 111 ..... 0000111 @r2 350vl2re8_v 001 000 1 01000 ..... 000 ..... 0000111 @r2 351vl2re16_v 001 000 1 01000 ..... 101 ..... 0000111 @r2 352vl2re32_v 001 000 1 01000 ..... 110 ..... 0000111 @r2 353vl2re64_v 001 000 1 01000 ..... 111 ..... 0000111 @r2 354vl4re8_v 011 000 1 01000 ..... 000 ..... 0000111 @r2 355vl4re16_v 011 000 1 01000 ..... 101 ..... 0000111 @r2 356vl4re32_v 011 000 1 01000 ..... 110 ..... 0000111 @r2 357vl4re64_v 011 000 1 01000 ..... 111 ..... 0000111 @r2 358vl8re8_v 111 000 1 01000 ..... 000 ..... 0000111 @r2 359vl8re16_v 111 000 1 01000 ..... 101 ..... 0000111 @r2 360vl8re32_v 111 000 1 01000 ..... 110 ..... 0000111 @r2 361vl8re64_v 111 000 1 01000 ..... 111 ..... 0000111 @r2 362vs1r_v 000 000 1 01000 ..... 000 ..... 0100111 @r2 363vs2r_v 001 000 1 01000 ..... 000 ..... 0100111 @r2 364vs4r_v 011 000 1 01000 ..... 000 ..... 0100111 @r2 365vs8r_v 111 000 1 01000 ..... 000 ..... 0100111 @r2 366 367# *** new major opcode OP-V *** 368vadd_vv 000000 . ..... ..... 000 ..... 1010111 @r_vm 369vadd_vx 000000 . ..... ..... 100 ..... 1010111 @r_vm 370vadd_vi 000000 . ..... ..... 011 ..... 1010111 @r_vm 371vsub_vv 000010 . ..... ..... 000 ..... 1010111 @r_vm 372vsub_vx 000010 . ..... ..... 100 ..... 1010111 @r_vm 373vrsub_vx 000011 . ..... ..... 100 ..... 1010111 @r_vm 374vrsub_vi 000011 . ..... ..... 011 ..... 1010111 @r_vm 375vwaddu_vv 110000 . ..... ..... 010 ..... 1010111 @r_vm 376vwaddu_vx 110000 . ..... ..... 110 ..... 1010111 @r_vm 377vwadd_vv 110001 . ..... ..... 010 ..... 1010111 @r_vm 378vwadd_vx 110001 . ..... ..... 110 ..... 1010111 @r_vm 379vwsubu_vv 110010 . ..... ..... 010 ..... 1010111 @r_vm 380vwsubu_vx 110010 . ..... ..... 110 ..... 1010111 @r_vm 381vwsub_vv 110011 . ..... ..... 010 ..... 1010111 @r_vm 382vwsub_vx 110011 . ..... ..... 110 ..... 1010111 @r_vm 383vwaddu_wv 110100 . ..... ..... 010 ..... 1010111 @r_vm 384vwaddu_wx 110100 . ..... ..... 110 ..... 1010111 @r_vm 385vwadd_wv 110101 . ..... ..... 010 ..... 1010111 @r_vm 386vwadd_wx 110101 . ..... ..... 110 ..... 1010111 @r_vm 387vwsubu_wv 110110 . ..... ..... 010 ..... 1010111 @r_vm 388vwsubu_wx 110110 . ..... ..... 110 ..... 1010111 @r_vm 389vwsub_wv 110111 . ..... ..... 010 ..... 1010111 @r_vm 390vwsub_wx 110111 . ..... ..... 110 ..... 1010111 @r_vm 391vadc_vvm 010000 0 ..... ..... 000 ..... 1010111 @r_vm_1 392vadc_vxm 010000 0 ..... ..... 100 ..... 1010111 @r_vm_1 393vadc_vim 010000 0 ..... ..... 011 ..... 1010111 @r_vm_1 394vmadc_vvm 010001 . ..... ..... 000 ..... 1010111 @r_vm 395vmadc_vxm 010001 . ..... ..... 100 ..... 1010111 @r_vm 396vmadc_vim 010001 . ..... ..... 011 ..... 1010111 @r_vm 397vsbc_vvm 010010 0 ..... ..... 000 ..... 1010111 @r_vm_1 398vsbc_vxm 010010 0 ..... ..... 100 ..... 1010111 @r_vm_1 399vmsbc_vvm 010011 . ..... ..... 000 ..... 1010111 @r_vm 400vmsbc_vxm 010011 . ..... ..... 100 ..... 1010111 @r_vm 401vand_vv 001001 . ..... ..... 000 ..... 1010111 @r_vm 402vand_vx 001001 . ..... ..... 100 ..... 1010111 @r_vm 403vand_vi 001001 . ..... ..... 011 ..... 1010111 @r_vm 404vor_vv 001010 . ..... ..... 000 ..... 1010111 @r_vm 405vor_vx 001010 . ..... ..... 100 ..... 1010111 @r_vm 406vor_vi 001010 . ..... ..... 011 ..... 1010111 @r_vm 407vxor_vv 001011 . ..... ..... 000 ..... 1010111 @r_vm 408vxor_vx 001011 . ..... ..... 100 ..... 1010111 @r_vm 409vxor_vi 001011 . ..... ..... 011 ..... 1010111 @r_vm 410vsll_vv 100101 . ..... ..... 000 ..... 1010111 @r_vm 411vsll_vx 100101 . ..... ..... 100 ..... 1010111 @r_vm 412vsll_vi 100101 . ..... ..... 011 ..... 1010111 @r_vm 413vsrl_vv 101000 . ..... ..... 000 ..... 1010111 @r_vm 414vsrl_vx 101000 . ..... ..... 100 ..... 1010111 @r_vm 415vsrl_vi 101000 . ..... ..... 011 ..... 1010111 @r_vm 416vsra_vv 101001 . ..... ..... 000 ..... 1010111 @r_vm 417vsra_vx 101001 . ..... ..... 100 ..... 1010111 @r_vm 418vsra_vi 101001 . ..... ..... 011 ..... 1010111 @r_vm 419vnsrl_wv 101100 . ..... ..... 000 ..... 1010111 @r_vm 420vnsrl_wx 101100 . ..... ..... 100 ..... 1010111 @r_vm 421vnsrl_wi 101100 . ..... ..... 011 ..... 1010111 @r_vm 422vnsra_wv 101101 . ..... ..... 000 ..... 1010111 @r_vm 423vnsra_wx 101101 . ..... ..... 100 ..... 1010111 @r_vm 424vnsra_wi 101101 . ..... ..... 011 ..... 1010111 @r_vm 425vmseq_vv 011000 . ..... ..... 000 ..... 1010111 @r_vm 426vmseq_vx 011000 . ..... ..... 100 ..... 1010111 @r_vm 427vmseq_vi 011000 . ..... ..... 011 ..... 1010111 @r_vm 428vmsne_vv 011001 . ..... ..... 000 ..... 1010111 @r_vm 429vmsne_vx 011001 . ..... ..... 100 ..... 1010111 @r_vm 430vmsne_vi 011001 . ..... ..... 011 ..... 1010111 @r_vm 431vmsltu_vv 011010 . ..... ..... 000 ..... 1010111 @r_vm 432vmsltu_vx 011010 . ..... ..... 100 ..... 1010111 @r_vm 433vmslt_vv 011011 . ..... ..... 000 ..... 1010111 @r_vm 434vmslt_vx 011011 . ..... ..... 100 ..... 1010111 @r_vm 435vmsleu_vv 011100 . ..... ..... 000 ..... 1010111 @r_vm 436vmsleu_vx 011100 . ..... ..... 100 ..... 1010111 @r_vm 437vmsleu_vi 011100 . ..... ..... 011 ..... 1010111 @r_vm 438vmsle_vv 011101 . ..... ..... 000 ..... 1010111 @r_vm 439vmsle_vx 011101 . ..... ..... 100 ..... 1010111 @r_vm 440vmsle_vi 011101 . ..... ..... 011 ..... 1010111 @r_vm 441vmsgtu_vx 011110 . ..... ..... 100 ..... 1010111 @r_vm 442vmsgtu_vi 011110 . ..... ..... 011 ..... 1010111 @r_vm 443vmsgt_vx 011111 . ..... ..... 100 ..... 1010111 @r_vm 444vmsgt_vi 011111 . ..... ..... 011 ..... 1010111 @r_vm 445vminu_vv 000100 . ..... ..... 000 ..... 1010111 @r_vm 446vminu_vx 000100 . ..... ..... 100 ..... 1010111 @r_vm 447vmin_vv 000101 . ..... ..... 000 ..... 1010111 @r_vm 448vmin_vx 000101 . ..... ..... 100 ..... 1010111 @r_vm 449vmaxu_vv 000110 . ..... ..... 000 ..... 1010111 @r_vm 450vmaxu_vx 000110 . ..... ..... 100 ..... 1010111 @r_vm 451vmax_vv 000111 . ..... ..... 000 ..... 1010111 @r_vm 452vmax_vx 000111 . ..... ..... 100 ..... 1010111 @r_vm 453vmul_vv 100101 . ..... ..... 010 ..... 1010111 @r_vm 454vmul_vx 100101 . ..... ..... 110 ..... 1010111 @r_vm 455vmulh_vv 100111 . ..... ..... 010 ..... 1010111 @r_vm 456vmulh_vx 100111 . ..... ..... 110 ..... 1010111 @r_vm 457vmulhu_vv 100100 . ..... ..... 010 ..... 1010111 @r_vm 458vmulhu_vx 100100 . ..... ..... 110 ..... 1010111 @r_vm 459vmulhsu_vv 100110 . ..... ..... 010 ..... 1010111 @r_vm 460vmulhsu_vx 100110 . ..... ..... 110 ..... 1010111 @r_vm 461vdivu_vv 100000 . ..... ..... 010 ..... 1010111 @r_vm 462vdivu_vx 100000 . ..... ..... 110 ..... 1010111 @r_vm 463vdiv_vv 100001 . ..... ..... 010 ..... 1010111 @r_vm 464vdiv_vx 100001 . ..... ..... 110 ..... 1010111 @r_vm 465vremu_vv 100010 . ..... ..... 010 ..... 1010111 @r_vm 466vremu_vx 100010 . ..... ..... 110 ..... 1010111 @r_vm 467vrem_vv 100011 . ..... ..... 010 ..... 1010111 @r_vm 468vrem_vx 100011 . ..... ..... 110 ..... 1010111 @r_vm 469vwmulu_vv 111000 . ..... ..... 010 ..... 1010111 @r_vm 470vwmulu_vx 111000 . ..... ..... 110 ..... 1010111 @r_vm 471vwmulsu_vv 111010 . ..... ..... 010 ..... 1010111 @r_vm 472vwmulsu_vx 111010 . ..... ..... 110 ..... 1010111 @r_vm 473vwmul_vv 111011 . ..... ..... 010 ..... 1010111 @r_vm 474vwmul_vx 111011 . ..... ..... 110 ..... 1010111 @r_vm 475vmacc_vv 101101 . ..... ..... 010 ..... 1010111 @r_vm 476vmacc_vx 101101 . ..... ..... 110 ..... 1010111 @r_vm 477vnmsac_vv 101111 . ..... ..... 010 ..... 1010111 @r_vm 478vnmsac_vx 101111 . ..... ..... 110 ..... 1010111 @r_vm 479vmadd_vv 101001 . ..... ..... 010 ..... 1010111 @r_vm 480vmadd_vx 101001 . ..... ..... 110 ..... 1010111 @r_vm 481vnmsub_vv 101011 . ..... ..... 010 ..... 1010111 @r_vm 482vnmsub_vx 101011 . ..... ..... 110 ..... 1010111 @r_vm 483vwmaccu_vv 111100 . ..... ..... 010 ..... 1010111 @r_vm 484vwmaccu_vx 111100 . ..... ..... 110 ..... 1010111 @r_vm 485vwmacc_vv 111101 . ..... ..... 010 ..... 1010111 @r_vm 486vwmacc_vx 111101 . ..... ..... 110 ..... 1010111 @r_vm 487vwmaccsu_vv 111111 . ..... ..... 010 ..... 1010111 @r_vm 488vwmaccsu_vx 111111 . ..... ..... 110 ..... 1010111 @r_vm 489vwmaccus_vx 111110 . ..... ..... 110 ..... 1010111 @r_vm 490vmv_v_v 010111 1 00000 ..... 000 ..... 1010111 @r2 491vmv_v_x 010111 1 00000 ..... 100 ..... 1010111 @r2 492vmv_v_i 010111 1 00000 ..... 011 ..... 1010111 @r2 493vmerge_vvm 010111 0 ..... ..... 000 ..... 1010111 @r_vm_0 494vmerge_vxm 010111 0 ..... ..... 100 ..... 1010111 @r_vm_0 495vmerge_vim 010111 0 ..... ..... 011 ..... 1010111 @r_vm_0 496vsaddu_vv 100000 . ..... ..... 000 ..... 1010111 @r_vm 497vsaddu_vx 100000 . ..... ..... 100 ..... 1010111 @r_vm 498vsaddu_vi 100000 . ..... ..... 011 ..... 1010111 @r_vm 499vsadd_vv 100001 . ..... ..... 000 ..... 1010111 @r_vm 500vsadd_vx 100001 . ..... ..... 100 ..... 1010111 @r_vm 501vsadd_vi 100001 . ..... ..... 011 ..... 1010111 @r_vm 502vssubu_vv 100010 . ..... ..... 000 ..... 1010111 @r_vm 503vssubu_vx 100010 . ..... ..... 100 ..... 1010111 @r_vm 504vssub_vv 100011 . ..... ..... 000 ..... 1010111 @r_vm 505vssub_vx 100011 . ..... ..... 100 ..... 1010111 @r_vm 506vaadd_vv 001001 . ..... ..... 010 ..... 1010111 @r_vm 507vaadd_vx 001001 . ..... ..... 110 ..... 1010111 @r_vm 508vaaddu_vv 001000 . ..... ..... 010 ..... 1010111 @r_vm 509vaaddu_vx 001000 . ..... ..... 110 ..... 1010111 @r_vm 510vasub_vv 001011 . ..... ..... 010 ..... 1010111 @r_vm 511vasub_vx 001011 . ..... ..... 110 ..... 1010111 @r_vm 512vasubu_vv 001010 . ..... ..... 010 ..... 1010111 @r_vm 513vasubu_vx 001010 . ..... ..... 110 ..... 1010111 @r_vm 514vsmul_vv 100111 . ..... ..... 000 ..... 1010111 @r_vm 515vsmul_vx 100111 . ..... ..... 100 ..... 1010111 @r_vm 516vssrl_vv 101010 . ..... ..... 000 ..... 1010111 @r_vm 517vssrl_vx 101010 . ..... ..... 100 ..... 1010111 @r_vm 518vssrl_vi 101010 . ..... ..... 011 ..... 1010111 @r_vm 519vssra_vv 101011 . ..... ..... 000 ..... 1010111 @r_vm 520vssra_vx 101011 . ..... ..... 100 ..... 1010111 @r_vm 521vssra_vi 101011 . ..... ..... 011 ..... 1010111 @r_vm 522vnclipu_wv 101110 . ..... ..... 000 ..... 1010111 @r_vm 523vnclipu_wx 101110 . ..... ..... 100 ..... 1010111 @r_vm 524vnclipu_wi 101110 . ..... ..... 011 ..... 1010111 @r_vm 525vnclip_wv 101111 . ..... ..... 000 ..... 1010111 @r_vm 526vnclip_wx 101111 . ..... ..... 100 ..... 1010111 @r_vm 527vnclip_wi 101111 . ..... ..... 011 ..... 1010111 @r_vm 528vfadd_vv 000000 . ..... ..... 001 ..... 1010111 @r_vm 529vfadd_vf 000000 . ..... ..... 101 ..... 1010111 @r_vm 530vfsub_vv 000010 . ..... ..... 001 ..... 1010111 @r_vm 531vfsub_vf 000010 . ..... ..... 101 ..... 1010111 @r_vm 532vfrsub_vf 100111 . ..... ..... 101 ..... 1010111 @r_vm 533vfwadd_vv 110000 . ..... ..... 001 ..... 1010111 @r_vm 534vfwadd_vf 110000 . ..... ..... 101 ..... 1010111 @r_vm 535vfwadd_wv 110100 . ..... ..... 001 ..... 1010111 @r_vm 536vfwadd_wf 110100 . ..... ..... 101 ..... 1010111 @r_vm 537vfwsub_vv 110010 . ..... ..... 001 ..... 1010111 @r_vm 538vfwsub_vf 110010 . ..... ..... 101 ..... 1010111 @r_vm 539vfwsub_wv 110110 . ..... ..... 001 ..... 1010111 @r_vm 540vfwsub_wf 110110 . ..... ..... 101 ..... 1010111 @r_vm 541vfmul_vv 100100 . ..... ..... 001 ..... 1010111 @r_vm 542vfmul_vf 100100 . ..... ..... 101 ..... 1010111 @r_vm 543vfdiv_vv 100000 . ..... ..... 001 ..... 1010111 @r_vm 544vfdiv_vf 100000 . ..... ..... 101 ..... 1010111 @r_vm 545vfrdiv_vf 100001 . ..... ..... 101 ..... 1010111 @r_vm 546vfwmul_vv 111000 . ..... ..... 001 ..... 1010111 @r_vm 547vfwmul_vf 111000 . ..... ..... 101 ..... 1010111 @r_vm 548vfmacc_vv 101100 . ..... ..... 001 ..... 1010111 @r_vm 549vfnmacc_vv 101101 . ..... ..... 001 ..... 1010111 @r_vm 550vfnmacc_vf 101101 . ..... ..... 101 ..... 1010111 @r_vm 551vfmacc_vf 101100 . ..... ..... 101 ..... 1010111 @r_vm 552vfmsac_vv 101110 . ..... ..... 001 ..... 1010111 @r_vm 553vfmsac_vf 101110 . ..... ..... 101 ..... 1010111 @r_vm 554vfnmsac_vv 101111 . ..... ..... 001 ..... 1010111 @r_vm 555vfnmsac_vf 101111 . ..... ..... 101 ..... 1010111 @r_vm 556vfmadd_vv 101000 . ..... ..... 001 ..... 1010111 @r_vm 557vfmadd_vf 101000 . ..... ..... 101 ..... 1010111 @r_vm 558vfnmadd_vv 101001 . ..... ..... 001 ..... 1010111 @r_vm 559vfnmadd_vf 101001 . ..... ..... 101 ..... 1010111 @r_vm 560vfmsub_vv 101010 . ..... ..... 001 ..... 1010111 @r_vm 561vfmsub_vf 101010 . ..... ..... 101 ..... 1010111 @r_vm 562vfnmsub_vv 101011 . ..... ..... 001 ..... 1010111 @r_vm 563vfnmsub_vf 101011 . ..... ..... 101 ..... 1010111 @r_vm 564vfwmacc_vv 111100 . ..... ..... 001 ..... 1010111 @r_vm 565vfwmacc_vf 111100 . ..... ..... 101 ..... 1010111 @r_vm 566vfwnmacc_vv 111101 . ..... ..... 001 ..... 1010111 @r_vm 567vfwnmacc_vf 111101 . ..... ..... 101 ..... 1010111 @r_vm 568vfwmsac_vv 111110 . ..... ..... 001 ..... 1010111 @r_vm 569vfwmsac_vf 111110 . ..... ..... 101 ..... 1010111 @r_vm 570vfwnmsac_vv 111111 . ..... ..... 001 ..... 1010111 @r_vm 571vfwnmsac_vf 111111 . ..... ..... 101 ..... 1010111 @r_vm 572vfsqrt_v 010011 . ..... 00000 001 ..... 1010111 @r2_vm 573vfrsqrt7_v 010011 . ..... 00100 001 ..... 1010111 @r2_vm 574vfrec7_v 010011 . ..... 00101 001 ..... 1010111 @r2_vm 575vfmin_vv 000100 . ..... ..... 001 ..... 1010111 @r_vm 576vfmin_vf 000100 . ..... ..... 101 ..... 1010111 @r_vm 577vfmax_vv 000110 . ..... ..... 001 ..... 1010111 @r_vm 578vfmax_vf 000110 . ..... ..... 101 ..... 1010111 @r_vm 579vfsgnj_vv 001000 . ..... ..... 001 ..... 1010111 @r_vm 580vfsgnj_vf 001000 . ..... ..... 101 ..... 1010111 @r_vm 581vfsgnjn_vv 001001 . ..... ..... 001 ..... 1010111 @r_vm 582vfsgnjn_vf 001001 . ..... ..... 101 ..... 1010111 @r_vm 583vfsgnjx_vv 001010 . ..... ..... 001 ..... 1010111 @r_vm 584vfsgnjx_vf 001010 . ..... ..... 101 ..... 1010111 @r_vm 585vfslide1up_vf 001110 . ..... ..... 101 ..... 1010111 @r_vm 586vfslide1down_vf 001111 . ..... ..... 101 ..... 1010111 @r_vm 587vmfeq_vv 011000 . ..... ..... 001 ..... 1010111 @r_vm 588vmfeq_vf 011000 . ..... ..... 101 ..... 1010111 @r_vm 589vmfne_vv 011100 . ..... ..... 001 ..... 1010111 @r_vm 590vmfne_vf 011100 . ..... ..... 101 ..... 1010111 @r_vm 591vmflt_vv 011011 . ..... ..... 001 ..... 1010111 @r_vm 592vmflt_vf 011011 . ..... ..... 101 ..... 1010111 @r_vm 593vmfle_vv 011001 . ..... ..... 001 ..... 1010111 @r_vm 594vmfle_vf 011001 . ..... ..... 101 ..... 1010111 @r_vm 595vmfgt_vf 011101 . ..... ..... 101 ..... 1010111 @r_vm 596vmfge_vf 011111 . ..... ..... 101 ..... 1010111 @r_vm 597vfclass_v 010011 . ..... 10000 001 ..... 1010111 @r2_vm 598vfmerge_vfm 010111 0 ..... ..... 101 ..... 1010111 @r_vm_0 599vfmv_v_f 010111 1 00000 ..... 101 ..... 1010111 @r2 600 601vfcvt_xu_f_v 010010 . ..... 00000 001 ..... 1010111 @r2_vm 602vfcvt_x_f_v 010010 . ..... 00001 001 ..... 1010111 @r2_vm 603vfcvt_f_xu_v 010010 . ..... 00010 001 ..... 1010111 @r2_vm 604vfcvt_f_x_v 010010 . ..... 00011 001 ..... 1010111 @r2_vm 605vfcvt_rtz_xu_f_v 010010 . ..... 00110 001 ..... 1010111 @r2_vm 606vfcvt_rtz_x_f_v 010010 . ..... 00111 001 ..... 1010111 @r2_vm 607 608vfwcvt_xu_f_v 010010 . ..... 01000 001 ..... 1010111 @r2_vm 609vfwcvt_x_f_v 010010 . ..... 01001 001 ..... 1010111 @r2_vm 610vfwcvt_f_xu_v 010010 . ..... 01010 001 ..... 1010111 @r2_vm 611vfwcvt_f_x_v 010010 . ..... 01011 001 ..... 1010111 @r2_vm 612vfwcvt_f_f_v 010010 . ..... 01100 001 ..... 1010111 @r2_vm 613vfwcvt_rtz_xu_f_v 010010 . ..... 01110 001 ..... 1010111 @r2_vm 614vfwcvt_rtz_x_f_v 010010 . ..... 01111 001 ..... 1010111 @r2_vm 615 616vfncvt_xu_f_w 010010 . ..... 10000 001 ..... 1010111 @r2_vm 617vfncvt_x_f_w 010010 . ..... 10001 001 ..... 1010111 @r2_vm 618vfncvt_f_xu_w 010010 . ..... 10010 001 ..... 1010111 @r2_vm 619vfncvt_f_x_w 010010 . ..... 10011 001 ..... 1010111 @r2_vm 620vfncvt_f_f_w 010010 . ..... 10100 001 ..... 1010111 @r2_vm 621vfncvt_rod_f_f_w 010010 . ..... 10101 001 ..... 1010111 @r2_vm 622vfncvt_rtz_xu_f_w 010010 . ..... 10110 001 ..... 1010111 @r2_vm 623vfncvt_rtz_x_f_w 010010 . ..... 10111 001 ..... 1010111 @r2_vm 624 625vredsum_vs 000000 . ..... ..... 010 ..... 1010111 @r_vm 626vredand_vs 000001 . ..... ..... 010 ..... 1010111 @r_vm 627vredor_vs 000010 . ..... ..... 010 ..... 1010111 @r_vm 628vredxor_vs 000011 . ..... ..... 010 ..... 1010111 @r_vm 629vredminu_vs 000100 . ..... ..... 010 ..... 1010111 @r_vm 630vredmin_vs 000101 . ..... ..... 010 ..... 1010111 @r_vm 631vredmaxu_vs 000110 . ..... ..... 010 ..... 1010111 @r_vm 632vredmax_vs 000111 . ..... ..... 010 ..... 1010111 @r_vm 633vwredsumu_vs 110000 . ..... ..... 000 ..... 1010111 @r_vm 634vwredsum_vs 110001 . ..... ..... 000 ..... 1010111 @r_vm 635# Vector ordered and unordered reduction sum 636vfredsum_vs 0000-1 . ..... ..... 001 ..... 1010111 @r_vm 637vfredmin_vs 000101 . ..... ..... 001 ..... 1010111 @r_vm 638vfredmax_vs 000111 . ..... ..... 001 ..... 1010111 @r_vm 639# Vector widening ordered and unordered float reduction sum 640vfwredsum_vs 1100-1 . ..... ..... 001 ..... 1010111 @r_vm 641vmand_mm 011001 - ..... ..... 010 ..... 1010111 @r 642vmnand_mm 011101 - ..... ..... 010 ..... 1010111 @r 643vmandn_mm 011000 - ..... ..... 010 ..... 1010111 @r 644vmxor_mm 011011 - ..... ..... 010 ..... 1010111 @r 645vmor_mm 011010 - ..... ..... 010 ..... 1010111 @r 646vmnor_mm 011110 - ..... ..... 010 ..... 1010111 @r 647vmorn_mm 011100 - ..... ..... 010 ..... 1010111 @r 648vmxnor_mm 011111 - ..... ..... 010 ..... 1010111 @r 649vcpop_m 010000 . ..... 10000 010 ..... 1010111 @r2_vm 650vfirst_m 010000 . ..... 10001 010 ..... 1010111 @r2_vm 651vmsbf_m 010100 . ..... 00001 010 ..... 1010111 @r2_vm 652vmsif_m 010100 . ..... 00011 010 ..... 1010111 @r2_vm 653vmsof_m 010100 . ..... 00010 010 ..... 1010111 @r2_vm 654viota_m 010100 . ..... 10000 010 ..... 1010111 @r2_vm 655vid_v 010100 . 00000 10001 010 ..... 1010111 @r1_vm 656vmv_x_s 010000 1 ..... 00000 010 ..... 1010111 @r2rd 657vmv_s_x 010000 1 00000 ..... 110 ..... 1010111 @r2 658vfmv_f_s 010000 1 ..... 00000 001 ..... 1010111 @r2rd 659vfmv_s_f 010000 1 00000 ..... 101 ..... 1010111 @r2 660vslideup_vx 001110 . ..... ..... 100 ..... 1010111 @r_vm 661vslideup_vi 001110 . ..... ..... 011 ..... 1010111 @r_vm 662vslide1up_vx 001110 . ..... ..... 110 ..... 1010111 @r_vm 663vslidedown_vx 001111 . ..... ..... 100 ..... 1010111 @r_vm 664vslidedown_vi 001111 . ..... ..... 011 ..... 1010111 @r_vm 665vslide1down_vx 001111 . ..... ..... 110 ..... 1010111 @r_vm 666vrgather_vv 001100 . ..... ..... 000 ..... 1010111 @r_vm 667vrgatherei16_vv 001110 . ..... ..... 000 ..... 1010111 @r_vm 668vrgather_vx 001100 . ..... ..... 100 ..... 1010111 @r_vm 669vrgather_vi 001100 . ..... ..... 011 ..... 1010111 @r_vm 670vcompress_vm 010111 - ..... ..... 010 ..... 1010111 @r 671vmv1r_v 100111 1 ..... 00000 011 ..... 1010111 @r2rd 672vmv2r_v 100111 1 ..... 00001 011 ..... 1010111 @r2rd 673vmv4r_v 100111 1 ..... 00011 011 ..... 1010111 @r2rd 674vmv8r_v 100111 1 ..... 00111 011 ..... 1010111 @r2rd 675 676# Vector Integer Extension 677vzext_vf2 010010 . ..... 00110 010 ..... 1010111 @r2_vm 678vzext_vf4 010010 . ..... 00100 010 ..... 1010111 @r2_vm 679vzext_vf8 010010 . ..... 00010 010 ..... 1010111 @r2_vm 680vsext_vf2 010010 . ..... 00111 010 ..... 1010111 @r2_vm 681vsext_vf4 010010 . ..... 00101 010 ..... 1010111 @r2_vm 682vsext_vf8 010010 . ..... 00011 010 ..... 1010111 @r2_vm 683 684vsetvli 0 ........... ..... 111 ..... 1010111 @r2_zimm11 685vsetivli 11 .......... ..... 111 ..... 1010111 @r2_zimm10 686vsetvl 1000000 ..... ..... 111 ..... 1010111 @r 687 688# *** RV32 Zba Standard Extension *** 689sh1add 0010000 .......... 010 ..... 0110011 @r 690sh2add 0010000 .......... 100 ..... 0110011 @r 691sh3add 0010000 .......... 110 ..... 0110011 @r 692 693# *** RV64 Zba Standard Extension (in addition to RV32 Zba) *** 694add_uw 0000100 .......... 000 ..... 0111011 @r 695sh1add_uw 0010000 .......... 010 ..... 0111011 @r 696sh2add_uw 0010000 .......... 100 ..... 0111011 @r 697sh3add_uw 0010000 .......... 110 ..... 0111011 @r 698slli_uw 00001 ............ 001 ..... 0011011 @sh 699 700# *** RV32 Zbb Standard Extension *** 701andn 0100000 .......... 111 ..... 0110011 @r 702clz 011000 000000 ..... 001 ..... 0010011 @r2 703cpop 011000 000010 ..... 001 ..... 0010011 @r2 704ctz 011000 000001 ..... 001 ..... 0010011 @r2 705max 0000101 .......... 110 ..... 0110011 @r 706maxu 0000101 .......... 111 ..... 0110011 @r 707min 0000101 .......... 100 ..... 0110011 @r 708minu 0000101 .......... 101 ..... 0110011 @r 709orc_b 001010 000111 ..... 101 ..... 0010011 @r2 710orn 0100000 .......... 110 ..... 0110011 @r 711# The encoding for rev8 differs between RV32 and RV64. 712# rev8_32 denotes the RV32 variant. 713rev8_32 011010 011000 ..... 101 ..... 0010011 @r2 714rol 0110000 .......... 001 ..... 0110011 @r 715ror 0110000 .......... 101 ..... 0110011 @r 716rori 01100 ............ 101 ..... 0010011 @sh 717sext_b 011000 000100 ..... 001 ..... 0010011 @r2 718sext_h 011000 000101 ..... 001 ..... 0010011 @r2 719xnor 0100000 .......... 100 ..... 0110011 @r 720# The encoding for zext.h differs between RV32 and RV64. 721# zext_h_32 denotes the RV32 variant. 722zext_h_32 0000100 00000 ..... 100 ..... 0110011 @r2 723 724# *** RV64 Zbb Standard Extension (in addition to RV32 Zbb) *** 725clzw 0110000 00000 ..... 001 ..... 0011011 @r2 726ctzw 0110000 00001 ..... 001 ..... 0011011 @r2 727cpopw 0110000 00010 ..... 001 ..... 0011011 @r2 728# The encoding for rev8 differs between RV32 and RV64. 729# When executing on RV64, the encoding used in RV32 is an illegal 730# instruction, so we use different handler functions to differentiate. 731rev8_64 011010 111000 ..... 101 ..... 0010011 @r2 732rolw 0110000 .......... 001 ..... 0111011 @r 733roriw 0110000 .......... 101 ..... 0011011 @sh5 734rorw 0110000 .......... 101 ..... 0111011 @r 735# The encoding for zext.h differs between RV32 and RV64. 736# When executing on RV64, the encoding used in RV32 is an illegal 737# instruction, so we use different handler functions to differentiate. 738zext_h_64 0000100 00000 ..... 100 ..... 0111011 @r2 739 740# *** RV32 Zbc Standard Extension *** 741clmul 0000101 .......... 001 ..... 0110011 @r 742clmulh 0000101 .......... 011 ..... 0110011 @r 743clmulr 0000101 .......... 010 ..... 0110011 @r 744 745# *** RV32 Zbs Standard Extension *** 746bclr 0100100 .......... 001 ..... 0110011 @r 747bclri 01001. ........... 001 ..... 0010011 @sh 748bext 0100100 .......... 101 ..... 0110011 @r 749bexti 01001. ........... 101 ..... 0010011 @sh 750binv 0110100 .......... 001 ..... 0110011 @r 751binvi 01101. ........... 001 ..... 0010011 @sh 752bset 0010100 .......... 001 ..... 0110011 @r 753bseti 00101. ........... 001 ..... 0010011 @sh 754 755# *** RV32 Zfh Extension *** 756flh ............ ..... 001 ..... 0000111 @i 757fsh ....... ..... ..... 001 ..... 0100111 @s 758fmadd_h ..... 10 ..... ..... ... ..... 1000011 @r4_rm 759fmsub_h ..... 10 ..... ..... ... ..... 1000111 @r4_rm 760fnmsub_h ..... 10 ..... ..... ... ..... 1001011 @r4_rm 761fnmadd_h ..... 10 ..... ..... ... ..... 1001111 @r4_rm 762fadd_h 0000010 ..... ..... ... ..... 1010011 @r_rm 763fsub_h 0000110 ..... ..... ... ..... 1010011 @r_rm 764fmul_h 0001010 ..... ..... ... ..... 1010011 @r_rm 765fdiv_h 0001110 ..... ..... ... ..... 1010011 @r_rm 766fsqrt_h 0101110 00000 ..... ... ..... 1010011 @r2_rm 767fsgnj_h 0010010 ..... ..... 000 ..... 1010011 @r 768fsgnjn_h 0010010 ..... ..... 001 ..... 1010011 @r 769fsgnjx_h 0010010 ..... ..... 010 ..... 1010011 @r 770fmin_h 0010110 ..... ..... 000 ..... 1010011 @r 771fmax_h 0010110 ..... ..... 001 ..... 1010011 @r 772fcvt_h_s 0100010 00000 ..... ... ..... 1010011 @r2_rm 773fcvt_s_h 0100000 00010 ..... ... ..... 1010011 @r2_rm 774fcvt_h_d 0100010 00001 ..... ... ..... 1010011 @r2_rm 775fcvt_d_h 0100001 00010 ..... ... ..... 1010011 @r2_rm 776fcvt_w_h 1100010 00000 ..... ... ..... 1010011 @r2_rm 777fcvt_wu_h 1100010 00001 ..... ... ..... 1010011 @r2_rm 778fmv_x_h 1110010 00000 ..... 000 ..... 1010011 @r2 779feq_h 1010010 ..... ..... 010 ..... 1010011 @r 780flt_h 1010010 ..... ..... 001 ..... 1010011 @r 781fle_h 1010010 ..... ..... 000 ..... 1010011 @r 782fclass_h 1110010 00000 ..... 001 ..... 1010011 @r2 783fcvt_h_w 1101010 00000 ..... ... ..... 1010011 @r2_rm 784fcvt_h_wu 1101010 00001 ..... ... ..... 1010011 @r2_rm 785fmv_h_x 1111010 00000 ..... 000 ..... 1010011 @r2 786 787# *** RV64 Zfh Extension (in addition to RV32 Zfh) *** 788fcvt_l_h 1100010 00010 ..... ... ..... 1010011 @r2_rm 789fcvt_lu_h 1100010 00011 ..... ... ..... 1010011 @r2_rm 790fcvt_h_l 1101010 00010 ..... ... ..... 1010011 @r2_rm 791fcvt_h_lu 1101010 00011 ..... ... ..... 1010011 @r2_rm 792