xref: /openbmc/qemu/target/riscv/insn32.decode (revision 9fc08be6)
1#
2# RISC-V translation routines for the RVXI Base Integer Instruction Set.
3#
4# Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de
5#                    Bastian Koppelmann, kbastian@mail.uni-paderborn.de
6#
7# This program is free software; you can redistribute it and/or modify it
8# under the terms and conditions of the GNU General Public License,
9# version 2 or later, as published by the Free Software Foundation.
10#
11# This program is distributed in the hope it will be useful, but WITHOUT
12# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14# more details.
15#
16# You should have received a copy of the GNU General Public License along with
17# this program.  If not, see <http://www.gnu.org/licenses/>.
18
19# Fields:
20%rs3       27:5
21%rs2       20:5
22%rs1       15:5
23%rd        7:5
24
25%sh10    20:10
26%csr    20:12
27%rm     12:3
28%nf     29:3                     !function=ex_plus_1
29
30# immediates:
31%imm_i    20:s12
32%imm_s    25:s7 7:5
33%imm_b    31:s1 7:1 25:6 8:4     !function=ex_shift_1
34%imm_j    31:s1 12:8 20:1 21:10  !function=ex_shift_1
35%imm_u    12:s20                 !function=ex_shift_12
36
37# Argument sets:
38&empty
39&b    imm rs2 rs1
40&i    imm rs1 rd
41&j    imm rd
42&r    rd rs1 rs2
43&s    imm rs1 rs2
44&u    imm rd
45&shift     shamt rs1 rd
46&atomic    aq rl rs2 rs1 rd
47&rmrr      vm rd rs1 rs2
48&rmr       vm rd rs2
49&rwdvm     vm wd rd rs1 rs2
50&r2nfvm    vm rd rs1 nf
51&rnfvm     vm rd rs1 rs2 nf
52
53# Formats 32:
54@r       .......   ..... ..... ... ..... ....... &r                %rs2 %rs1 %rd
55@i       ............    ..... ... ..... ....... &i      imm=%imm_i     %rs1 %rd
56@b       .......   ..... ..... ... ..... ....... &b      imm=%imm_b %rs2 %rs1
57@s       .......   ..... ..... ... ..... ....... &s      imm=%imm_s %rs2 %rs1
58@u       ....................      ..... ....... &u      imm=%imm_u          %rd
59@j       ....................      ..... ....... &j      imm=%imm_j          %rd
60
61@sh      ......  ...... .....  ... ..... ....... &shift  shamt=%sh10      %rs1 %rd
62@csr     ............   .....  ... ..... .......               %csr     %rs1 %rd
63
64@atom_ld ..... aq:1 rl:1 ..... ........ ..... ....... &atomic rs2=0     %rs1 %rd
65@atom_st ..... aq:1 rl:1 ..... ........ ..... ....... &atomic %rs2      %rs1 %rd
66
67@r4_rm   ..... ..  ..... ..... ... ..... ....... %rs3 %rs2 %rs1 %rm %rd
68@r_rm    .......   ..... ..... ... ..... ....... %rs2 %rs1 %rm %rd
69@r2_rm   .......   ..... ..... ... ..... ....... %rs1 %rm %rd
70@r2      .......   ..... ..... ... ..... ....... %rs1 %rd
71@r2_nfvm ... ... vm:1 ..... ..... ... ..... ....... &r2nfvm %nf %rs1 %rd
72@r2_vm   ...... vm:1 ..... ..... ... ..... ....... &rmr %rs2 %rd
73@r1_vm   ...... vm:1 ..... ..... ... ..... ....... %rd
74@r_nfvm  ... ... vm:1 ..... ..... ... ..... ....... &rnfvm %nf %rs2 %rs1 %rd
75@r_vm    ...... vm:1 ..... ..... ... ..... ....... &rmrr %rs2 %rs1 %rd
76@r_vm_1  ...... . ..... ..... ... ..... .......    &rmrr vm=1 %rs2 %rs1 %rd
77@r_vm_0  ...... . ..... ..... ... ..... .......    &rmrr vm=0 %rs2 %rs1 %rd
78@r_wdvm  ..... wd:1 vm:1 ..... ..... ... ..... ....... &rwdvm %rs2 %rs1 %rd
79@r2_zimm . zimm:11  ..... ... ..... ....... %rs1 %rd
80
81@hfence_gvma ....... ..... .....   ... ..... ....... %rs2 %rs1
82@hfence_vvma ....... ..... .....   ... ..... ....... %rs2 %rs1
83
84@sfence_vma ....... ..... .....   ... ..... ....... %rs2 %rs1
85@sfence_vm  ....... ..... .....   ... ..... ....... %rs1
86
87
88# *** Privileged Instructions ***
89ecall       000000000000     00000 000 00000 1110011
90ebreak      000000000001     00000 000 00000 1110011
91uret        0000000    00010 00000 000 00000 1110011
92sret        0001000    00010 00000 000 00000 1110011
93mret        0011000    00010 00000 000 00000 1110011
94wfi         0001000    00101 00000 000 00000 1110011
95sfence_vma  0001001    ..... ..... 000 00000 1110011 @sfence_vma
96sfence_vm   0001000    00100 ..... 000 00000 1110011 @sfence_vm
97
98# *** RV32I Base Instruction Set ***
99lui      ....................       ..... 0110111 @u
100auipc    ....................       ..... 0010111 @u
101jal      ....................       ..... 1101111 @j
102jalr     ............     ..... 000 ..... 1100111 @i
103beq      ....... .....    ..... 000 ..... 1100011 @b
104bne      ....... .....    ..... 001 ..... 1100011 @b
105blt      ....... .....    ..... 100 ..... 1100011 @b
106bge      ....... .....    ..... 101 ..... 1100011 @b
107bltu     ....... .....    ..... 110 ..... 1100011 @b
108bgeu     ....... .....    ..... 111 ..... 1100011 @b
109lb       ............     ..... 000 ..... 0000011 @i
110lh       ............     ..... 001 ..... 0000011 @i
111lw       ............     ..... 010 ..... 0000011 @i
112lbu      ............     ..... 100 ..... 0000011 @i
113lhu      ............     ..... 101 ..... 0000011 @i
114sb       .......  .....   ..... 000 ..... 0100011 @s
115sh       .......  .....   ..... 001 ..... 0100011 @s
116sw       .......  .....   ..... 010 ..... 0100011 @s
117addi     ............     ..... 000 ..... 0010011 @i
118slti     ............     ..... 010 ..... 0010011 @i
119sltiu    ............     ..... 011 ..... 0010011 @i
120xori     ............     ..... 100 ..... 0010011 @i
121ori      ............     ..... 110 ..... 0010011 @i
122andi     ............     ..... 111 ..... 0010011 @i
123slli     00.... ......    ..... 001 ..... 0010011 @sh
124srli     00.... ......    ..... 101 ..... 0010011 @sh
125srai     01.... ......    ..... 101 ..... 0010011 @sh
126add      0000000 .....    ..... 000 ..... 0110011 @r
127sub      0100000 .....    ..... 000 ..... 0110011 @r
128sll      0000000 .....    ..... 001 ..... 0110011 @r
129slt      0000000 .....    ..... 010 ..... 0110011 @r
130sltu     0000000 .....    ..... 011 ..... 0110011 @r
131xor      0000000 .....    ..... 100 ..... 0110011 @r
132srl      0000000 .....    ..... 101 ..... 0110011 @r
133sra      0100000 .....    ..... 101 ..... 0110011 @r
134or       0000000 .....    ..... 110 ..... 0110011 @r
135and      0000000 .....    ..... 111 ..... 0110011 @r
136fence    ---- pred:4 succ:4 ----- 000 ----- 0001111
137fence_i  ---- ----   ----   ----- 001 ----- 0001111
138csrrw    ............     ..... 001 ..... 1110011 @csr
139csrrs    ............     ..... 010 ..... 1110011 @csr
140csrrc    ............     ..... 011 ..... 1110011 @csr
141csrrwi   ............     ..... 101 ..... 1110011 @csr
142csrrsi   ............     ..... 110 ..... 1110011 @csr
143csrrci   ............     ..... 111 ..... 1110011 @csr
144
145# *** RV32M Standard Extension ***
146mul      0000001 .....  ..... 000 ..... 0110011 @r
147mulh     0000001 .....  ..... 001 ..... 0110011 @r
148mulhsu   0000001 .....  ..... 010 ..... 0110011 @r
149mulhu    0000001 .....  ..... 011 ..... 0110011 @r
150div      0000001 .....  ..... 100 ..... 0110011 @r
151divu     0000001 .....  ..... 101 ..... 0110011 @r
152rem      0000001 .....  ..... 110 ..... 0110011 @r
153remu     0000001 .....  ..... 111 ..... 0110011 @r
154
155# *** RV32A Standard Extension ***
156lr_w       00010 . . 00000 ..... 010 ..... 0101111 @atom_ld
157sc_w       00011 . . ..... ..... 010 ..... 0101111 @atom_st
158amoswap_w  00001 . . ..... ..... 010 ..... 0101111 @atom_st
159amoadd_w   00000 . . ..... ..... 010 ..... 0101111 @atom_st
160amoxor_w   00100 . . ..... ..... 010 ..... 0101111 @atom_st
161amoand_w   01100 . . ..... ..... 010 ..... 0101111 @atom_st
162amoor_w    01000 . . ..... ..... 010 ..... 0101111 @atom_st
163amomin_w   10000 . . ..... ..... 010 ..... 0101111 @atom_st
164amomax_w   10100 . . ..... ..... 010 ..... 0101111 @atom_st
165amominu_w  11000 . . ..... ..... 010 ..... 0101111 @atom_st
166amomaxu_w  11100 . . ..... ..... 010 ..... 0101111 @atom_st
167
168# *** RV32F Standard Extension ***
169flw        ............   ..... 010 ..... 0000111 @i
170fsw        .......  ..... ..... 010 ..... 0100111 @s
171fmadd_s    ..... 00 ..... ..... ... ..... 1000011 @r4_rm
172fmsub_s    ..... 00 ..... ..... ... ..... 1000111 @r4_rm
173fnmsub_s   ..... 00 ..... ..... ... ..... 1001011 @r4_rm
174fnmadd_s   ..... 00 ..... ..... ... ..... 1001111 @r4_rm
175fadd_s     0000000  ..... ..... ... ..... 1010011 @r_rm
176fsub_s     0000100  ..... ..... ... ..... 1010011 @r_rm
177fmul_s     0001000  ..... ..... ... ..... 1010011 @r_rm
178fdiv_s     0001100  ..... ..... ... ..... 1010011 @r_rm
179fsqrt_s    0101100  00000 ..... ... ..... 1010011 @r2_rm
180fsgnj_s    0010000  ..... ..... 000 ..... 1010011 @r
181fsgnjn_s   0010000  ..... ..... 001 ..... 1010011 @r
182fsgnjx_s   0010000  ..... ..... 010 ..... 1010011 @r
183fmin_s     0010100  ..... ..... 000 ..... 1010011 @r
184fmax_s     0010100  ..... ..... 001 ..... 1010011 @r
185fcvt_w_s   1100000  00000 ..... ... ..... 1010011 @r2_rm
186fcvt_wu_s  1100000  00001 ..... ... ..... 1010011 @r2_rm
187fmv_x_w    1110000  00000 ..... 000 ..... 1010011 @r2
188feq_s      1010000  ..... ..... 010 ..... 1010011 @r
189flt_s      1010000  ..... ..... 001 ..... 1010011 @r
190fle_s      1010000  ..... ..... 000 ..... 1010011 @r
191fclass_s   1110000  00000 ..... 001 ..... 1010011 @r2
192fcvt_s_w   1101000  00000 ..... ... ..... 1010011 @r2_rm
193fcvt_s_wu  1101000  00001 ..... ... ..... 1010011 @r2_rm
194fmv_w_x    1111000  00000 ..... 000 ..... 1010011 @r2
195
196# *** RV32D Standard Extension ***
197fld        ............   ..... 011 ..... 0000111 @i
198fsd        ....... .....  ..... 011 ..... 0100111 @s
199fmadd_d    ..... 01 ..... ..... ... ..... 1000011 @r4_rm
200fmsub_d    ..... 01 ..... ..... ... ..... 1000111 @r4_rm
201fnmsub_d   ..... 01 ..... ..... ... ..... 1001011 @r4_rm
202fnmadd_d   ..... 01 ..... ..... ... ..... 1001111 @r4_rm
203fadd_d     0000001  ..... ..... ... ..... 1010011 @r_rm
204fsub_d     0000101  ..... ..... ... ..... 1010011 @r_rm
205fmul_d     0001001  ..... ..... ... ..... 1010011 @r_rm
206fdiv_d     0001101  ..... ..... ... ..... 1010011 @r_rm
207fsqrt_d    0101101  00000 ..... ... ..... 1010011 @r2_rm
208fsgnj_d    0010001  ..... ..... 000 ..... 1010011 @r
209fsgnjn_d   0010001  ..... ..... 001 ..... 1010011 @r
210fsgnjx_d   0010001  ..... ..... 010 ..... 1010011 @r
211fmin_d     0010101  ..... ..... 000 ..... 1010011 @r
212fmax_d     0010101  ..... ..... 001 ..... 1010011 @r
213fcvt_s_d   0100000  00001 ..... ... ..... 1010011 @r2_rm
214fcvt_d_s   0100001  00000 ..... ... ..... 1010011 @r2_rm
215feq_d      1010001  ..... ..... 010 ..... 1010011 @r
216flt_d      1010001  ..... ..... 001 ..... 1010011 @r
217fle_d      1010001  ..... ..... 000 ..... 1010011 @r
218fclass_d   1110001  00000 ..... 001 ..... 1010011 @r2
219fcvt_w_d   1100001  00000 ..... ... ..... 1010011 @r2_rm
220fcvt_wu_d  1100001  00001 ..... ... ..... 1010011 @r2_rm
221fcvt_d_w   1101001  00000 ..... ... ..... 1010011 @r2_rm
222fcvt_d_wu  1101001  00001 ..... ... ..... 1010011 @r2_rm
223
224# *** RV32H Base Instruction Set ***
225hfence_gvma 0110001  .....  ..... 000 00000 1110011 @hfence_gvma
226hfence_vvma 0010001  .....  ..... 000 00000 1110011 @hfence_vvma
227
228# *** RV32V Extension ***
229
230# *** Vector loads and stores are encoded within LOADFP/STORE-FP ***
231vlb_v      ... 100 . 00000 ..... 000 ..... 0000111 @r2_nfvm
232vlh_v      ... 100 . 00000 ..... 101 ..... 0000111 @r2_nfvm
233vlw_v      ... 100 . 00000 ..... 110 ..... 0000111 @r2_nfvm
234vle_v      ... 000 . 00000 ..... 111 ..... 0000111 @r2_nfvm
235vlbu_v     ... 000 . 00000 ..... 000 ..... 0000111 @r2_nfvm
236vlhu_v     ... 000 . 00000 ..... 101 ..... 0000111 @r2_nfvm
237vlwu_v     ... 000 . 00000 ..... 110 ..... 0000111 @r2_nfvm
238vlbff_v    ... 100 . 10000 ..... 000 ..... 0000111 @r2_nfvm
239vlhff_v    ... 100 . 10000 ..... 101 ..... 0000111 @r2_nfvm
240vlwff_v    ... 100 . 10000 ..... 110 ..... 0000111 @r2_nfvm
241vleff_v    ... 000 . 10000 ..... 111 ..... 0000111 @r2_nfvm
242vlbuff_v   ... 000 . 10000 ..... 000 ..... 0000111 @r2_nfvm
243vlhuff_v   ... 000 . 10000 ..... 101 ..... 0000111 @r2_nfvm
244vlwuff_v   ... 000 . 10000 ..... 110 ..... 0000111 @r2_nfvm
245vsb_v      ... 000 . 00000 ..... 000 ..... 0100111 @r2_nfvm
246vsh_v      ... 000 . 00000 ..... 101 ..... 0100111 @r2_nfvm
247vsw_v      ... 000 . 00000 ..... 110 ..... 0100111 @r2_nfvm
248vse_v      ... 000 . 00000 ..... 111 ..... 0100111 @r2_nfvm
249
250vlsb_v     ... 110 . ..... ..... 000 ..... 0000111 @r_nfvm
251vlsh_v     ... 110 . ..... ..... 101 ..... 0000111 @r_nfvm
252vlsw_v     ... 110 . ..... ..... 110 ..... 0000111 @r_nfvm
253vlse_v     ... 010 . ..... ..... 111 ..... 0000111 @r_nfvm
254vlsbu_v    ... 010 . ..... ..... 000 ..... 0000111 @r_nfvm
255vlshu_v    ... 010 . ..... ..... 101 ..... 0000111 @r_nfvm
256vlswu_v    ... 010 . ..... ..... 110 ..... 0000111 @r_nfvm
257vssb_v     ... 010 . ..... ..... 000 ..... 0100111 @r_nfvm
258vssh_v     ... 010 . ..... ..... 101 ..... 0100111 @r_nfvm
259vssw_v     ... 010 . ..... ..... 110 ..... 0100111 @r_nfvm
260vsse_v     ... 010 . ..... ..... 111 ..... 0100111 @r_nfvm
261
262vlxb_v     ... 111 . ..... ..... 000 ..... 0000111 @r_nfvm
263vlxh_v     ... 111 . ..... ..... 101 ..... 0000111 @r_nfvm
264vlxw_v     ... 111 . ..... ..... 110 ..... 0000111 @r_nfvm
265vlxe_v     ... 011 . ..... ..... 111 ..... 0000111 @r_nfvm
266vlxbu_v    ... 011 . ..... ..... 000 ..... 0000111 @r_nfvm
267vlxhu_v    ... 011 . ..... ..... 101 ..... 0000111 @r_nfvm
268vlxwu_v    ... 011 . ..... ..... 110 ..... 0000111 @r_nfvm
269# Vector ordered-indexed and unordered-indexed store insns.
270vsxb_v     ... -11 . ..... ..... 000 ..... 0100111 @r_nfvm
271vsxh_v     ... -11 . ..... ..... 101 ..... 0100111 @r_nfvm
272vsxw_v     ... -11 . ..... ..... 110 ..... 0100111 @r_nfvm
273vsxe_v     ... -11 . ..... ..... 111 ..... 0100111 @r_nfvm
274
275#*** Vector AMO operations are encoded under the standard AMO major opcode ***
276vamoswapw_v     00001 . . ..... ..... 110 ..... 0101111 @r_wdvm
277vamoaddw_v      00000 . . ..... ..... 110 ..... 0101111 @r_wdvm
278vamoxorw_v      00100 . . ..... ..... 110 ..... 0101111 @r_wdvm
279vamoandw_v      01100 . . ..... ..... 110 ..... 0101111 @r_wdvm
280vamoorw_v       01000 . . ..... ..... 110 ..... 0101111 @r_wdvm
281vamominw_v      10000 . . ..... ..... 110 ..... 0101111 @r_wdvm
282vamomaxw_v      10100 . . ..... ..... 110 ..... 0101111 @r_wdvm
283vamominuw_v     11000 . . ..... ..... 110 ..... 0101111 @r_wdvm
284vamomaxuw_v     11100 . . ..... ..... 110 ..... 0101111 @r_wdvm
285
286# *** new major opcode OP-V ***
287vadd_vv         000000 . ..... ..... 000 ..... 1010111 @r_vm
288vadd_vx         000000 . ..... ..... 100 ..... 1010111 @r_vm
289vadd_vi         000000 . ..... ..... 011 ..... 1010111 @r_vm
290vsub_vv         000010 . ..... ..... 000 ..... 1010111 @r_vm
291vsub_vx         000010 . ..... ..... 100 ..... 1010111 @r_vm
292vrsub_vx        000011 . ..... ..... 100 ..... 1010111 @r_vm
293vrsub_vi        000011 . ..... ..... 011 ..... 1010111 @r_vm
294vwaddu_vv       110000 . ..... ..... 010 ..... 1010111 @r_vm
295vwaddu_vx       110000 . ..... ..... 110 ..... 1010111 @r_vm
296vwadd_vv        110001 . ..... ..... 010 ..... 1010111 @r_vm
297vwadd_vx        110001 . ..... ..... 110 ..... 1010111 @r_vm
298vwsubu_vv       110010 . ..... ..... 010 ..... 1010111 @r_vm
299vwsubu_vx       110010 . ..... ..... 110 ..... 1010111 @r_vm
300vwsub_vv        110011 . ..... ..... 010 ..... 1010111 @r_vm
301vwsub_vx        110011 . ..... ..... 110 ..... 1010111 @r_vm
302vwaddu_wv       110100 . ..... ..... 010 ..... 1010111 @r_vm
303vwaddu_wx       110100 . ..... ..... 110 ..... 1010111 @r_vm
304vwadd_wv        110101 . ..... ..... 010 ..... 1010111 @r_vm
305vwadd_wx        110101 . ..... ..... 110 ..... 1010111 @r_vm
306vwsubu_wv       110110 . ..... ..... 010 ..... 1010111 @r_vm
307vwsubu_wx       110110 . ..... ..... 110 ..... 1010111 @r_vm
308vwsub_wv        110111 . ..... ..... 010 ..... 1010111 @r_vm
309vwsub_wx        110111 . ..... ..... 110 ..... 1010111 @r_vm
310vadc_vvm        010000 1 ..... ..... 000 ..... 1010111 @r_vm_1
311vadc_vxm        010000 1 ..... ..... 100 ..... 1010111 @r_vm_1
312vadc_vim        010000 1 ..... ..... 011 ..... 1010111 @r_vm_1
313vmadc_vvm       010001 1 ..... ..... 000 ..... 1010111 @r_vm_1
314vmadc_vxm       010001 1 ..... ..... 100 ..... 1010111 @r_vm_1
315vmadc_vim       010001 1 ..... ..... 011 ..... 1010111 @r_vm_1
316vsbc_vvm        010010 1 ..... ..... 000 ..... 1010111 @r_vm_1
317vsbc_vxm        010010 1 ..... ..... 100 ..... 1010111 @r_vm_1
318vmsbc_vvm       010011 1 ..... ..... 000 ..... 1010111 @r_vm_1
319vmsbc_vxm       010011 1 ..... ..... 100 ..... 1010111 @r_vm_1
320vand_vv         001001 . ..... ..... 000 ..... 1010111 @r_vm
321vand_vx         001001 . ..... ..... 100 ..... 1010111 @r_vm
322vand_vi         001001 . ..... ..... 011 ..... 1010111 @r_vm
323vor_vv          001010 . ..... ..... 000 ..... 1010111 @r_vm
324vor_vx          001010 . ..... ..... 100 ..... 1010111 @r_vm
325vor_vi          001010 . ..... ..... 011 ..... 1010111 @r_vm
326vxor_vv         001011 . ..... ..... 000 ..... 1010111 @r_vm
327vxor_vx         001011 . ..... ..... 100 ..... 1010111 @r_vm
328vxor_vi         001011 . ..... ..... 011 ..... 1010111 @r_vm
329vsll_vv         100101 . ..... ..... 000 ..... 1010111 @r_vm
330vsll_vx         100101 . ..... ..... 100 ..... 1010111 @r_vm
331vsll_vi         100101 . ..... ..... 011 ..... 1010111 @r_vm
332vsrl_vv         101000 . ..... ..... 000 ..... 1010111 @r_vm
333vsrl_vx         101000 . ..... ..... 100 ..... 1010111 @r_vm
334vsrl_vi         101000 . ..... ..... 011 ..... 1010111 @r_vm
335vsra_vv         101001 . ..... ..... 000 ..... 1010111 @r_vm
336vsra_vx         101001 . ..... ..... 100 ..... 1010111 @r_vm
337vsra_vi         101001 . ..... ..... 011 ..... 1010111 @r_vm
338vnsrl_vv        101100 . ..... ..... 000 ..... 1010111 @r_vm
339vnsrl_vx        101100 . ..... ..... 100 ..... 1010111 @r_vm
340vnsrl_vi        101100 . ..... ..... 011 ..... 1010111 @r_vm
341vnsra_vv        101101 . ..... ..... 000 ..... 1010111 @r_vm
342vnsra_vx        101101 . ..... ..... 100 ..... 1010111 @r_vm
343vnsra_vi        101101 . ..... ..... 011 ..... 1010111 @r_vm
344vmseq_vv        011000 . ..... ..... 000 ..... 1010111 @r_vm
345vmseq_vx        011000 . ..... ..... 100 ..... 1010111 @r_vm
346vmseq_vi        011000 . ..... ..... 011 ..... 1010111 @r_vm
347vmsne_vv        011001 . ..... ..... 000 ..... 1010111 @r_vm
348vmsne_vx        011001 . ..... ..... 100 ..... 1010111 @r_vm
349vmsne_vi        011001 . ..... ..... 011 ..... 1010111 @r_vm
350vmsltu_vv       011010 . ..... ..... 000 ..... 1010111 @r_vm
351vmsltu_vx       011010 . ..... ..... 100 ..... 1010111 @r_vm
352vmslt_vv        011011 . ..... ..... 000 ..... 1010111 @r_vm
353vmslt_vx        011011 . ..... ..... 100 ..... 1010111 @r_vm
354vmsleu_vv       011100 . ..... ..... 000 ..... 1010111 @r_vm
355vmsleu_vx       011100 . ..... ..... 100 ..... 1010111 @r_vm
356vmsleu_vi       011100 . ..... ..... 011 ..... 1010111 @r_vm
357vmsle_vv        011101 . ..... ..... 000 ..... 1010111 @r_vm
358vmsle_vx        011101 . ..... ..... 100 ..... 1010111 @r_vm
359vmsle_vi        011101 . ..... ..... 011 ..... 1010111 @r_vm
360vmsgtu_vx       011110 . ..... ..... 100 ..... 1010111 @r_vm
361vmsgtu_vi       011110 . ..... ..... 011 ..... 1010111 @r_vm
362vmsgt_vx        011111 . ..... ..... 100 ..... 1010111 @r_vm
363vmsgt_vi        011111 . ..... ..... 011 ..... 1010111 @r_vm
364vminu_vv        000100 . ..... ..... 000 ..... 1010111 @r_vm
365vminu_vx        000100 . ..... ..... 100 ..... 1010111 @r_vm
366vmin_vv         000101 . ..... ..... 000 ..... 1010111 @r_vm
367vmin_vx         000101 . ..... ..... 100 ..... 1010111 @r_vm
368vmaxu_vv        000110 . ..... ..... 000 ..... 1010111 @r_vm
369vmaxu_vx        000110 . ..... ..... 100 ..... 1010111 @r_vm
370vmax_vv         000111 . ..... ..... 000 ..... 1010111 @r_vm
371vmax_vx         000111 . ..... ..... 100 ..... 1010111 @r_vm
372vmul_vv         100101 . ..... ..... 010 ..... 1010111 @r_vm
373vmul_vx         100101 . ..... ..... 110 ..... 1010111 @r_vm
374vmulh_vv        100111 . ..... ..... 010 ..... 1010111 @r_vm
375vmulh_vx        100111 . ..... ..... 110 ..... 1010111 @r_vm
376vmulhu_vv       100100 . ..... ..... 010 ..... 1010111 @r_vm
377vmulhu_vx       100100 . ..... ..... 110 ..... 1010111 @r_vm
378vmulhsu_vv      100110 . ..... ..... 010 ..... 1010111 @r_vm
379vmulhsu_vx      100110 . ..... ..... 110 ..... 1010111 @r_vm
380vdivu_vv        100000 . ..... ..... 010 ..... 1010111 @r_vm
381vdivu_vx        100000 . ..... ..... 110 ..... 1010111 @r_vm
382vdiv_vv         100001 . ..... ..... 010 ..... 1010111 @r_vm
383vdiv_vx         100001 . ..... ..... 110 ..... 1010111 @r_vm
384vremu_vv        100010 . ..... ..... 010 ..... 1010111 @r_vm
385vremu_vx        100010 . ..... ..... 110 ..... 1010111 @r_vm
386vrem_vv         100011 . ..... ..... 010 ..... 1010111 @r_vm
387vrem_vx         100011 . ..... ..... 110 ..... 1010111 @r_vm
388vwmulu_vv       111000 . ..... ..... 010 ..... 1010111 @r_vm
389vwmulu_vx       111000 . ..... ..... 110 ..... 1010111 @r_vm
390vwmulsu_vv      111010 . ..... ..... 010 ..... 1010111 @r_vm
391vwmulsu_vx      111010 . ..... ..... 110 ..... 1010111 @r_vm
392vwmul_vv        111011 . ..... ..... 010 ..... 1010111 @r_vm
393vwmul_vx        111011 . ..... ..... 110 ..... 1010111 @r_vm
394vmacc_vv        101101 . ..... ..... 010 ..... 1010111 @r_vm
395vmacc_vx        101101 . ..... ..... 110 ..... 1010111 @r_vm
396vnmsac_vv       101111 . ..... ..... 010 ..... 1010111 @r_vm
397vnmsac_vx       101111 . ..... ..... 110 ..... 1010111 @r_vm
398vmadd_vv        101001 . ..... ..... 010 ..... 1010111 @r_vm
399vmadd_vx        101001 . ..... ..... 110 ..... 1010111 @r_vm
400vnmsub_vv       101011 . ..... ..... 010 ..... 1010111 @r_vm
401vnmsub_vx       101011 . ..... ..... 110 ..... 1010111 @r_vm
402vwmaccu_vv      111100 . ..... ..... 010 ..... 1010111 @r_vm
403vwmaccu_vx      111100 . ..... ..... 110 ..... 1010111 @r_vm
404vwmacc_vv       111101 . ..... ..... 010 ..... 1010111 @r_vm
405vwmacc_vx       111101 . ..... ..... 110 ..... 1010111 @r_vm
406vwmaccsu_vv     111110 . ..... ..... 010 ..... 1010111 @r_vm
407vwmaccsu_vx     111110 . ..... ..... 110 ..... 1010111 @r_vm
408vwmaccus_vx     111111 . ..... ..... 110 ..... 1010111 @r_vm
409vmv_v_v         010111 1 00000 ..... 000 ..... 1010111 @r2
410vmv_v_x         010111 1 00000 ..... 100 ..... 1010111 @r2
411vmv_v_i         010111 1 00000 ..... 011 ..... 1010111 @r2
412vmerge_vvm      010111 0 ..... ..... 000 ..... 1010111 @r_vm_0
413vmerge_vxm      010111 0 ..... ..... 100 ..... 1010111 @r_vm_0
414vmerge_vim      010111 0 ..... ..... 011 ..... 1010111 @r_vm_0
415vsaddu_vv       100000 . ..... ..... 000 ..... 1010111 @r_vm
416vsaddu_vx       100000 . ..... ..... 100 ..... 1010111 @r_vm
417vsaddu_vi       100000 . ..... ..... 011 ..... 1010111 @r_vm
418vsadd_vv        100001 . ..... ..... 000 ..... 1010111 @r_vm
419vsadd_vx        100001 . ..... ..... 100 ..... 1010111 @r_vm
420vsadd_vi        100001 . ..... ..... 011 ..... 1010111 @r_vm
421vssubu_vv       100010 . ..... ..... 000 ..... 1010111 @r_vm
422vssubu_vx       100010 . ..... ..... 100 ..... 1010111 @r_vm
423vssub_vv        100011 . ..... ..... 000 ..... 1010111 @r_vm
424vssub_vx        100011 . ..... ..... 100 ..... 1010111 @r_vm
425vaadd_vv        100100 . ..... ..... 000 ..... 1010111 @r_vm
426vaadd_vx        100100 . ..... ..... 100 ..... 1010111 @r_vm
427vaadd_vi        100100 . ..... ..... 011 ..... 1010111 @r_vm
428vasub_vv        100110 . ..... ..... 000 ..... 1010111 @r_vm
429vasub_vx        100110 . ..... ..... 100 ..... 1010111 @r_vm
430vsmul_vv        100111 . ..... ..... 000 ..... 1010111 @r_vm
431vsmul_vx        100111 . ..... ..... 100 ..... 1010111 @r_vm
432vwsmaccu_vv     111100 . ..... ..... 000 ..... 1010111 @r_vm
433vwsmaccu_vx     111100 . ..... ..... 100 ..... 1010111 @r_vm
434vwsmacc_vv      111101 . ..... ..... 000 ..... 1010111 @r_vm
435vwsmacc_vx      111101 . ..... ..... 100 ..... 1010111 @r_vm
436vwsmaccsu_vv    111110 . ..... ..... 000 ..... 1010111 @r_vm
437vwsmaccsu_vx    111110 . ..... ..... 100 ..... 1010111 @r_vm
438vwsmaccus_vx    111111 . ..... ..... 100 ..... 1010111 @r_vm
439vssrl_vv        101010 . ..... ..... 000 ..... 1010111 @r_vm
440vssrl_vx        101010 . ..... ..... 100 ..... 1010111 @r_vm
441vssrl_vi        101010 . ..... ..... 011 ..... 1010111 @r_vm
442vssra_vv        101011 . ..... ..... 000 ..... 1010111 @r_vm
443vssra_vx        101011 . ..... ..... 100 ..... 1010111 @r_vm
444vssra_vi        101011 . ..... ..... 011 ..... 1010111 @r_vm
445vnclipu_vv      101110 . ..... ..... 000 ..... 1010111 @r_vm
446vnclipu_vx      101110 . ..... ..... 100 ..... 1010111 @r_vm
447vnclipu_vi      101110 . ..... ..... 011 ..... 1010111 @r_vm
448vnclip_vv       101111 . ..... ..... 000 ..... 1010111 @r_vm
449vnclip_vx       101111 . ..... ..... 100 ..... 1010111 @r_vm
450vnclip_vi       101111 . ..... ..... 011 ..... 1010111 @r_vm
451vfadd_vv        000000 . ..... ..... 001 ..... 1010111 @r_vm
452vfadd_vf        000000 . ..... ..... 101 ..... 1010111 @r_vm
453vfsub_vv        000010 . ..... ..... 001 ..... 1010111 @r_vm
454vfsub_vf        000010 . ..... ..... 101 ..... 1010111 @r_vm
455vfrsub_vf       100111 . ..... ..... 101 ..... 1010111 @r_vm
456vfwadd_vv       110000 . ..... ..... 001 ..... 1010111 @r_vm
457vfwadd_vf       110000 . ..... ..... 101 ..... 1010111 @r_vm
458vfwadd_wv       110100 . ..... ..... 001 ..... 1010111 @r_vm
459vfwadd_wf       110100 . ..... ..... 101 ..... 1010111 @r_vm
460vfwsub_vv       110010 . ..... ..... 001 ..... 1010111 @r_vm
461vfwsub_vf       110010 . ..... ..... 101 ..... 1010111 @r_vm
462vfwsub_wv       110110 . ..... ..... 001 ..... 1010111 @r_vm
463vfwsub_wf       110110 . ..... ..... 101 ..... 1010111 @r_vm
464vfmul_vv        100100 . ..... ..... 001 ..... 1010111 @r_vm
465vfmul_vf        100100 . ..... ..... 101 ..... 1010111 @r_vm
466vfdiv_vv        100000 . ..... ..... 001 ..... 1010111 @r_vm
467vfdiv_vf        100000 . ..... ..... 101 ..... 1010111 @r_vm
468vfrdiv_vf       100001 . ..... ..... 101 ..... 1010111 @r_vm
469vfwmul_vv       111000 . ..... ..... 001 ..... 1010111 @r_vm
470vfwmul_vf       111000 . ..... ..... 101 ..... 1010111 @r_vm
471vfmacc_vv       101100 . ..... ..... 001 ..... 1010111 @r_vm
472vfnmacc_vv      101101 . ..... ..... 001 ..... 1010111 @r_vm
473vfnmacc_vf      101101 . ..... ..... 101 ..... 1010111 @r_vm
474vfmacc_vf       101100 . ..... ..... 101 ..... 1010111 @r_vm
475vfmsac_vv       101110 . ..... ..... 001 ..... 1010111 @r_vm
476vfmsac_vf       101110 . ..... ..... 101 ..... 1010111 @r_vm
477vfnmsac_vv      101111 . ..... ..... 001 ..... 1010111 @r_vm
478vfnmsac_vf      101111 . ..... ..... 101 ..... 1010111 @r_vm
479vfmadd_vv       101000 . ..... ..... 001 ..... 1010111 @r_vm
480vfmadd_vf       101000 . ..... ..... 101 ..... 1010111 @r_vm
481vfnmadd_vv      101001 . ..... ..... 001 ..... 1010111 @r_vm
482vfnmadd_vf      101001 . ..... ..... 101 ..... 1010111 @r_vm
483vfmsub_vv       101010 . ..... ..... 001 ..... 1010111 @r_vm
484vfmsub_vf       101010 . ..... ..... 101 ..... 1010111 @r_vm
485vfnmsub_vv      101011 . ..... ..... 001 ..... 1010111 @r_vm
486vfnmsub_vf      101011 . ..... ..... 101 ..... 1010111 @r_vm
487vfwmacc_vv      111100 . ..... ..... 001 ..... 1010111 @r_vm
488vfwmacc_vf      111100 . ..... ..... 101 ..... 1010111 @r_vm
489vfwnmacc_vv     111101 . ..... ..... 001 ..... 1010111 @r_vm
490vfwnmacc_vf     111101 . ..... ..... 101 ..... 1010111 @r_vm
491vfwmsac_vv      111110 . ..... ..... 001 ..... 1010111 @r_vm
492vfwmsac_vf      111110 . ..... ..... 101 ..... 1010111 @r_vm
493vfwnmsac_vv     111111 . ..... ..... 001 ..... 1010111 @r_vm
494vfwnmsac_vf     111111 . ..... ..... 101 ..... 1010111 @r_vm
495vfsqrt_v        100011 . ..... 00000 001 ..... 1010111 @r2_vm
496vfmin_vv        000100 . ..... ..... 001 ..... 1010111 @r_vm
497vfmin_vf        000100 . ..... ..... 101 ..... 1010111 @r_vm
498vfmax_vv        000110 . ..... ..... 001 ..... 1010111 @r_vm
499vfmax_vf        000110 . ..... ..... 101 ..... 1010111 @r_vm
500vfsgnj_vv       001000 . ..... ..... 001 ..... 1010111 @r_vm
501vfsgnj_vf       001000 . ..... ..... 101 ..... 1010111 @r_vm
502vfsgnjn_vv      001001 . ..... ..... 001 ..... 1010111 @r_vm
503vfsgnjn_vf      001001 . ..... ..... 101 ..... 1010111 @r_vm
504vfsgnjx_vv      001010 . ..... ..... 001 ..... 1010111 @r_vm
505vfsgnjx_vf      001010 . ..... ..... 101 ..... 1010111 @r_vm
506vmfeq_vv        011000 . ..... ..... 001 ..... 1010111 @r_vm
507vmfeq_vf        011000 . ..... ..... 101 ..... 1010111 @r_vm
508vmfne_vv        011100 . ..... ..... 001 ..... 1010111 @r_vm
509vmfne_vf        011100 . ..... ..... 101 ..... 1010111 @r_vm
510vmflt_vv        011011 . ..... ..... 001 ..... 1010111 @r_vm
511vmflt_vf        011011 . ..... ..... 101 ..... 1010111 @r_vm
512vmfle_vv        011001 . ..... ..... 001 ..... 1010111 @r_vm
513vmfle_vf        011001 . ..... ..... 101 ..... 1010111 @r_vm
514vmfgt_vf        011101 . ..... ..... 101 ..... 1010111 @r_vm
515vmfge_vf        011111 . ..... ..... 101 ..... 1010111 @r_vm
516vmford_vv       011010 . ..... ..... 001 ..... 1010111 @r_vm
517vmford_vf       011010 . ..... ..... 101 ..... 1010111 @r_vm
518vfclass_v       100011 . ..... 10000 001 ..... 1010111 @r2_vm
519vfmerge_vfm     010111 0 ..... ..... 101 ..... 1010111 @r_vm_0
520vfmv_v_f        010111 1 00000 ..... 101 ..... 1010111 @r2
521vfcvt_xu_f_v    100010 . ..... 00000 001 ..... 1010111 @r2_vm
522vfcvt_x_f_v     100010 . ..... 00001 001 ..... 1010111 @r2_vm
523vfcvt_f_xu_v    100010 . ..... 00010 001 ..... 1010111 @r2_vm
524vfcvt_f_x_v     100010 . ..... 00011 001 ..... 1010111 @r2_vm
525vfwcvt_xu_f_v   100010 . ..... 01000 001 ..... 1010111 @r2_vm
526vfwcvt_x_f_v    100010 . ..... 01001 001 ..... 1010111 @r2_vm
527vfwcvt_f_xu_v   100010 . ..... 01010 001 ..... 1010111 @r2_vm
528vfwcvt_f_x_v    100010 . ..... 01011 001 ..... 1010111 @r2_vm
529vfwcvt_f_f_v    100010 . ..... 01100 001 ..... 1010111 @r2_vm
530vfncvt_xu_f_v   100010 . ..... 10000 001 ..... 1010111 @r2_vm
531vfncvt_x_f_v    100010 . ..... 10001 001 ..... 1010111 @r2_vm
532vfncvt_f_xu_v   100010 . ..... 10010 001 ..... 1010111 @r2_vm
533vfncvt_f_x_v    100010 . ..... 10011 001 ..... 1010111 @r2_vm
534vfncvt_f_f_v    100010 . ..... 10100 001 ..... 1010111 @r2_vm
535vredsum_vs      000000 . ..... ..... 010 ..... 1010111 @r_vm
536vredand_vs      000001 . ..... ..... 010 ..... 1010111 @r_vm
537vredor_vs       000010 . ..... ..... 010 ..... 1010111 @r_vm
538vredxor_vs      000011 . ..... ..... 010 ..... 1010111 @r_vm
539vredminu_vs     000100 . ..... ..... 010 ..... 1010111 @r_vm
540vredmin_vs      000101 . ..... ..... 010 ..... 1010111 @r_vm
541vredmaxu_vs     000110 . ..... ..... 010 ..... 1010111 @r_vm
542vredmax_vs      000111 . ..... ..... 010 ..... 1010111 @r_vm
543vwredsumu_vs    110000 . ..... ..... 000 ..... 1010111 @r_vm
544vwredsum_vs     110001 . ..... ..... 000 ..... 1010111 @r_vm
545# Vector ordered and unordered reduction sum
546vfredsum_vs     0000-1 . ..... ..... 001 ..... 1010111 @r_vm
547vfredmin_vs     000101 . ..... ..... 001 ..... 1010111 @r_vm
548vfredmax_vs     000111 . ..... ..... 001 ..... 1010111 @r_vm
549# Vector widening ordered and unordered float reduction sum
550vfwredsum_vs    1100-1 . ..... ..... 001 ..... 1010111 @r_vm
551vmand_mm        011001 - ..... ..... 010 ..... 1010111 @r
552vmnand_mm       011101 - ..... ..... 010 ..... 1010111 @r
553vmandnot_mm     011000 - ..... ..... 010 ..... 1010111 @r
554vmxor_mm        011011 - ..... ..... 010 ..... 1010111 @r
555vmor_mm         011010 - ..... ..... 010 ..... 1010111 @r
556vmnor_mm        011110 - ..... ..... 010 ..... 1010111 @r
557vmornot_mm      011100 - ..... ..... 010 ..... 1010111 @r
558vmxnor_mm       011111 - ..... ..... 010 ..... 1010111 @r
559vmpopc_m        010100 . ..... ----- 010 ..... 1010111 @r2_vm
560vmfirst_m       010101 . ..... ----- 010 ..... 1010111 @r2_vm
561vmsbf_m         010110 . ..... 00001 010 ..... 1010111 @r2_vm
562vmsif_m         010110 . ..... 00011 010 ..... 1010111 @r2_vm
563vmsof_m         010110 . ..... 00010 010 ..... 1010111 @r2_vm
564viota_m         010110 . ..... 10000 010 ..... 1010111 @r2_vm
565vid_v           010110 . 00000 10001 010 ..... 1010111 @r1_vm
566vext_x_v        001100 1 ..... ..... 010 ..... 1010111 @r
567vmv_s_x         001101 1 00000 ..... 110 ..... 1010111 @r2
568
569vsetvli         0 ........... ..... 111 ..... 1010111  @r2_zimm
570vsetvl          1000000 ..... ..... 111 ..... 1010111  @r
571