1# 2# RISC-V translation routines for the RVXI Base Integer Instruction Set. 3# 4# Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de 5# Bastian Koppelmann, kbastian@mail.uni-paderborn.de 6# 7# This program is free software; you can redistribute it and/or modify it 8# under the terms and conditions of the GNU General Public License, 9# version 2 or later, as published by the Free Software Foundation. 10# 11# This program is distributed in the hope it will be useful, but WITHOUT 12# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14# more details. 15# 16# You should have received a copy of the GNU General Public License along with 17# this program. If not, see <http://www.gnu.org/licenses/>. 18 19# Fields: 20%rs3 27:5 21%rs2 20:5 22%rs1 15:5 23%rd 7:5 24%sh5 20:5 25%sh6 20:6 26 27%sh7 20:7 28%csr 20:12 29%rm 12:3 30%nf 29:3 !function=ex_plus_1 31 32# immediates: 33%imm_i 20:s12 34%imm_s 25:s7 7:5 35%imm_b 31:s1 7:1 25:6 8:4 !function=ex_shift_1 36%imm_j 31:s1 12:8 20:1 21:10 !function=ex_shift_1 37%imm_u 12:s20 !function=ex_shift_12 38 39# Argument sets: 40&empty 41&b imm rs2 rs1 42&i imm rs1 rd 43&j imm rd 44&r rd rs1 rs2 45&r2 rd rs1 46&r2_s rs1 rs2 47&s imm rs1 rs2 48&u imm rd 49&shift shamt rs1 rd 50&atomic aq rl rs2 rs1 rd 51&rmrr vm rd rs1 rs2 52&rmr vm rd rs2 53&r2nfvm vm rd rs1 nf 54&rnfvm vm rd rs1 rs2 nf 55 56# Formats 32: 57@r ....... ..... ..... ... ..... ....... &r %rs2 %rs1 %rd 58@i ............ ..... ... ..... ....... &i imm=%imm_i %rs1 %rd 59@b ....... ..... ..... ... ..... ....... &b imm=%imm_b %rs2 %rs1 60@s ....... ..... ..... ... ..... ....... &s imm=%imm_s %rs2 %rs1 61@u .................... ..... ....... &u imm=%imm_u %rd 62@j .................... ..... ....... &j imm=%imm_j %rd 63 64@sh ...... ...... ..... ... ..... ....... &shift shamt=%sh7 %rs1 %rd 65@csr ............ ..... ... ..... ....... %csr %rs1 %rd 66 67@atom_ld ..... aq:1 rl:1 ..... ........ ..... ....... &atomic rs2=0 %rs1 %rd 68@atom_st ..... aq:1 rl:1 ..... ........ ..... ....... &atomic %rs2 %rs1 %rd 69 70@r4_rm ..... .. ..... ..... ... ..... ....... %rs3 %rs2 %rs1 %rm %rd 71@r_rm ....... ..... ..... ... ..... ....... %rs2 %rs1 %rm %rd 72@r2_rm ....... ..... ..... ... ..... ....... %rs1 %rm %rd 73@r2 ....... ..... ..... ... ..... ....... &r2 %rs1 %rd 74@r2_nfvm ... ... vm:1 ..... ..... ... ..... ....... &r2nfvm %nf %rs1 %rd 75@r2_vm ...... vm:1 ..... ..... ... ..... ....... &rmr %rs2 %rd 76@r1_vm ...... vm:1 ..... ..... ... ..... ....... %rd 77@r_nfvm ... ... vm:1 ..... ..... ... ..... ....... &rnfvm %nf %rs2 %rs1 %rd 78@r2rd ....... ..... ..... ... ..... ....... %rs2 %rd 79@r_vm ...... vm:1 ..... ..... ... ..... ....... &rmrr %rs2 %rs1 %rd 80@r_vm_1 ...... . ..... ..... ... ..... ....... &rmrr vm=1 %rs2 %rs1 %rd 81@r_vm_0 ...... . ..... ..... ... ..... ....... &rmrr vm=0 %rs2 %rs1 %rd 82@r2_zimm11 . zimm:11 ..... ... ..... ....... %rs1 %rd 83@r2_zimm10 .. zimm:10 ..... ... ..... ....... %rs1 %rd 84@r2_s ....... ..... ..... ... ..... ....... %rs2 %rs1 85 86@hfence_gvma ....... ..... ..... ... ..... ....... %rs2 %rs1 87@hfence_vvma ....... ..... ..... ... ..... ....... %rs2 %rs1 88 89@sfence_vma ....... ..... ..... ... ..... ....... %rs2 %rs1 90@sfence_vm ....... ..... ..... ... ..... ....... %rs1 91 92# Formats 64: 93@sh5 ....... ..... ..... ... ..... ....... &shift shamt=%sh5 %rs1 %rd 94 95# Formats 128: 96@sh6 ...... ...... ..... ... ..... ....... &shift shamt=%sh6 %rs1 %rd 97 98# *** Privileged Instructions *** 99ecall 000000000000 00000 000 00000 1110011 100ebreak 000000000001 00000 000 00000 1110011 101uret 0000000 00010 00000 000 00000 1110011 102sret 0001000 00010 00000 000 00000 1110011 103mret 0011000 00010 00000 000 00000 1110011 104wfi 0001000 00101 00000 000 00000 1110011 105sfence_vma 0001001 ..... ..... 000 00000 1110011 @sfence_vma 106sfence_vm 0001000 00100 ..... 000 00000 1110011 @sfence_vm 107 108# *** RV32I Base Instruction Set *** 109lui .................... ..... 0110111 @u 110auipc .................... ..... 0010111 @u 111jal .................... ..... 1101111 @j 112jalr ............ ..... 000 ..... 1100111 @i 113beq ....... ..... ..... 000 ..... 1100011 @b 114bne ....... ..... ..... 001 ..... 1100011 @b 115blt ....... ..... ..... 100 ..... 1100011 @b 116bge ....... ..... ..... 101 ..... 1100011 @b 117bltu ....... ..... ..... 110 ..... 1100011 @b 118bgeu ....... ..... ..... 111 ..... 1100011 @b 119lb ............ ..... 000 ..... 0000011 @i 120lh ............ ..... 001 ..... 0000011 @i 121lw ............ ..... 010 ..... 0000011 @i 122lbu ............ ..... 100 ..... 0000011 @i 123lhu ............ ..... 101 ..... 0000011 @i 124sb ....... ..... ..... 000 ..... 0100011 @s 125sh ....... ..... ..... 001 ..... 0100011 @s 126sw ....... ..... ..... 010 ..... 0100011 @s 127addi ............ ..... 000 ..... 0010011 @i 128slti ............ ..... 010 ..... 0010011 @i 129sltiu ............ ..... 011 ..... 0010011 @i 130xori ............ ..... 100 ..... 0010011 @i 131ori ............ ..... 110 ..... 0010011 @i 132andi ............ ..... 111 ..... 0010011 @i 133slli 00000. ...... ..... 001 ..... 0010011 @sh 134srli 00000. ...... ..... 101 ..... 0010011 @sh 135srai 01000. ...... ..... 101 ..... 0010011 @sh 136add 0000000 ..... ..... 000 ..... 0110011 @r 137sub 0100000 ..... ..... 000 ..... 0110011 @r 138sll 0000000 ..... ..... 001 ..... 0110011 @r 139slt 0000000 ..... ..... 010 ..... 0110011 @r 140sltu 0000000 ..... ..... 011 ..... 0110011 @r 141xor 0000000 ..... ..... 100 ..... 0110011 @r 142srl 0000000 ..... ..... 101 ..... 0110011 @r 143sra 0100000 ..... ..... 101 ..... 0110011 @r 144or 0000000 ..... ..... 110 ..... 0110011 @r 145and 0000000 ..... ..... 111 ..... 0110011 @r 146fence ---- pred:4 succ:4 ----- 000 ----- 0001111 147fence_i ---- ---- ---- ----- 001 ----- 0001111 148csrrw ............ ..... 001 ..... 1110011 @csr 149csrrs ............ ..... 010 ..... 1110011 @csr 150csrrc ............ ..... 011 ..... 1110011 @csr 151csrrwi ............ ..... 101 ..... 1110011 @csr 152csrrsi ............ ..... 110 ..... 1110011 @csr 153csrrci ............ ..... 111 ..... 1110011 @csr 154 155# *** RV64I Base Instruction Set (in addition to RV32I) *** 156lwu ............ ..... 110 ..... 0000011 @i 157ld ............ ..... 011 ..... 0000011 @i 158sd ....... ..... ..... 011 ..... 0100011 @s 159addiw ............ ..... 000 ..... 0011011 @i 160slliw 0000000 ..... ..... 001 ..... 0011011 @sh5 161srliw 0000000 ..... ..... 101 ..... 0011011 @sh5 162sraiw 0100000 ..... ..... 101 ..... 0011011 @sh5 163addw 0000000 ..... ..... 000 ..... 0111011 @r 164subw 0100000 ..... ..... 000 ..... 0111011 @r 165sllw 0000000 ..... ..... 001 ..... 0111011 @r 166srlw 0000000 ..... ..... 101 ..... 0111011 @r 167sraw 0100000 ..... ..... 101 ..... 0111011 @r 168 169# *** RV128I Base Instruction Set (in addition to RV64I) *** 170ldu ............ ..... 111 ..... 0000011 @i 171lq ............ ..... 010 ..... 0001111 @i 172sq ............ ..... 100 ..... 0100011 @s 173addid ............ ..... 000 ..... 1011011 @i 174sllid 000000 ...... ..... 001 ..... 1011011 @sh6 175srlid 000000 ...... ..... 101 ..... 1011011 @sh6 176sraid 010000 ...... ..... 101 ..... 1011011 @sh6 177addd 0000000 ..... ..... 000 ..... 1111011 @r 178subd 0100000 ..... ..... 000 ..... 1111011 @r 179slld 0000000 ..... ..... 001 ..... 1111011 @r 180srld 0000000 ..... ..... 101 ..... 1111011 @r 181srad 0100000 ..... ..... 101 ..... 1111011 @r 182 183# *** RV32M Standard Extension *** 184mul 0000001 ..... ..... 000 ..... 0110011 @r 185mulh 0000001 ..... ..... 001 ..... 0110011 @r 186mulhsu 0000001 ..... ..... 010 ..... 0110011 @r 187mulhu 0000001 ..... ..... 011 ..... 0110011 @r 188div 0000001 ..... ..... 100 ..... 0110011 @r 189divu 0000001 ..... ..... 101 ..... 0110011 @r 190rem 0000001 ..... ..... 110 ..... 0110011 @r 191remu 0000001 ..... ..... 111 ..... 0110011 @r 192 193# *** RV64M Standard Extension (in addition to RV32M) *** 194mulw 0000001 ..... ..... 000 ..... 0111011 @r 195divw 0000001 ..... ..... 100 ..... 0111011 @r 196divuw 0000001 ..... ..... 101 ..... 0111011 @r 197remw 0000001 ..... ..... 110 ..... 0111011 @r 198remuw 0000001 ..... ..... 111 ..... 0111011 @r 199 200# *** RV32A Standard Extension *** 201lr_w 00010 . . 00000 ..... 010 ..... 0101111 @atom_ld 202sc_w 00011 . . ..... ..... 010 ..... 0101111 @atom_st 203amoswap_w 00001 . . ..... ..... 010 ..... 0101111 @atom_st 204amoadd_w 00000 . . ..... ..... 010 ..... 0101111 @atom_st 205amoxor_w 00100 . . ..... ..... 010 ..... 0101111 @atom_st 206amoand_w 01100 . . ..... ..... 010 ..... 0101111 @atom_st 207amoor_w 01000 . . ..... ..... 010 ..... 0101111 @atom_st 208amomin_w 10000 . . ..... ..... 010 ..... 0101111 @atom_st 209amomax_w 10100 . . ..... ..... 010 ..... 0101111 @atom_st 210amominu_w 11000 . . ..... ..... 010 ..... 0101111 @atom_st 211amomaxu_w 11100 . . ..... ..... 010 ..... 0101111 @atom_st 212 213# *** RV64A Standard Extension (in addition to RV32A) *** 214lr_d 00010 . . 00000 ..... 011 ..... 0101111 @atom_ld 215sc_d 00011 . . ..... ..... 011 ..... 0101111 @atom_st 216amoswap_d 00001 . . ..... ..... 011 ..... 0101111 @atom_st 217amoadd_d 00000 . . ..... ..... 011 ..... 0101111 @atom_st 218amoxor_d 00100 . . ..... ..... 011 ..... 0101111 @atom_st 219amoand_d 01100 . . ..... ..... 011 ..... 0101111 @atom_st 220amoor_d 01000 . . ..... ..... 011 ..... 0101111 @atom_st 221amomin_d 10000 . . ..... ..... 011 ..... 0101111 @atom_st 222amomax_d 10100 . . ..... ..... 011 ..... 0101111 @atom_st 223amominu_d 11000 . . ..... ..... 011 ..... 0101111 @atom_st 224amomaxu_d 11100 . . ..... ..... 011 ..... 0101111 @atom_st 225 226# *** RV32F Standard Extension *** 227flw ............ ..... 010 ..... 0000111 @i 228fsw ....... ..... ..... 010 ..... 0100111 @s 229fmadd_s ..... 00 ..... ..... ... ..... 1000011 @r4_rm 230fmsub_s ..... 00 ..... ..... ... ..... 1000111 @r4_rm 231fnmsub_s ..... 00 ..... ..... ... ..... 1001011 @r4_rm 232fnmadd_s ..... 00 ..... ..... ... ..... 1001111 @r4_rm 233fadd_s 0000000 ..... ..... ... ..... 1010011 @r_rm 234fsub_s 0000100 ..... ..... ... ..... 1010011 @r_rm 235fmul_s 0001000 ..... ..... ... ..... 1010011 @r_rm 236fdiv_s 0001100 ..... ..... ... ..... 1010011 @r_rm 237fsqrt_s 0101100 00000 ..... ... ..... 1010011 @r2_rm 238fsgnj_s 0010000 ..... ..... 000 ..... 1010011 @r 239fsgnjn_s 0010000 ..... ..... 001 ..... 1010011 @r 240fsgnjx_s 0010000 ..... ..... 010 ..... 1010011 @r 241fmin_s 0010100 ..... ..... 000 ..... 1010011 @r 242fmax_s 0010100 ..... ..... 001 ..... 1010011 @r 243fcvt_w_s 1100000 00000 ..... ... ..... 1010011 @r2_rm 244fcvt_wu_s 1100000 00001 ..... ... ..... 1010011 @r2_rm 245fmv_x_w 1110000 00000 ..... 000 ..... 1010011 @r2 246feq_s 1010000 ..... ..... 010 ..... 1010011 @r 247flt_s 1010000 ..... ..... 001 ..... 1010011 @r 248fle_s 1010000 ..... ..... 000 ..... 1010011 @r 249fclass_s 1110000 00000 ..... 001 ..... 1010011 @r2 250fcvt_s_w 1101000 00000 ..... ... ..... 1010011 @r2_rm 251fcvt_s_wu 1101000 00001 ..... ... ..... 1010011 @r2_rm 252fmv_w_x 1111000 00000 ..... 000 ..... 1010011 @r2 253 254# *** RV64F Standard Extension (in addition to RV32F) *** 255fcvt_l_s 1100000 00010 ..... ... ..... 1010011 @r2_rm 256fcvt_lu_s 1100000 00011 ..... ... ..... 1010011 @r2_rm 257fcvt_s_l 1101000 00010 ..... ... ..... 1010011 @r2_rm 258fcvt_s_lu 1101000 00011 ..... ... ..... 1010011 @r2_rm 259 260# *** RV32D Standard Extension *** 261fld ............ ..... 011 ..... 0000111 @i 262fsd ....... ..... ..... 011 ..... 0100111 @s 263fmadd_d ..... 01 ..... ..... ... ..... 1000011 @r4_rm 264fmsub_d ..... 01 ..... ..... ... ..... 1000111 @r4_rm 265fnmsub_d ..... 01 ..... ..... ... ..... 1001011 @r4_rm 266fnmadd_d ..... 01 ..... ..... ... ..... 1001111 @r4_rm 267fadd_d 0000001 ..... ..... ... ..... 1010011 @r_rm 268fsub_d 0000101 ..... ..... ... ..... 1010011 @r_rm 269fmul_d 0001001 ..... ..... ... ..... 1010011 @r_rm 270fdiv_d 0001101 ..... ..... ... ..... 1010011 @r_rm 271fsqrt_d 0101101 00000 ..... ... ..... 1010011 @r2_rm 272fsgnj_d 0010001 ..... ..... 000 ..... 1010011 @r 273fsgnjn_d 0010001 ..... ..... 001 ..... 1010011 @r 274fsgnjx_d 0010001 ..... ..... 010 ..... 1010011 @r 275fmin_d 0010101 ..... ..... 000 ..... 1010011 @r 276fmax_d 0010101 ..... ..... 001 ..... 1010011 @r 277fcvt_s_d 0100000 00001 ..... ... ..... 1010011 @r2_rm 278fcvt_d_s 0100001 00000 ..... ... ..... 1010011 @r2_rm 279feq_d 1010001 ..... ..... 010 ..... 1010011 @r 280flt_d 1010001 ..... ..... 001 ..... 1010011 @r 281fle_d 1010001 ..... ..... 000 ..... 1010011 @r 282fclass_d 1110001 00000 ..... 001 ..... 1010011 @r2 283fcvt_w_d 1100001 00000 ..... ... ..... 1010011 @r2_rm 284fcvt_wu_d 1100001 00001 ..... ... ..... 1010011 @r2_rm 285fcvt_d_w 1101001 00000 ..... ... ..... 1010011 @r2_rm 286fcvt_d_wu 1101001 00001 ..... ... ..... 1010011 @r2_rm 287 288# *** RV64D Standard Extension (in addition to RV32D) *** 289fcvt_l_d 1100001 00010 ..... ... ..... 1010011 @r2_rm 290fcvt_lu_d 1100001 00011 ..... ... ..... 1010011 @r2_rm 291fmv_x_d 1110001 00000 ..... 000 ..... 1010011 @r2 292fcvt_d_l 1101001 00010 ..... ... ..... 1010011 @r2_rm 293fcvt_d_lu 1101001 00011 ..... ... ..... 1010011 @r2_rm 294fmv_d_x 1111001 00000 ..... 000 ..... 1010011 @r2 295 296# *** RV32H Base Instruction Set *** 297hlv_b 0110000 00000 ..... 100 ..... 1110011 @r2 298hlv_bu 0110000 00001 ..... 100 ..... 1110011 @r2 299hlv_h 0110010 00000 ..... 100 ..... 1110011 @r2 300hlv_hu 0110010 00001 ..... 100 ..... 1110011 @r2 301hlvx_hu 0110010 00011 ..... 100 ..... 1110011 @r2 302hlv_w 0110100 00000 ..... 100 ..... 1110011 @r2 303hlvx_wu 0110100 00011 ..... 100 ..... 1110011 @r2 304hsv_b 0110001 ..... ..... 100 00000 1110011 @r2_s 305hsv_h 0110011 ..... ..... 100 00000 1110011 @r2_s 306hsv_w 0110101 ..... ..... 100 00000 1110011 @r2_s 307hfence_gvma 0110001 ..... ..... 000 00000 1110011 @hfence_gvma 308hfence_vvma 0010001 ..... ..... 000 00000 1110011 @hfence_vvma 309 310# *** RV64H Base Instruction Set *** 311hlv_wu 0110100 00001 ..... 100 ..... 1110011 @r2 312hlv_d 0110110 00000 ..... 100 ..... 1110011 @r2 313hsv_d 0110111 ..... ..... 100 00000 1110011 @r2_s 314 315# *** Vector loads and stores are encoded within LOADFP/STORE-FP *** 316# Vector unit-stride load/store insns. 317vle8_v ... 000 . 00000 ..... 000 ..... 0000111 @r2_nfvm 318vle16_v ... 000 . 00000 ..... 101 ..... 0000111 @r2_nfvm 319vle32_v ... 000 . 00000 ..... 110 ..... 0000111 @r2_nfvm 320vle64_v ... 000 . 00000 ..... 111 ..... 0000111 @r2_nfvm 321vse8_v ... 000 . 00000 ..... 000 ..... 0100111 @r2_nfvm 322vse16_v ... 000 . 00000 ..... 101 ..... 0100111 @r2_nfvm 323vse32_v ... 000 . 00000 ..... 110 ..... 0100111 @r2_nfvm 324vse64_v ... 000 . 00000 ..... 111 ..... 0100111 @r2_nfvm 325 326# Vector unit-stride mask load/store insns. 327vlm_v 000 000 1 01011 ..... 000 ..... 0000111 @r2 328vsm_v 000 000 1 01011 ..... 000 ..... 0100111 @r2 329 330# Vector strided insns. 331vlse8_v ... 010 . ..... ..... 000 ..... 0000111 @r_nfvm 332vlse16_v ... 010 . ..... ..... 101 ..... 0000111 @r_nfvm 333vlse32_v ... 010 . ..... ..... 110 ..... 0000111 @r_nfvm 334vlse64_v ... 010 . ..... ..... 111 ..... 0000111 @r_nfvm 335vsse8_v ... 010 . ..... ..... 000 ..... 0100111 @r_nfvm 336vsse16_v ... 010 . ..... ..... 101 ..... 0100111 @r_nfvm 337vsse32_v ... 010 . ..... ..... 110 ..... 0100111 @r_nfvm 338vsse64_v ... 010 . ..... ..... 111 ..... 0100111 @r_nfvm 339 340# Vector ordered-indexed and unordered-indexed load insns. 341vlxei8_v ... 0-1 . ..... ..... 000 ..... 0000111 @r_nfvm 342vlxei16_v ... 0-1 . ..... ..... 101 ..... 0000111 @r_nfvm 343vlxei32_v ... 0-1 . ..... ..... 110 ..... 0000111 @r_nfvm 344vlxei64_v ... 0-1 . ..... ..... 111 ..... 0000111 @r_nfvm 345 346# Vector ordered-indexed and unordered-indexed store insns. 347vsxei8_v ... 0-1 . ..... ..... 000 ..... 0100111 @r_nfvm 348vsxei16_v ... 0-1 . ..... ..... 101 ..... 0100111 @r_nfvm 349vsxei32_v ... 0-1 . ..... ..... 110 ..... 0100111 @r_nfvm 350vsxei64_v ... 0-1 . ..... ..... 111 ..... 0100111 @r_nfvm 351 352# Vector unit-stride fault-only-first load insns. 353vle8ff_v ... 000 . 10000 ..... 000 ..... 0000111 @r2_nfvm 354vle16ff_v ... 000 . 10000 ..... 101 ..... 0000111 @r2_nfvm 355vle32ff_v ... 000 . 10000 ..... 110 ..... 0000111 @r2_nfvm 356vle64ff_v ... 000 . 10000 ..... 111 ..... 0000111 @r2_nfvm 357 358# Vector whole register insns 359vl1re8_v 000 000 1 01000 ..... 000 ..... 0000111 @r2 360vl1re16_v 000 000 1 01000 ..... 101 ..... 0000111 @r2 361vl1re32_v 000 000 1 01000 ..... 110 ..... 0000111 @r2 362vl1re64_v 000 000 1 01000 ..... 111 ..... 0000111 @r2 363vl2re8_v 001 000 1 01000 ..... 000 ..... 0000111 @r2 364vl2re16_v 001 000 1 01000 ..... 101 ..... 0000111 @r2 365vl2re32_v 001 000 1 01000 ..... 110 ..... 0000111 @r2 366vl2re64_v 001 000 1 01000 ..... 111 ..... 0000111 @r2 367vl4re8_v 011 000 1 01000 ..... 000 ..... 0000111 @r2 368vl4re16_v 011 000 1 01000 ..... 101 ..... 0000111 @r2 369vl4re32_v 011 000 1 01000 ..... 110 ..... 0000111 @r2 370vl4re64_v 011 000 1 01000 ..... 111 ..... 0000111 @r2 371vl8re8_v 111 000 1 01000 ..... 000 ..... 0000111 @r2 372vl8re16_v 111 000 1 01000 ..... 101 ..... 0000111 @r2 373vl8re32_v 111 000 1 01000 ..... 110 ..... 0000111 @r2 374vl8re64_v 111 000 1 01000 ..... 111 ..... 0000111 @r2 375vs1r_v 000 000 1 01000 ..... 000 ..... 0100111 @r2 376vs2r_v 001 000 1 01000 ..... 000 ..... 0100111 @r2 377vs4r_v 011 000 1 01000 ..... 000 ..... 0100111 @r2 378vs8r_v 111 000 1 01000 ..... 000 ..... 0100111 @r2 379 380# *** new major opcode OP-V *** 381vadd_vv 000000 . ..... ..... 000 ..... 1010111 @r_vm 382vadd_vx 000000 . ..... ..... 100 ..... 1010111 @r_vm 383vadd_vi 000000 . ..... ..... 011 ..... 1010111 @r_vm 384vsub_vv 000010 . ..... ..... 000 ..... 1010111 @r_vm 385vsub_vx 000010 . ..... ..... 100 ..... 1010111 @r_vm 386vrsub_vx 000011 . ..... ..... 100 ..... 1010111 @r_vm 387vrsub_vi 000011 . ..... ..... 011 ..... 1010111 @r_vm 388vwaddu_vv 110000 . ..... ..... 010 ..... 1010111 @r_vm 389vwaddu_vx 110000 . ..... ..... 110 ..... 1010111 @r_vm 390vwadd_vv 110001 . ..... ..... 010 ..... 1010111 @r_vm 391vwadd_vx 110001 . ..... ..... 110 ..... 1010111 @r_vm 392vwsubu_vv 110010 . ..... ..... 010 ..... 1010111 @r_vm 393vwsubu_vx 110010 . ..... ..... 110 ..... 1010111 @r_vm 394vwsub_vv 110011 . ..... ..... 010 ..... 1010111 @r_vm 395vwsub_vx 110011 . ..... ..... 110 ..... 1010111 @r_vm 396vwaddu_wv 110100 . ..... ..... 010 ..... 1010111 @r_vm 397vwaddu_wx 110100 . ..... ..... 110 ..... 1010111 @r_vm 398vwadd_wv 110101 . ..... ..... 010 ..... 1010111 @r_vm 399vwadd_wx 110101 . ..... ..... 110 ..... 1010111 @r_vm 400vwsubu_wv 110110 . ..... ..... 010 ..... 1010111 @r_vm 401vwsubu_wx 110110 . ..... ..... 110 ..... 1010111 @r_vm 402vwsub_wv 110111 . ..... ..... 010 ..... 1010111 @r_vm 403vwsub_wx 110111 . ..... ..... 110 ..... 1010111 @r_vm 404vadc_vvm 010000 0 ..... ..... 000 ..... 1010111 @r_vm_1 405vadc_vxm 010000 0 ..... ..... 100 ..... 1010111 @r_vm_1 406vadc_vim 010000 0 ..... ..... 011 ..... 1010111 @r_vm_1 407vmadc_vvm 010001 . ..... ..... 000 ..... 1010111 @r_vm 408vmadc_vxm 010001 . ..... ..... 100 ..... 1010111 @r_vm 409vmadc_vim 010001 . ..... ..... 011 ..... 1010111 @r_vm 410vsbc_vvm 010010 0 ..... ..... 000 ..... 1010111 @r_vm_1 411vsbc_vxm 010010 0 ..... ..... 100 ..... 1010111 @r_vm_1 412vmsbc_vvm 010011 . ..... ..... 000 ..... 1010111 @r_vm 413vmsbc_vxm 010011 . ..... ..... 100 ..... 1010111 @r_vm 414vand_vv 001001 . ..... ..... 000 ..... 1010111 @r_vm 415vand_vx 001001 . ..... ..... 100 ..... 1010111 @r_vm 416vand_vi 001001 . ..... ..... 011 ..... 1010111 @r_vm 417vor_vv 001010 . ..... ..... 000 ..... 1010111 @r_vm 418vor_vx 001010 . ..... ..... 100 ..... 1010111 @r_vm 419vor_vi 001010 . ..... ..... 011 ..... 1010111 @r_vm 420vxor_vv 001011 . ..... ..... 000 ..... 1010111 @r_vm 421vxor_vx 001011 . ..... ..... 100 ..... 1010111 @r_vm 422vxor_vi 001011 . ..... ..... 011 ..... 1010111 @r_vm 423vsll_vv 100101 . ..... ..... 000 ..... 1010111 @r_vm 424vsll_vx 100101 . ..... ..... 100 ..... 1010111 @r_vm 425vsll_vi 100101 . ..... ..... 011 ..... 1010111 @r_vm 426vsrl_vv 101000 . ..... ..... 000 ..... 1010111 @r_vm 427vsrl_vx 101000 . ..... ..... 100 ..... 1010111 @r_vm 428vsrl_vi 101000 . ..... ..... 011 ..... 1010111 @r_vm 429vsra_vv 101001 . ..... ..... 000 ..... 1010111 @r_vm 430vsra_vx 101001 . ..... ..... 100 ..... 1010111 @r_vm 431vsra_vi 101001 . ..... ..... 011 ..... 1010111 @r_vm 432vnsrl_wv 101100 . ..... ..... 000 ..... 1010111 @r_vm 433vnsrl_wx 101100 . ..... ..... 100 ..... 1010111 @r_vm 434vnsrl_wi 101100 . ..... ..... 011 ..... 1010111 @r_vm 435vnsra_wv 101101 . ..... ..... 000 ..... 1010111 @r_vm 436vnsra_wx 101101 . ..... ..... 100 ..... 1010111 @r_vm 437vnsra_wi 101101 . ..... ..... 011 ..... 1010111 @r_vm 438vmseq_vv 011000 . ..... ..... 000 ..... 1010111 @r_vm 439vmseq_vx 011000 . ..... ..... 100 ..... 1010111 @r_vm 440vmseq_vi 011000 . ..... ..... 011 ..... 1010111 @r_vm 441vmsne_vv 011001 . ..... ..... 000 ..... 1010111 @r_vm 442vmsne_vx 011001 . ..... ..... 100 ..... 1010111 @r_vm 443vmsne_vi 011001 . ..... ..... 011 ..... 1010111 @r_vm 444vmsltu_vv 011010 . ..... ..... 000 ..... 1010111 @r_vm 445vmsltu_vx 011010 . ..... ..... 100 ..... 1010111 @r_vm 446vmslt_vv 011011 . ..... ..... 000 ..... 1010111 @r_vm 447vmslt_vx 011011 . ..... ..... 100 ..... 1010111 @r_vm 448vmsleu_vv 011100 . ..... ..... 000 ..... 1010111 @r_vm 449vmsleu_vx 011100 . ..... ..... 100 ..... 1010111 @r_vm 450vmsleu_vi 011100 . ..... ..... 011 ..... 1010111 @r_vm 451vmsle_vv 011101 . ..... ..... 000 ..... 1010111 @r_vm 452vmsle_vx 011101 . ..... ..... 100 ..... 1010111 @r_vm 453vmsle_vi 011101 . ..... ..... 011 ..... 1010111 @r_vm 454vmsgtu_vx 011110 . ..... ..... 100 ..... 1010111 @r_vm 455vmsgtu_vi 011110 . ..... ..... 011 ..... 1010111 @r_vm 456vmsgt_vx 011111 . ..... ..... 100 ..... 1010111 @r_vm 457vmsgt_vi 011111 . ..... ..... 011 ..... 1010111 @r_vm 458vminu_vv 000100 . ..... ..... 000 ..... 1010111 @r_vm 459vminu_vx 000100 . ..... ..... 100 ..... 1010111 @r_vm 460vmin_vv 000101 . ..... ..... 000 ..... 1010111 @r_vm 461vmin_vx 000101 . ..... ..... 100 ..... 1010111 @r_vm 462vmaxu_vv 000110 . ..... ..... 000 ..... 1010111 @r_vm 463vmaxu_vx 000110 . ..... ..... 100 ..... 1010111 @r_vm 464vmax_vv 000111 . ..... ..... 000 ..... 1010111 @r_vm 465vmax_vx 000111 . ..... ..... 100 ..... 1010111 @r_vm 466vmul_vv 100101 . ..... ..... 010 ..... 1010111 @r_vm 467vmul_vx 100101 . ..... ..... 110 ..... 1010111 @r_vm 468vmulh_vv 100111 . ..... ..... 010 ..... 1010111 @r_vm 469vmulh_vx 100111 . ..... ..... 110 ..... 1010111 @r_vm 470vmulhu_vv 100100 . ..... ..... 010 ..... 1010111 @r_vm 471vmulhu_vx 100100 . ..... ..... 110 ..... 1010111 @r_vm 472vmulhsu_vv 100110 . ..... ..... 010 ..... 1010111 @r_vm 473vmulhsu_vx 100110 . ..... ..... 110 ..... 1010111 @r_vm 474vdivu_vv 100000 . ..... ..... 010 ..... 1010111 @r_vm 475vdivu_vx 100000 . ..... ..... 110 ..... 1010111 @r_vm 476vdiv_vv 100001 . ..... ..... 010 ..... 1010111 @r_vm 477vdiv_vx 100001 . ..... ..... 110 ..... 1010111 @r_vm 478vremu_vv 100010 . ..... ..... 010 ..... 1010111 @r_vm 479vremu_vx 100010 . ..... ..... 110 ..... 1010111 @r_vm 480vrem_vv 100011 . ..... ..... 010 ..... 1010111 @r_vm 481vrem_vx 100011 . ..... ..... 110 ..... 1010111 @r_vm 482vwmulu_vv 111000 . ..... ..... 010 ..... 1010111 @r_vm 483vwmulu_vx 111000 . ..... ..... 110 ..... 1010111 @r_vm 484vwmulsu_vv 111010 . ..... ..... 010 ..... 1010111 @r_vm 485vwmulsu_vx 111010 . ..... ..... 110 ..... 1010111 @r_vm 486vwmul_vv 111011 . ..... ..... 010 ..... 1010111 @r_vm 487vwmul_vx 111011 . ..... ..... 110 ..... 1010111 @r_vm 488vmacc_vv 101101 . ..... ..... 010 ..... 1010111 @r_vm 489vmacc_vx 101101 . ..... ..... 110 ..... 1010111 @r_vm 490vnmsac_vv 101111 . ..... ..... 010 ..... 1010111 @r_vm 491vnmsac_vx 101111 . ..... ..... 110 ..... 1010111 @r_vm 492vmadd_vv 101001 . ..... ..... 010 ..... 1010111 @r_vm 493vmadd_vx 101001 . ..... ..... 110 ..... 1010111 @r_vm 494vnmsub_vv 101011 . ..... ..... 010 ..... 1010111 @r_vm 495vnmsub_vx 101011 . ..... ..... 110 ..... 1010111 @r_vm 496vwmaccu_vv 111100 . ..... ..... 010 ..... 1010111 @r_vm 497vwmaccu_vx 111100 . ..... ..... 110 ..... 1010111 @r_vm 498vwmacc_vv 111101 . ..... ..... 010 ..... 1010111 @r_vm 499vwmacc_vx 111101 . ..... ..... 110 ..... 1010111 @r_vm 500vwmaccsu_vv 111111 . ..... ..... 010 ..... 1010111 @r_vm 501vwmaccsu_vx 111111 . ..... ..... 110 ..... 1010111 @r_vm 502vwmaccus_vx 111110 . ..... ..... 110 ..... 1010111 @r_vm 503vmv_v_v 010111 1 00000 ..... 000 ..... 1010111 @r2 504vmv_v_x 010111 1 00000 ..... 100 ..... 1010111 @r2 505vmv_v_i 010111 1 00000 ..... 011 ..... 1010111 @r2 506vmerge_vvm 010111 0 ..... ..... 000 ..... 1010111 @r_vm_0 507vmerge_vxm 010111 0 ..... ..... 100 ..... 1010111 @r_vm_0 508vmerge_vim 010111 0 ..... ..... 011 ..... 1010111 @r_vm_0 509vsaddu_vv 100000 . ..... ..... 000 ..... 1010111 @r_vm 510vsaddu_vx 100000 . ..... ..... 100 ..... 1010111 @r_vm 511vsaddu_vi 100000 . ..... ..... 011 ..... 1010111 @r_vm 512vsadd_vv 100001 . ..... ..... 000 ..... 1010111 @r_vm 513vsadd_vx 100001 . ..... ..... 100 ..... 1010111 @r_vm 514vsadd_vi 100001 . ..... ..... 011 ..... 1010111 @r_vm 515vssubu_vv 100010 . ..... ..... 000 ..... 1010111 @r_vm 516vssubu_vx 100010 . ..... ..... 100 ..... 1010111 @r_vm 517vssub_vv 100011 . ..... ..... 000 ..... 1010111 @r_vm 518vssub_vx 100011 . ..... ..... 100 ..... 1010111 @r_vm 519vaadd_vv 001001 . ..... ..... 010 ..... 1010111 @r_vm 520vaadd_vx 001001 . ..... ..... 110 ..... 1010111 @r_vm 521vaaddu_vv 001000 . ..... ..... 010 ..... 1010111 @r_vm 522vaaddu_vx 001000 . ..... ..... 110 ..... 1010111 @r_vm 523vasub_vv 001011 . ..... ..... 010 ..... 1010111 @r_vm 524vasub_vx 001011 . ..... ..... 110 ..... 1010111 @r_vm 525vasubu_vv 001010 . ..... ..... 010 ..... 1010111 @r_vm 526vasubu_vx 001010 . ..... ..... 110 ..... 1010111 @r_vm 527vsmul_vv 100111 . ..... ..... 000 ..... 1010111 @r_vm 528vsmul_vx 100111 . ..... ..... 100 ..... 1010111 @r_vm 529vssrl_vv 101010 . ..... ..... 000 ..... 1010111 @r_vm 530vssrl_vx 101010 . ..... ..... 100 ..... 1010111 @r_vm 531vssrl_vi 101010 . ..... ..... 011 ..... 1010111 @r_vm 532vssra_vv 101011 . ..... ..... 000 ..... 1010111 @r_vm 533vssra_vx 101011 . ..... ..... 100 ..... 1010111 @r_vm 534vssra_vi 101011 . ..... ..... 011 ..... 1010111 @r_vm 535vnclipu_wv 101110 . ..... ..... 000 ..... 1010111 @r_vm 536vnclipu_wx 101110 . ..... ..... 100 ..... 1010111 @r_vm 537vnclipu_wi 101110 . ..... ..... 011 ..... 1010111 @r_vm 538vnclip_wv 101111 . ..... ..... 000 ..... 1010111 @r_vm 539vnclip_wx 101111 . ..... ..... 100 ..... 1010111 @r_vm 540vnclip_wi 101111 . ..... ..... 011 ..... 1010111 @r_vm 541vfadd_vv 000000 . ..... ..... 001 ..... 1010111 @r_vm 542vfadd_vf 000000 . ..... ..... 101 ..... 1010111 @r_vm 543vfsub_vv 000010 . ..... ..... 001 ..... 1010111 @r_vm 544vfsub_vf 000010 . ..... ..... 101 ..... 1010111 @r_vm 545vfrsub_vf 100111 . ..... ..... 101 ..... 1010111 @r_vm 546vfwadd_vv 110000 . ..... ..... 001 ..... 1010111 @r_vm 547vfwadd_vf 110000 . ..... ..... 101 ..... 1010111 @r_vm 548vfwadd_wv 110100 . ..... ..... 001 ..... 1010111 @r_vm 549vfwadd_wf 110100 . ..... ..... 101 ..... 1010111 @r_vm 550vfwsub_vv 110010 . ..... ..... 001 ..... 1010111 @r_vm 551vfwsub_vf 110010 . ..... ..... 101 ..... 1010111 @r_vm 552vfwsub_wv 110110 . ..... ..... 001 ..... 1010111 @r_vm 553vfwsub_wf 110110 . ..... ..... 101 ..... 1010111 @r_vm 554vfmul_vv 100100 . ..... ..... 001 ..... 1010111 @r_vm 555vfmul_vf 100100 . ..... ..... 101 ..... 1010111 @r_vm 556vfdiv_vv 100000 . ..... ..... 001 ..... 1010111 @r_vm 557vfdiv_vf 100000 . ..... ..... 101 ..... 1010111 @r_vm 558vfrdiv_vf 100001 . ..... ..... 101 ..... 1010111 @r_vm 559vfwmul_vv 111000 . ..... ..... 001 ..... 1010111 @r_vm 560vfwmul_vf 111000 . ..... ..... 101 ..... 1010111 @r_vm 561vfmacc_vv 101100 . ..... ..... 001 ..... 1010111 @r_vm 562vfnmacc_vv 101101 . ..... ..... 001 ..... 1010111 @r_vm 563vfnmacc_vf 101101 . ..... ..... 101 ..... 1010111 @r_vm 564vfmacc_vf 101100 . ..... ..... 101 ..... 1010111 @r_vm 565vfmsac_vv 101110 . ..... ..... 001 ..... 1010111 @r_vm 566vfmsac_vf 101110 . ..... ..... 101 ..... 1010111 @r_vm 567vfnmsac_vv 101111 . ..... ..... 001 ..... 1010111 @r_vm 568vfnmsac_vf 101111 . ..... ..... 101 ..... 1010111 @r_vm 569vfmadd_vv 101000 . ..... ..... 001 ..... 1010111 @r_vm 570vfmadd_vf 101000 . ..... ..... 101 ..... 1010111 @r_vm 571vfnmadd_vv 101001 . ..... ..... 001 ..... 1010111 @r_vm 572vfnmadd_vf 101001 . ..... ..... 101 ..... 1010111 @r_vm 573vfmsub_vv 101010 . ..... ..... 001 ..... 1010111 @r_vm 574vfmsub_vf 101010 . ..... ..... 101 ..... 1010111 @r_vm 575vfnmsub_vv 101011 . ..... ..... 001 ..... 1010111 @r_vm 576vfnmsub_vf 101011 . ..... ..... 101 ..... 1010111 @r_vm 577vfwmacc_vv 111100 . ..... ..... 001 ..... 1010111 @r_vm 578vfwmacc_vf 111100 . ..... ..... 101 ..... 1010111 @r_vm 579vfwnmacc_vv 111101 . ..... ..... 001 ..... 1010111 @r_vm 580vfwnmacc_vf 111101 . ..... ..... 101 ..... 1010111 @r_vm 581vfwmsac_vv 111110 . ..... ..... 001 ..... 1010111 @r_vm 582vfwmsac_vf 111110 . ..... ..... 101 ..... 1010111 @r_vm 583vfwnmsac_vv 111111 . ..... ..... 001 ..... 1010111 @r_vm 584vfwnmsac_vf 111111 . ..... ..... 101 ..... 1010111 @r_vm 585vfsqrt_v 010011 . ..... 00000 001 ..... 1010111 @r2_vm 586vfrsqrt7_v 010011 . ..... 00100 001 ..... 1010111 @r2_vm 587vfrec7_v 010011 . ..... 00101 001 ..... 1010111 @r2_vm 588vfmin_vv 000100 . ..... ..... 001 ..... 1010111 @r_vm 589vfmin_vf 000100 . ..... ..... 101 ..... 1010111 @r_vm 590vfmax_vv 000110 . ..... ..... 001 ..... 1010111 @r_vm 591vfmax_vf 000110 . ..... ..... 101 ..... 1010111 @r_vm 592vfsgnj_vv 001000 . ..... ..... 001 ..... 1010111 @r_vm 593vfsgnj_vf 001000 . ..... ..... 101 ..... 1010111 @r_vm 594vfsgnjn_vv 001001 . ..... ..... 001 ..... 1010111 @r_vm 595vfsgnjn_vf 001001 . ..... ..... 101 ..... 1010111 @r_vm 596vfsgnjx_vv 001010 . ..... ..... 001 ..... 1010111 @r_vm 597vfsgnjx_vf 001010 . ..... ..... 101 ..... 1010111 @r_vm 598vfslide1up_vf 001110 . ..... ..... 101 ..... 1010111 @r_vm 599vfslide1down_vf 001111 . ..... ..... 101 ..... 1010111 @r_vm 600vmfeq_vv 011000 . ..... ..... 001 ..... 1010111 @r_vm 601vmfeq_vf 011000 . ..... ..... 101 ..... 1010111 @r_vm 602vmfne_vv 011100 . ..... ..... 001 ..... 1010111 @r_vm 603vmfne_vf 011100 . ..... ..... 101 ..... 1010111 @r_vm 604vmflt_vv 011011 . ..... ..... 001 ..... 1010111 @r_vm 605vmflt_vf 011011 . ..... ..... 101 ..... 1010111 @r_vm 606vmfle_vv 011001 . ..... ..... 001 ..... 1010111 @r_vm 607vmfle_vf 011001 . ..... ..... 101 ..... 1010111 @r_vm 608vmfgt_vf 011101 . ..... ..... 101 ..... 1010111 @r_vm 609vmfge_vf 011111 . ..... ..... 101 ..... 1010111 @r_vm 610vfclass_v 010011 . ..... 10000 001 ..... 1010111 @r2_vm 611vfmerge_vfm 010111 0 ..... ..... 101 ..... 1010111 @r_vm_0 612vfmv_v_f 010111 1 00000 ..... 101 ..... 1010111 @r2 613 614vfcvt_xu_f_v 010010 . ..... 00000 001 ..... 1010111 @r2_vm 615vfcvt_x_f_v 010010 . ..... 00001 001 ..... 1010111 @r2_vm 616vfcvt_f_xu_v 010010 . ..... 00010 001 ..... 1010111 @r2_vm 617vfcvt_f_x_v 010010 . ..... 00011 001 ..... 1010111 @r2_vm 618vfcvt_rtz_xu_f_v 010010 . ..... 00110 001 ..... 1010111 @r2_vm 619vfcvt_rtz_x_f_v 010010 . ..... 00111 001 ..... 1010111 @r2_vm 620 621vfwcvt_xu_f_v 010010 . ..... 01000 001 ..... 1010111 @r2_vm 622vfwcvt_x_f_v 010010 . ..... 01001 001 ..... 1010111 @r2_vm 623vfwcvt_f_xu_v 010010 . ..... 01010 001 ..... 1010111 @r2_vm 624vfwcvt_f_x_v 010010 . ..... 01011 001 ..... 1010111 @r2_vm 625vfwcvt_f_f_v 010010 . ..... 01100 001 ..... 1010111 @r2_vm 626vfwcvt_rtz_xu_f_v 010010 . ..... 01110 001 ..... 1010111 @r2_vm 627vfwcvt_rtz_x_f_v 010010 . ..... 01111 001 ..... 1010111 @r2_vm 628 629vfncvt_xu_f_w 010010 . ..... 10000 001 ..... 1010111 @r2_vm 630vfncvt_x_f_w 010010 . ..... 10001 001 ..... 1010111 @r2_vm 631vfncvt_f_xu_w 010010 . ..... 10010 001 ..... 1010111 @r2_vm 632vfncvt_f_x_w 010010 . ..... 10011 001 ..... 1010111 @r2_vm 633vfncvt_f_f_w 010010 . ..... 10100 001 ..... 1010111 @r2_vm 634vfncvt_rod_f_f_w 010010 . ..... 10101 001 ..... 1010111 @r2_vm 635vfncvt_rtz_xu_f_w 010010 . ..... 10110 001 ..... 1010111 @r2_vm 636vfncvt_rtz_x_f_w 010010 . ..... 10111 001 ..... 1010111 @r2_vm 637 638vredsum_vs 000000 . ..... ..... 010 ..... 1010111 @r_vm 639vredand_vs 000001 . ..... ..... 010 ..... 1010111 @r_vm 640vredor_vs 000010 . ..... ..... 010 ..... 1010111 @r_vm 641vredxor_vs 000011 . ..... ..... 010 ..... 1010111 @r_vm 642vredminu_vs 000100 . ..... ..... 010 ..... 1010111 @r_vm 643vredmin_vs 000101 . ..... ..... 010 ..... 1010111 @r_vm 644vredmaxu_vs 000110 . ..... ..... 010 ..... 1010111 @r_vm 645vredmax_vs 000111 . ..... ..... 010 ..... 1010111 @r_vm 646vwredsumu_vs 110000 . ..... ..... 000 ..... 1010111 @r_vm 647vwredsum_vs 110001 . ..... ..... 000 ..... 1010111 @r_vm 648# Vector ordered and unordered reduction sum 649vfredsum_vs 0000-1 . ..... ..... 001 ..... 1010111 @r_vm 650vfredmin_vs 000101 . ..... ..... 001 ..... 1010111 @r_vm 651vfredmax_vs 000111 . ..... ..... 001 ..... 1010111 @r_vm 652# Vector widening ordered and unordered float reduction sum 653vfwredsum_vs 1100-1 . ..... ..... 001 ..... 1010111 @r_vm 654vmand_mm 011001 - ..... ..... 010 ..... 1010111 @r 655vmnand_mm 011101 - ..... ..... 010 ..... 1010111 @r 656vmandn_mm 011000 - ..... ..... 010 ..... 1010111 @r 657vmxor_mm 011011 - ..... ..... 010 ..... 1010111 @r 658vmor_mm 011010 - ..... ..... 010 ..... 1010111 @r 659vmnor_mm 011110 - ..... ..... 010 ..... 1010111 @r 660vmorn_mm 011100 - ..... ..... 010 ..... 1010111 @r 661vmxnor_mm 011111 - ..... ..... 010 ..... 1010111 @r 662vcpop_m 010000 . ..... 10000 010 ..... 1010111 @r2_vm 663vfirst_m 010000 . ..... 10001 010 ..... 1010111 @r2_vm 664vmsbf_m 010100 . ..... 00001 010 ..... 1010111 @r2_vm 665vmsif_m 010100 . ..... 00011 010 ..... 1010111 @r2_vm 666vmsof_m 010100 . ..... 00010 010 ..... 1010111 @r2_vm 667viota_m 010100 . ..... 10000 010 ..... 1010111 @r2_vm 668vid_v 010100 . 00000 10001 010 ..... 1010111 @r1_vm 669vmv_x_s 010000 1 ..... 00000 010 ..... 1010111 @r2rd 670vmv_s_x 010000 1 00000 ..... 110 ..... 1010111 @r2 671vfmv_f_s 010000 1 ..... 00000 001 ..... 1010111 @r2rd 672vfmv_s_f 010000 1 00000 ..... 101 ..... 1010111 @r2 673vslideup_vx 001110 . ..... ..... 100 ..... 1010111 @r_vm 674vslideup_vi 001110 . ..... ..... 011 ..... 1010111 @r_vm 675vslide1up_vx 001110 . ..... ..... 110 ..... 1010111 @r_vm 676vslidedown_vx 001111 . ..... ..... 100 ..... 1010111 @r_vm 677vslidedown_vi 001111 . ..... ..... 011 ..... 1010111 @r_vm 678vslide1down_vx 001111 . ..... ..... 110 ..... 1010111 @r_vm 679vrgather_vv 001100 . ..... ..... 000 ..... 1010111 @r_vm 680vrgatherei16_vv 001110 . ..... ..... 000 ..... 1010111 @r_vm 681vrgather_vx 001100 . ..... ..... 100 ..... 1010111 @r_vm 682vrgather_vi 001100 . ..... ..... 011 ..... 1010111 @r_vm 683vcompress_vm 010111 - ..... ..... 010 ..... 1010111 @r 684vmv1r_v 100111 1 ..... 00000 011 ..... 1010111 @r2rd 685vmv2r_v 100111 1 ..... 00001 011 ..... 1010111 @r2rd 686vmv4r_v 100111 1 ..... 00011 011 ..... 1010111 @r2rd 687vmv8r_v 100111 1 ..... 00111 011 ..... 1010111 @r2rd 688 689# Vector Integer Extension 690vzext_vf2 010010 . ..... 00110 010 ..... 1010111 @r2_vm 691vzext_vf4 010010 . ..... 00100 010 ..... 1010111 @r2_vm 692vzext_vf8 010010 . ..... 00010 010 ..... 1010111 @r2_vm 693vsext_vf2 010010 . ..... 00111 010 ..... 1010111 @r2_vm 694vsext_vf4 010010 . ..... 00101 010 ..... 1010111 @r2_vm 695vsext_vf8 010010 . ..... 00011 010 ..... 1010111 @r2_vm 696 697vsetvli 0 ........... ..... 111 ..... 1010111 @r2_zimm11 698vsetivli 11 .......... ..... 111 ..... 1010111 @r2_zimm10 699vsetvl 1000000 ..... ..... 111 ..... 1010111 @r 700 701# *** RV32 Zba Standard Extension *** 702sh1add 0010000 .......... 010 ..... 0110011 @r 703sh2add 0010000 .......... 100 ..... 0110011 @r 704sh3add 0010000 .......... 110 ..... 0110011 @r 705 706# *** RV64 Zba Standard Extension (in addition to RV32 Zba) *** 707add_uw 0000100 .......... 000 ..... 0111011 @r 708sh1add_uw 0010000 .......... 010 ..... 0111011 @r 709sh2add_uw 0010000 .......... 100 ..... 0111011 @r 710sh3add_uw 0010000 .......... 110 ..... 0111011 @r 711slli_uw 00001 ............ 001 ..... 0011011 @sh 712 713# *** RV32 Zbb Standard Extension *** 714andn 0100000 .......... 111 ..... 0110011 @r 715clz 011000 000000 ..... 001 ..... 0010011 @r2 716cpop 011000 000010 ..... 001 ..... 0010011 @r2 717ctz 011000 000001 ..... 001 ..... 0010011 @r2 718max 0000101 .......... 110 ..... 0110011 @r 719maxu 0000101 .......... 111 ..... 0110011 @r 720min 0000101 .......... 100 ..... 0110011 @r 721minu 0000101 .......... 101 ..... 0110011 @r 722orc_b 001010 000111 ..... 101 ..... 0010011 @r2 723orn 0100000 .......... 110 ..... 0110011 @r 724# The encoding for rev8 differs between RV32 and RV64. 725# rev8_32 denotes the RV32 variant. 726rev8_32 011010 011000 ..... 101 ..... 0010011 @r2 727rol 0110000 .......... 001 ..... 0110011 @r 728ror 0110000 .......... 101 ..... 0110011 @r 729rori 01100 ............ 101 ..... 0010011 @sh 730sext_b 011000 000100 ..... 001 ..... 0010011 @r2 731sext_h 011000 000101 ..... 001 ..... 0010011 @r2 732xnor 0100000 .......... 100 ..... 0110011 @r 733# The encoding for zext.h differs between RV32 and RV64. 734# zext_h_32 denotes the RV32 variant. 735zext_h_32 0000100 00000 ..... 100 ..... 0110011 @r2 736 737# *** RV64 Zbb Standard Extension (in addition to RV32 Zbb) *** 738clzw 0110000 00000 ..... 001 ..... 0011011 @r2 739ctzw 0110000 00001 ..... 001 ..... 0011011 @r2 740cpopw 0110000 00010 ..... 001 ..... 0011011 @r2 741# The encoding for rev8 differs between RV32 and RV64. 742# When executing on RV64, the encoding used in RV32 is an illegal 743# instruction, so we use different handler functions to differentiate. 744rev8_64 011010 111000 ..... 101 ..... 0010011 @r2 745rolw 0110000 .......... 001 ..... 0111011 @r 746roriw 0110000 .......... 101 ..... 0011011 @sh5 747rorw 0110000 .......... 101 ..... 0111011 @r 748# The encoding for zext.h differs between RV32 and RV64. 749# When executing on RV64, the encoding used in RV32 is an illegal 750# instruction, so we use different handler functions to differentiate. 751zext_h_64 0000100 00000 ..... 100 ..... 0111011 @r2 752 753# *** RV32 Zbc Standard Extension *** 754clmul 0000101 .......... 001 ..... 0110011 @r 755clmulh 0000101 .......... 011 ..... 0110011 @r 756clmulr 0000101 .......... 010 ..... 0110011 @r 757 758# *** RV32 Zbs Standard Extension *** 759bclr 0100100 .......... 001 ..... 0110011 @r 760bclri 01001. ........... 001 ..... 0010011 @sh 761bext 0100100 .......... 101 ..... 0110011 @r 762bexti 01001. ........... 101 ..... 0010011 @sh 763binv 0110100 .......... 001 ..... 0110011 @r 764binvi 01101. ........... 001 ..... 0010011 @sh 765bset 0010100 .......... 001 ..... 0110011 @r 766bseti 00101. ........... 001 ..... 0010011 @sh 767 768# *** RV32 Zfh Extension *** 769flh ............ ..... 001 ..... 0000111 @i 770fsh ....... ..... ..... 001 ..... 0100111 @s 771fmadd_h ..... 10 ..... ..... ... ..... 1000011 @r4_rm 772fmsub_h ..... 10 ..... ..... ... ..... 1000111 @r4_rm 773fnmsub_h ..... 10 ..... ..... ... ..... 1001011 @r4_rm 774fnmadd_h ..... 10 ..... ..... ... ..... 1001111 @r4_rm 775fadd_h 0000010 ..... ..... ... ..... 1010011 @r_rm 776fsub_h 0000110 ..... ..... ... ..... 1010011 @r_rm 777fmul_h 0001010 ..... ..... ... ..... 1010011 @r_rm 778fdiv_h 0001110 ..... ..... ... ..... 1010011 @r_rm 779fsqrt_h 0101110 00000 ..... ... ..... 1010011 @r2_rm 780fsgnj_h 0010010 ..... ..... 000 ..... 1010011 @r 781fsgnjn_h 0010010 ..... ..... 001 ..... 1010011 @r 782fsgnjx_h 0010010 ..... ..... 010 ..... 1010011 @r 783fmin_h 0010110 ..... ..... 000 ..... 1010011 @r 784fmax_h 0010110 ..... ..... 001 ..... 1010011 @r 785fcvt_h_s 0100010 00000 ..... ... ..... 1010011 @r2_rm 786fcvt_s_h 0100000 00010 ..... ... ..... 1010011 @r2_rm 787fcvt_h_d 0100010 00001 ..... ... ..... 1010011 @r2_rm 788fcvt_d_h 0100001 00010 ..... ... ..... 1010011 @r2_rm 789fcvt_w_h 1100010 00000 ..... ... ..... 1010011 @r2_rm 790fcvt_wu_h 1100010 00001 ..... ... ..... 1010011 @r2_rm 791fmv_x_h 1110010 00000 ..... 000 ..... 1010011 @r2 792feq_h 1010010 ..... ..... 010 ..... 1010011 @r 793flt_h 1010010 ..... ..... 001 ..... 1010011 @r 794fle_h 1010010 ..... ..... 000 ..... 1010011 @r 795fclass_h 1110010 00000 ..... 001 ..... 1010011 @r2 796fcvt_h_w 1101010 00000 ..... ... ..... 1010011 @r2_rm 797fcvt_h_wu 1101010 00001 ..... ... ..... 1010011 @r2_rm 798fmv_h_x 1111010 00000 ..... 000 ..... 1010011 @r2 799 800# *** RV64 Zfh Extension (in addition to RV32 Zfh) *** 801fcvt_l_h 1100010 00010 ..... ... ..... 1010011 @r2_rm 802fcvt_lu_h 1100010 00011 ..... ... ..... 1010011 @r2_rm 803fcvt_h_l 1101010 00010 ..... ... ..... 1010011 @r2_rm 804fcvt_h_lu 1101010 00011 ..... ... ..... 1010011 @r2_rm 805