1# 2# RISC-V translation routines for the RVXI Base Integer Instruction Set. 3# 4# Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de 5# Bastian Koppelmann, kbastian@mail.uni-paderborn.de 6# 7# This program is free software; you can redistribute it and/or modify it 8# under the terms and conditions of the GNU General Public License, 9# version 2 or later, as published by the Free Software Foundation. 10# 11# This program is distributed in the hope it will be useful, but WITHOUT 12# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14# more details. 15# 16# You should have received a copy of the GNU General Public License along with 17# this program. If not, see <http://www.gnu.org/licenses/>. 18 19# Fields: 20%rs3 27:5 21%rs2 20:5 22%rs1 15:5 23%rd 7:5 24%sh5 20:5 25%sh6 20:6 26 27%sh7 20:7 28%csr 20:12 29%rm 12:3 30%nf 29:3 !function=ex_plus_1 31 32# immediates: 33%imm_i 20:s12 34%imm_s 25:s7 7:5 35%imm_b 31:s1 7:1 25:6 8:4 !function=ex_shift_1 36%imm_j 31:s1 12:8 20:1 21:10 !function=ex_shift_1 37%imm_u 12:s20 !function=ex_shift_12 38 39# Argument sets: 40&empty 41&b imm rs2 rs1 42&i imm rs1 rd 43&j imm rd 44&r rd rs1 rs2 45&r2 rd rs1 46&r2_s rs1 rs2 47&s imm rs1 rs2 48&u imm rd 49&shift shamt rs1 rd 50&atomic aq rl rs2 rs1 rd 51&rmrr vm rd rs1 rs2 52&rmr vm rd rs2 53&r2nfvm vm rd rs1 nf 54&rnfvm vm rd rs1 rs2 nf 55 56# Formats 32: 57@r ....... ..... ..... ... ..... ....... &r %rs2 %rs1 %rd 58@i ............ ..... ... ..... ....... &i imm=%imm_i %rs1 %rd 59@b ....... ..... ..... ... ..... ....... &b imm=%imm_b %rs2 %rs1 60@s ....... ..... ..... ... ..... ....... &s imm=%imm_s %rs2 %rs1 61@u .................... ..... ....... &u imm=%imm_u %rd 62@j .................... ..... ....... &j imm=%imm_j %rd 63 64@sh ...... ...... ..... ... ..... ....... &shift shamt=%sh7 %rs1 %rd 65@csr ............ ..... ... ..... ....... %csr %rs1 %rd 66 67@atom_ld ..... aq:1 rl:1 ..... ........ ..... ....... &atomic rs2=0 %rs1 %rd 68@atom_st ..... aq:1 rl:1 ..... ........ ..... ....... &atomic %rs2 %rs1 %rd 69 70@r4_rm ..... .. ..... ..... ... ..... ....... %rs3 %rs2 %rs1 %rm %rd 71@r_rm ....... ..... ..... ... ..... ....... %rs2 %rs1 %rm %rd 72@r2_rm ....... ..... ..... ... ..... ....... %rs1 %rm %rd 73@r2 ....... ..... ..... ... ..... ....... &r2 %rs1 %rd 74@r2_nfvm ... ... vm:1 ..... ..... ... ..... ....... &r2nfvm %nf %rs1 %rd 75@r2_vm ...... vm:1 ..... ..... ... ..... ....... &rmr %rs2 %rd 76@r1_vm ...... vm:1 ..... ..... ... ..... ....... %rd 77@r_nfvm ... ... vm:1 ..... ..... ... ..... ....... &rnfvm %nf %rs2 %rs1 %rd 78@r2rd ....... ..... ..... ... ..... ....... %rs2 %rd 79@r_vm ...... vm:1 ..... ..... ... ..... ....... &rmrr %rs2 %rs1 %rd 80@r_vm_1 ...... . ..... ..... ... ..... ....... &rmrr vm=1 %rs2 %rs1 %rd 81@r_vm_0 ...... . ..... ..... ... ..... ....... &rmrr vm=0 %rs2 %rs1 %rd 82@r2_zimm11 . zimm:11 ..... ... ..... ....... %rs1 %rd 83@r2_zimm10 .. zimm:10 ..... ... ..... ....... %rs1 %rd 84@r2_s ....... ..... ..... ... ..... ....... %rs2 %rs1 85 86@hfence_gvma ....... ..... ..... ... ..... ....... %rs2 %rs1 87@hfence_vvma ....... ..... ..... ... ..... ....... %rs2 %rs1 88 89@sfence_vma ....... ..... ..... ... ..... ....... %rs2 %rs1 90@sfence_vm ....... ..... ..... ... ..... ....... %rs1 91 92# Formats 64: 93@sh5 ....... ..... ..... ... ..... ....... &shift shamt=%sh5 %rs1 %rd 94 95# Formats 128: 96@sh6 ...... ...... ..... ... ..... ....... &shift shamt=%sh6 %rs1 %rd 97 98# *** Privileged Instructions *** 99ecall 000000000000 00000 000 00000 1110011 100ebreak 000000000001 00000 000 00000 1110011 101uret 0000000 00010 00000 000 00000 1110011 102sret 0001000 00010 00000 000 00000 1110011 103mret 0011000 00010 00000 000 00000 1110011 104wfi 0001000 00101 00000 000 00000 1110011 105sfence_vma 0001001 ..... ..... 000 00000 1110011 @sfence_vma 106sfence_vm 0001000 00100 ..... 000 00000 1110011 @sfence_vm 107 108# *** RV32I Base Instruction Set *** 109lui .................... ..... 0110111 @u 110auipc .................... ..... 0010111 @u 111jal .................... ..... 1101111 @j 112jalr ............ ..... 000 ..... 1100111 @i 113beq ....... ..... ..... 000 ..... 1100011 @b 114bne ....... ..... ..... 001 ..... 1100011 @b 115blt ....... ..... ..... 100 ..... 1100011 @b 116bge ....... ..... ..... 101 ..... 1100011 @b 117bltu ....... ..... ..... 110 ..... 1100011 @b 118bgeu ....... ..... ..... 111 ..... 1100011 @b 119lb ............ ..... 000 ..... 0000011 @i 120lh ............ ..... 001 ..... 0000011 @i 121lw ............ ..... 010 ..... 0000011 @i 122lbu ............ ..... 100 ..... 0000011 @i 123lhu ............ ..... 101 ..... 0000011 @i 124sb ....... ..... ..... 000 ..... 0100011 @s 125sh ....... ..... ..... 001 ..... 0100011 @s 126sw ....... ..... ..... 010 ..... 0100011 @s 127addi ............ ..... 000 ..... 0010011 @i 128slti ............ ..... 010 ..... 0010011 @i 129sltiu ............ ..... 011 ..... 0010011 @i 130xori ............ ..... 100 ..... 0010011 @i 131ori ............ ..... 110 ..... 0010011 @i 132andi ............ ..... 111 ..... 0010011 @i 133slli 00000. ...... ..... 001 ..... 0010011 @sh 134srli 00000. ...... ..... 101 ..... 0010011 @sh 135srai 01000. ...... ..... 101 ..... 0010011 @sh 136add 0000000 ..... ..... 000 ..... 0110011 @r 137sub 0100000 ..... ..... 000 ..... 0110011 @r 138sll 0000000 ..... ..... 001 ..... 0110011 @r 139slt 0000000 ..... ..... 010 ..... 0110011 @r 140sltu 0000000 ..... ..... 011 ..... 0110011 @r 141xor 0000000 ..... ..... 100 ..... 0110011 @r 142srl 0000000 ..... ..... 101 ..... 0110011 @r 143sra 0100000 ..... ..... 101 ..... 0110011 @r 144or 0000000 ..... ..... 110 ..... 0110011 @r 145and 0000000 ..... ..... 111 ..... 0110011 @r 146fence ---- pred:4 succ:4 ----- 000 ----- 0001111 147fence_i ---- ---- ---- ----- 001 ----- 0001111 148csrrw ............ ..... 001 ..... 1110011 @csr 149csrrs ............ ..... 010 ..... 1110011 @csr 150csrrc ............ ..... 011 ..... 1110011 @csr 151csrrwi ............ ..... 101 ..... 1110011 @csr 152csrrsi ............ ..... 110 ..... 1110011 @csr 153csrrci ............ ..... 111 ..... 1110011 @csr 154 155# *** RV64I Base Instruction Set (in addition to RV32I) *** 156lwu ............ ..... 110 ..... 0000011 @i 157ld ............ ..... 011 ..... 0000011 @i 158sd ....... ..... ..... 011 ..... 0100011 @s 159addiw ............ ..... 000 ..... 0011011 @i 160slliw 0000000 ..... ..... 001 ..... 0011011 @sh5 161srliw 0000000 ..... ..... 101 ..... 0011011 @sh5 162sraiw 0100000 ..... ..... 101 ..... 0011011 @sh5 163addw 0000000 ..... ..... 000 ..... 0111011 @r 164subw 0100000 ..... ..... 000 ..... 0111011 @r 165sllw 0000000 ..... ..... 001 ..... 0111011 @r 166srlw 0000000 ..... ..... 101 ..... 0111011 @r 167sraw 0100000 ..... ..... 101 ..... 0111011 @r 168 169# *** RV128I Base Instruction Set (in addition to RV64I) *** 170ldu ............ ..... 111 ..... 0000011 @i 171lq ............ ..... 010 ..... 0001111 @i 172sq ............ ..... 100 ..... 0100011 @s 173sllid 000000 ...... ..... 001 ..... 1011011 @sh6 174srlid 000000 ...... ..... 101 ..... 1011011 @sh6 175sraid 010000 ...... ..... 101 ..... 1011011 @sh6 176slld 0000000 ..... ..... 001 ..... 1111011 @r 177srld 0000000 ..... ..... 101 ..... 1111011 @r 178srad 0100000 ..... ..... 101 ..... 1111011 @r 179 180# *** RV32M Standard Extension *** 181mul 0000001 ..... ..... 000 ..... 0110011 @r 182mulh 0000001 ..... ..... 001 ..... 0110011 @r 183mulhsu 0000001 ..... ..... 010 ..... 0110011 @r 184mulhu 0000001 ..... ..... 011 ..... 0110011 @r 185div 0000001 ..... ..... 100 ..... 0110011 @r 186divu 0000001 ..... ..... 101 ..... 0110011 @r 187rem 0000001 ..... ..... 110 ..... 0110011 @r 188remu 0000001 ..... ..... 111 ..... 0110011 @r 189 190# *** RV64M Standard Extension (in addition to RV32M) *** 191mulw 0000001 ..... ..... 000 ..... 0111011 @r 192divw 0000001 ..... ..... 100 ..... 0111011 @r 193divuw 0000001 ..... ..... 101 ..... 0111011 @r 194remw 0000001 ..... ..... 110 ..... 0111011 @r 195remuw 0000001 ..... ..... 111 ..... 0111011 @r 196 197# *** RV32A Standard Extension *** 198lr_w 00010 . . 00000 ..... 010 ..... 0101111 @atom_ld 199sc_w 00011 . . ..... ..... 010 ..... 0101111 @atom_st 200amoswap_w 00001 . . ..... ..... 010 ..... 0101111 @atom_st 201amoadd_w 00000 . . ..... ..... 010 ..... 0101111 @atom_st 202amoxor_w 00100 . . ..... ..... 010 ..... 0101111 @atom_st 203amoand_w 01100 . . ..... ..... 010 ..... 0101111 @atom_st 204amoor_w 01000 . . ..... ..... 010 ..... 0101111 @atom_st 205amomin_w 10000 . . ..... ..... 010 ..... 0101111 @atom_st 206amomax_w 10100 . . ..... ..... 010 ..... 0101111 @atom_st 207amominu_w 11000 . . ..... ..... 010 ..... 0101111 @atom_st 208amomaxu_w 11100 . . ..... ..... 010 ..... 0101111 @atom_st 209 210# *** RV64A Standard Extension (in addition to RV32A) *** 211lr_d 00010 . . 00000 ..... 011 ..... 0101111 @atom_ld 212sc_d 00011 . . ..... ..... 011 ..... 0101111 @atom_st 213amoswap_d 00001 . . ..... ..... 011 ..... 0101111 @atom_st 214amoadd_d 00000 . . ..... ..... 011 ..... 0101111 @atom_st 215amoxor_d 00100 . . ..... ..... 011 ..... 0101111 @atom_st 216amoand_d 01100 . . ..... ..... 011 ..... 0101111 @atom_st 217amoor_d 01000 . . ..... ..... 011 ..... 0101111 @atom_st 218amomin_d 10000 . . ..... ..... 011 ..... 0101111 @atom_st 219amomax_d 10100 . . ..... ..... 011 ..... 0101111 @atom_st 220amominu_d 11000 . . ..... ..... 011 ..... 0101111 @atom_st 221amomaxu_d 11100 . . ..... ..... 011 ..... 0101111 @atom_st 222 223# *** RV32F Standard Extension *** 224flw ............ ..... 010 ..... 0000111 @i 225fsw ....... ..... ..... 010 ..... 0100111 @s 226fmadd_s ..... 00 ..... ..... ... ..... 1000011 @r4_rm 227fmsub_s ..... 00 ..... ..... ... ..... 1000111 @r4_rm 228fnmsub_s ..... 00 ..... ..... ... ..... 1001011 @r4_rm 229fnmadd_s ..... 00 ..... ..... ... ..... 1001111 @r4_rm 230fadd_s 0000000 ..... ..... ... ..... 1010011 @r_rm 231fsub_s 0000100 ..... ..... ... ..... 1010011 @r_rm 232fmul_s 0001000 ..... ..... ... ..... 1010011 @r_rm 233fdiv_s 0001100 ..... ..... ... ..... 1010011 @r_rm 234fsqrt_s 0101100 00000 ..... ... ..... 1010011 @r2_rm 235fsgnj_s 0010000 ..... ..... 000 ..... 1010011 @r 236fsgnjn_s 0010000 ..... ..... 001 ..... 1010011 @r 237fsgnjx_s 0010000 ..... ..... 010 ..... 1010011 @r 238fmin_s 0010100 ..... ..... 000 ..... 1010011 @r 239fmax_s 0010100 ..... ..... 001 ..... 1010011 @r 240fcvt_w_s 1100000 00000 ..... ... ..... 1010011 @r2_rm 241fcvt_wu_s 1100000 00001 ..... ... ..... 1010011 @r2_rm 242fmv_x_w 1110000 00000 ..... 000 ..... 1010011 @r2 243feq_s 1010000 ..... ..... 010 ..... 1010011 @r 244flt_s 1010000 ..... ..... 001 ..... 1010011 @r 245fle_s 1010000 ..... ..... 000 ..... 1010011 @r 246fclass_s 1110000 00000 ..... 001 ..... 1010011 @r2 247fcvt_s_w 1101000 00000 ..... ... ..... 1010011 @r2_rm 248fcvt_s_wu 1101000 00001 ..... ... ..... 1010011 @r2_rm 249fmv_w_x 1111000 00000 ..... 000 ..... 1010011 @r2 250 251# *** RV64F Standard Extension (in addition to RV32F) *** 252fcvt_l_s 1100000 00010 ..... ... ..... 1010011 @r2_rm 253fcvt_lu_s 1100000 00011 ..... ... ..... 1010011 @r2_rm 254fcvt_s_l 1101000 00010 ..... ... ..... 1010011 @r2_rm 255fcvt_s_lu 1101000 00011 ..... ... ..... 1010011 @r2_rm 256 257# *** RV32D Standard Extension *** 258fld ............ ..... 011 ..... 0000111 @i 259fsd ....... ..... ..... 011 ..... 0100111 @s 260fmadd_d ..... 01 ..... ..... ... ..... 1000011 @r4_rm 261fmsub_d ..... 01 ..... ..... ... ..... 1000111 @r4_rm 262fnmsub_d ..... 01 ..... ..... ... ..... 1001011 @r4_rm 263fnmadd_d ..... 01 ..... ..... ... ..... 1001111 @r4_rm 264fadd_d 0000001 ..... ..... ... ..... 1010011 @r_rm 265fsub_d 0000101 ..... ..... ... ..... 1010011 @r_rm 266fmul_d 0001001 ..... ..... ... ..... 1010011 @r_rm 267fdiv_d 0001101 ..... ..... ... ..... 1010011 @r_rm 268fsqrt_d 0101101 00000 ..... ... ..... 1010011 @r2_rm 269fsgnj_d 0010001 ..... ..... 000 ..... 1010011 @r 270fsgnjn_d 0010001 ..... ..... 001 ..... 1010011 @r 271fsgnjx_d 0010001 ..... ..... 010 ..... 1010011 @r 272fmin_d 0010101 ..... ..... 000 ..... 1010011 @r 273fmax_d 0010101 ..... ..... 001 ..... 1010011 @r 274fcvt_s_d 0100000 00001 ..... ... ..... 1010011 @r2_rm 275fcvt_d_s 0100001 00000 ..... ... ..... 1010011 @r2_rm 276feq_d 1010001 ..... ..... 010 ..... 1010011 @r 277flt_d 1010001 ..... ..... 001 ..... 1010011 @r 278fle_d 1010001 ..... ..... 000 ..... 1010011 @r 279fclass_d 1110001 00000 ..... 001 ..... 1010011 @r2 280fcvt_w_d 1100001 00000 ..... ... ..... 1010011 @r2_rm 281fcvt_wu_d 1100001 00001 ..... ... ..... 1010011 @r2_rm 282fcvt_d_w 1101001 00000 ..... ... ..... 1010011 @r2_rm 283fcvt_d_wu 1101001 00001 ..... ... ..... 1010011 @r2_rm 284 285# *** RV64D Standard Extension (in addition to RV32D) *** 286fcvt_l_d 1100001 00010 ..... ... ..... 1010011 @r2_rm 287fcvt_lu_d 1100001 00011 ..... ... ..... 1010011 @r2_rm 288fmv_x_d 1110001 00000 ..... 000 ..... 1010011 @r2 289fcvt_d_l 1101001 00010 ..... ... ..... 1010011 @r2_rm 290fcvt_d_lu 1101001 00011 ..... ... ..... 1010011 @r2_rm 291fmv_d_x 1111001 00000 ..... 000 ..... 1010011 @r2 292 293# *** RV32H Base Instruction Set *** 294hlv_b 0110000 00000 ..... 100 ..... 1110011 @r2 295hlv_bu 0110000 00001 ..... 100 ..... 1110011 @r2 296hlv_h 0110010 00000 ..... 100 ..... 1110011 @r2 297hlv_hu 0110010 00001 ..... 100 ..... 1110011 @r2 298hlvx_hu 0110010 00011 ..... 100 ..... 1110011 @r2 299hlv_w 0110100 00000 ..... 100 ..... 1110011 @r2 300hlvx_wu 0110100 00011 ..... 100 ..... 1110011 @r2 301hsv_b 0110001 ..... ..... 100 00000 1110011 @r2_s 302hsv_h 0110011 ..... ..... 100 00000 1110011 @r2_s 303hsv_w 0110101 ..... ..... 100 00000 1110011 @r2_s 304hfence_gvma 0110001 ..... ..... 000 00000 1110011 @hfence_gvma 305hfence_vvma 0010001 ..... ..... 000 00000 1110011 @hfence_vvma 306 307# *** RV64H Base Instruction Set *** 308hlv_wu 0110100 00001 ..... 100 ..... 1110011 @r2 309hlv_d 0110110 00000 ..... 100 ..... 1110011 @r2 310hsv_d 0110111 ..... ..... 100 00000 1110011 @r2_s 311 312# *** Vector loads and stores are encoded within LOADFP/STORE-FP *** 313# Vector unit-stride load/store insns. 314vle8_v ... 000 . 00000 ..... 000 ..... 0000111 @r2_nfvm 315vle16_v ... 000 . 00000 ..... 101 ..... 0000111 @r2_nfvm 316vle32_v ... 000 . 00000 ..... 110 ..... 0000111 @r2_nfvm 317vle64_v ... 000 . 00000 ..... 111 ..... 0000111 @r2_nfvm 318vse8_v ... 000 . 00000 ..... 000 ..... 0100111 @r2_nfvm 319vse16_v ... 000 . 00000 ..... 101 ..... 0100111 @r2_nfvm 320vse32_v ... 000 . 00000 ..... 110 ..... 0100111 @r2_nfvm 321vse64_v ... 000 . 00000 ..... 111 ..... 0100111 @r2_nfvm 322 323# Vector unit-stride mask load/store insns. 324vlm_v 000 000 1 01011 ..... 000 ..... 0000111 @r2 325vsm_v 000 000 1 01011 ..... 000 ..... 0100111 @r2 326 327# Vector strided insns. 328vlse8_v ... 010 . ..... ..... 000 ..... 0000111 @r_nfvm 329vlse16_v ... 010 . ..... ..... 101 ..... 0000111 @r_nfvm 330vlse32_v ... 010 . ..... ..... 110 ..... 0000111 @r_nfvm 331vlse64_v ... 010 . ..... ..... 111 ..... 0000111 @r_nfvm 332vsse8_v ... 010 . ..... ..... 000 ..... 0100111 @r_nfvm 333vsse16_v ... 010 . ..... ..... 101 ..... 0100111 @r_nfvm 334vsse32_v ... 010 . ..... ..... 110 ..... 0100111 @r_nfvm 335vsse64_v ... 010 . ..... ..... 111 ..... 0100111 @r_nfvm 336 337# Vector ordered-indexed and unordered-indexed load insns. 338vlxei8_v ... 0-1 . ..... ..... 000 ..... 0000111 @r_nfvm 339vlxei16_v ... 0-1 . ..... ..... 101 ..... 0000111 @r_nfvm 340vlxei32_v ... 0-1 . ..... ..... 110 ..... 0000111 @r_nfvm 341vlxei64_v ... 0-1 . ..... ..... 111 ..... 0000111 @r_nfvm 342 343# Vector ordered-indexed and unordered-indexed store insns. 344vsxei8_v ... 0-1 . ..... ..... 000 ..... 0100111 @r_nfvm 345vsxei16_v ... 0-1 . ..... ..... 101 ..... 0100111 @r_nfvm 346vsxei32_v ... 0-1 . ..... ..... 110 ..... 0100111 @r_nfvm 347vsxei64_v ... 0-1 . ..... ..... 111 ..... 0100111 @r_nfvm 348 349# Vector unit-stride fault-only-first load insns. 350vle8ff_v ... 000 . 10000 ..... 000 ..... 0000111 @r2_nfvm 351vle16ff_v ... 000 . 10000 ..... 101 ..... 0000111 @r2_nfvm 352vle32ff_v ... 000 . 10000 ..... 110 ..... 0000111 @r2_nfvm 353vle64ff_v ... 000 . 10000 ..... 111 ..... 0000111 @r2_nfvm 354 355# Vector whole register insns 356vl1re8_v 000 000 1 01000 ..... 000 ..... 0000111 @r2 357vl1re16_v 000 000 1 01000 ..... 101 ..... 0000111 @r2 358vl1re32_v 000 000 1 01000 ..... 110 ..... 0000111 @r2 359vl1re64_v 000 000 1 01000 ..... 111 ..... 0000111 @r2 360vl2re8_v 001 000 1 01000 ..... 000 ..... 0000111 @r2 361vl2re16_v 001 000 1 01000 ..... 101 ..... 0000111 @r2 362vl2re32_v 001 000 1 01000 ..... 110 ..... 0000111 @r2 363vl2re64_v 001 000 1 01000 ..... 111 ..... 0000111 @r2 364vl4re8_v 011 000 1 01000 ..... 000 ..... 0000111 @r2 365vl4re16_v 011 000 1 01000 ..... 101 ..... 0000111 @r2 366vl4re32_v 011 000 1 01000 ..... 110 ..... 0000111 @r2 367vl4re64_v 011 000 1 01000 ..... 111 ..... 0000111 @r2 368vl8re8_v 111 000 1 01000 ..... 000 ..... 0000111 @r2 369vl8re16_v 111 000 1 01000 ..... 101 ..... 0000111 @r2 370vl8re32_v 111 000 1 01000 ..... 110 ..... 0000111 @r2 371vl8re64_v 111 000 1 01000 ..... 111 ..... 0000111 @r2 372vs1r_v 000 000 1 01000 ..... 000 ..... 0100111 @r2 373vs2r_v 001 000 1 01000 ..... 000 ..... 0100111 @r2 374vs4r_v 011 000 1 01000 ..... 000 ..... 0100111 @r2 375vs8r_v 111 000 1 01000 ..... 000 ..... 0100111 @r2 376 377# *** new major opcode OP-V *** 378vadd_vv 000000 . ..... ..... 000 ..... 1010111 @r_vm 379vadd_vx 000000 . ..... ..... 100 ..... 1010111 @r_vm 380vadd_vi 000000 . ..... ..... 011 ..... 1010111 @r_vm 381vsub_vv 000010 . ..... ..... 000 ..... 1010111 @r_vm 382vsub_vx 000010 . ..... ..... 100 ..... 1010111 @r_vm 383vrsub_vx 000011 . ..... ..... 100 ..... 1010111 @r_vm 384vrsub_vi 000011 . ..... ..... 011 ..... 1010111 @r_vm 385vwaddu_vv 110000 . ..... ..... 010 ..... 1010111 @r_vm 386vwaddu_vx 110000 . ..... ..... 110 ..... 1010111 @r_vm 387vwadd_vv 110001 . ..... ..... 010 ..... 1010111 @r_vm 388vwadd_vx 110001 . ..... ..... 110 ..... 1010111 @r_vm 389vwsubu_vv 110010 . ..... ..... 010 ..... 1010111 @r_vm 390vwsubu_vx 110010 . ..... ..... 110 ..... 1010111 @r_vm 391vwsub_vv 110011 . ..... ..... 010 ..... 1010111 @r_vm 392vwsub_vx 110011 . ..... ..... 110 ..... 1010111 @r_vm 393vwaddu_wv 110100 . ..... ..... 010 ..... 1010111 @r_vm 394vwaddu_wx 110100 . ..... ..... 110 ..... 1010111 @r_vm 395vwadd_wv 110101 . ..... ..... 010 ..... 1010111 @r_vm 396vwadd_wx 110101 . ..... ..... 110 ..... 1010111 @r_vm 397vwsubu_wv 110110 . ..... ..... 010 ..... 1010111 @r_vm 398vwsubu_wx 110110 . ..... ..... 110 ..... 1010111 @r_vm 399vwsub_wv 110111 . ..... ..... 010 ..... 1010111 @r_vm 400vwsub_wx 110111 . ..... ..... 110 ..... 1010111 @r_vm 401vadc_vvm 010000 0 ..... ..... 000 ..... 1010111 @r_vm_1 402vadc_vxm 010000 0 ..... ..... 100 ..... 1010111 @r_vm_1 403vadc_vim 010000 0 ..... ..... 011 ..... 1010111 @r_vm_1 404vmadc_vvm 010001 . ..... ..... 000 ..... 1010111 @r_vm 405vmadc_vxm 010001 . ..... ..... 100 ..... 1010111 @r_vm 406vmadc_vim 010001 . ..... ..... 011 ..... 1010111 @r_vm 407vsbc_vvm 010010 0 ..... ..... 000 ..... 1010111 @r_vm_1 408vsbc_vxm 010010 0 ..... ..... 100 ..... 1010111 @r_vm_1 409vmsbc_vvm 010011 . ..... ..... 000 ..... 1010111 @r_vm 410vmsbc_vxm 010011 . ..... ..... 100 ..... 1010111 @r_vm 411vand_vv 001001 . ..... ..... 000 ..... 1010111 @r_vm 412vand_vx 001001 . ..... ..... 100 ..... 1010111 @r_vm 413vand_vi 001001 . ..... ..... 011 ..... 1010111 @r_vm 414vor_vv 001010 . ..... ..... 000 ..... 1010111 @r_vm 415vor_vx 001010 . ..... ..... 100 ..... 1010111 @r_vm 416vor_vi 001010 . ..... ..... 011 ..... 1010111 @r_vm 417vxor_vv 001011 . ..... ..... 000 ..... 1010111 @r_vm 418vxor_vx 001011 . ..... ..... 100 ..... 1010111 @r_vm 419vxor_vi 001011 . ..... ..... 011 ..... 1010111 @r_vm 420vsll_vv 100101 . ..... ..... 000 ..... 1010111 @r_vm 421vsll_vx 100101 . ..... ..... 100 ..... 1010111 @r_vm 422vsll_vi 100101 . ..... ..... 011 ..... 1010111 @r_vm 423vsrl_vv 101000 . ..... ..... 000 ..... 1010111 @r_vm 424vsrl_vx 101000 . ..... ..... 100 ..... 1010111 @r_vm 425vsrl_vi 101000 . ..... ..... 011 ..... 1010111 @r_vm 426vsra_vv 101001 . ..... ..... 000 ..... 1010111 @r_vm 427vsra_vx 101001 . ..... ..... 100 ..... 1010111 @r_vm 428vsra_vi 101001 . ..... ..... 011 ..... 1010111 @r_vm 429vnsrl_wv 101100 . ..... ..... 000 ..... 1010111 @r_vm 430vnsrl_wx 101100 . ..... ..... 100 ..... 1010111 @r_vm 431vnsrl_wi 101100 . ..... ..... 011 ..... 1010111 @r_vm 432vnsra_wv 101101 . ..... ..... 000 ..... 1010111 @r_vm 433vnsra_wx 101101 . ..... ..... 100 ..... 1010111 @r_vm 434vnsra_wi 101101 . ..... ..... 011 ..... 1010111 @r_vm 435vmseq_vv 011000 . ..... ..... 000 ..... 1010111 @r_vm 436vmseq_vx 011000 . ..... ..... 100 ..... 1010111 @r_vm 437vmseq_vi 011000 . ..... ..... 011 ..... 1010111 @r_vm 438vmsne_vv 011001 . ..... ..... 000 ..... 1010111 @r_vm 439vmsne_vx 011001 . ..... ..... 100 ..... 1010111 @r_vm 440vmsne_vi 011001 . ..... ..... 011 ..... 1010111 @r_vm 441vmsltu_vv 011010 . ..... ..... 000 ..... 1010111 @r_vm 442vmsltu_vx 011010 . ..... ..... 100 ..... 1010111 @r_vm 443vmslt_vv 011011 . ..... ..... 000 ..... 1010111 @r_vm 444vmslt_vx 011011 . ..... ..... 100 ..... 1010111 @r_vm 445vmsleu_vv 011100 . ..... ..... 000 ..... 1010111 @r_vm 446vmsleu_vx 011100 . ..... ..... 100 ..... 1010111 @r_vm 447vmsleu_vi 011100 . ..... ..... 011 ..... 1010111 @r_vm 448vmsle_vv 011101 . ..... ..... 000 ..... 1010111 @r_vm 449vmsle_vx 011101 . ..... ..... 100 ..... 1010111 @r_vm 450vmsle_vi 011101 . ..... ..... 011 ..... 1010111 @r_vm 451vmsgtu_vx 011110 . ..... ..... 100 ..... 1010111 @r_vm 452vmsgtu_vi 011110 . ..... ..... 011 ..... 1010111 @r_vm 453vmsgt_vx 011111 . ..... ..... 100 ..... 1010111 @r_vm 454vmsgt_vi 011111 . ..... ..... 011 ..... 1010111 @r_vm 455vminu_vv 000100 . ..... ..... 000 ..... 1010111 @r_vm 456vminu_vx 000100 . ..... ..... 100 ..... 1010111 @r_vm 457vmin_vv 000101 . ..... ..... 000 ..... 1010111 @r_vm 458vmin_vx 000101 . ..... ..... 100 ..... 1010111 @r_vm 459vmaxu_vv 000110 . ..... ..... 000 ..... 1010111 @r_vm 460vmaxu_vx 000110 . ..... ..... 100 ..... 1010111 @r_vm 461vmax_vv 000111 . ..... ..... 000 ..... 1010111 @r_vm 462vmax_vx 000111 . ..... ..... 100 ..... 1010111 @r_vm 463vmul_vv 100101 . ..... ..... 010 ..... 1010111 @r_vm 464vmul_vx 100101 . ..... ..... 110 ..... 1010111 @r_vm 465vmulh_vv 100111 . ..... ..... 010 ..... 1010111 @r_vm 466vmulh_vx 100111 . ..... ..... 110 ..... 1010111 @r_vm 467vmulhu_vv 100100 . ..... ..... 010 ..... 1010111 @r_vm 468vmulhu_vx 100100 . ..... ..... 110 ..... 1010111 @r_vm 469vmulhsu_vv 100110 . ..... ..... 010 ..... 1010111 @r_vm 470vmulhsu_vx 100110 . ..... ..... 110 ..... 1010111 @r_vm 471vdivu_vv 100000 . ..... ..... 010 ..... 1010111 @r_vm 472vdivu_vx 100000 . ..... ..... 110 ..... 1010111 @r_vm 473vdiv_vv 100001 . ..... ..... 010 ..... 1010111 @r_vm 474vdiv_vx 100001 . ..... ..... 110 ..... 1010111 @r_vm 475vremu_vv 100010 . ..... ..... 010 ..... 1010111 @r_vm 476vremu_vx 100010 . ..... ..... 110 ..... 1010111 @r_vm 477vrem_vv 100011 . ..... ..... 010 ..... 1010111 @r_vm 478vrem_vx 100011 . ..... ..... 110 ..... 1010111 @r_vm 479vwmulu_vv 111000 . ..... ..... 010 ..... 1010111 @r_vm 480vwmulu_vx 111000 . ..... ..... 110 ..... 1010111 @r_vm 481vwmulsu_vv 111010 . ..... ..... 010 ..... 1010111 @r_vm 482vwmulsu_vx 111010 . ..... ..... 110 ..... 1010111 @r_vm 483vwmul_vv 111011 . ..... ..... 010 ..... 1010111 @r_vm 484vwmul_vx 111011 . ..... ..... 110 ..... 1010111 @r_vm 485vmacc_vv 101101 . ..... ..... 010 ..... 1010111 @r_vm 486vmacc_vx 101101 . ..... ..... 110 ..... 1010111 @r_vm 487vnmsac_vv 101111 . ..... ..... 010 ..... 1010111 @r_vm 488vnmsac_vx 101111 . ..... ..... 110 ..... 1010111 @r_vm 489vmadd_vv 101001 . ..... ..... 010 ..... 1010111 @r_vm 490vmadd_vx 101001 . ..... ..... 110 ..... 1010111 @r_vm 491vnmsub_vv 101011 . ..... ..... 010 ..... 1010111 @r_vm 492vnmsub_vx 101011 . ..... ..... 110 ..... 1010111 @r_vm 493vwmaccu_vv 111100 . ..... ..... 010 ..... 1010111 @r_vm 494vwmaccu_vx 111100 . ..... ..... 110 ..... 1010111 @r_vm 495vwmacc_vv 111101 . ..... ..... 010 ..... 1010111 @r_vm 496vwmacc_vx 111101 . ..... ..... 110 ..... 1010111 @r_vm 497vwmaccsu_vv 111111 . ..... ..... 010 ..... 1010111 @r_vm 498vwmaccsu_vx 111111 . ..... ..... 110 ..... 1010111 @r_vm 499vwmaccus_vx 111110 . ..... ..... 110 ..... 1010111 @r_vm 500vmv_v_v 010111 1 00000 ..... 000 ..... 1010111 @r2 501vmv_v_x 010111 1 00000 ..... 100 ..... 1010111 @r2 502vmv_v_i 010111 1 00000 ..... 011 ..... 1010111 @r2 503vmerge_vvm 010111 0 ..... ..... 000 ..... 1010111 @r_vm_0 504vmerge_vxm 010111 0 ..... ..... 100 ..... 1010111 @r_vm_0 505vmerge_vim 010111 0 ..... ..... 011 ..... 1010111 @r_vm_0 506vsaddu_vv 100000 . ..... ..... 000 ..... 1010111 @r_vm 507vsaddu_vx 100000 . ..... ..... 100 ..... 1010111 @r_vm 508vsaddu_vi 100000 . ..... ..... 011 ..... 1010111 @r_vm 509vsadd_vv 100001 . ..... ..... 000 ..... 1010111 @r_vm 510vsadd_vx 100001 . ..... ..... 100 ..... 1010111 @r_vm 511vsadd_vi 100001 . ..... ..... 011 ..... 1010111 @r_vm 512vssubu_vv 100010 . ..... ..... 000 ..... 1010111 @r_vm 513vssubu_vx 100010 . ..... ..... 100 ..... 1010111 @r_vm 514vssub_vv 100011 . ..... ..... 000 ..... 1010111 @r_vm 515vssub_vx 100011 . ..... ..... 100 ..... 1010111 @r_vm 516vaadd_vv 001001 . ..... ..... 010 ..... 1010111 @r_vm 517vaadd_vx 001001 . ..... ..... 110 ..... 1010111 @r_vm 518vaaddu_vv 001000 . ..... ..... 010 ..... 1010111 @r_vm 519vaaddu_vx 001000 . ..... ..... 110 ..... 1010111 @r_vm 520vasub_vv 001011 . ..... ..... 010 ..... 1010111 @r_vm 521vasub_vx 001011 . ..... ..... 110 ..... 1010111 @r_vm 522vasubu_vv 001010 . ..... ..... 010 ..... 1010111 @r_vm 523vasubu_vx 001010 . ..... ..... 110 ..... 1010111 @r_vm 524vsmul_vv 100111 . ..... ..... 000 ..... 1010111 @r_vm 525vsmul_vx 100111 . ..... ..... 100 ..... 1010111 @r_vm 526vssrl_vv 101010 . ..... ..... 000 ..... 1010111 @r_vm 527vssrl_vx 101010 . ..... ..... 100 ..... 1010111 @r_vm 528vssrl_vi 101010 . ..... ..... 011 ..... 1010111 @r_vm 529vssra_vv 101011 . ..... ..... 000 ..... 1010111 @r_vm 530vssra_vx 101011 . ..... ..... 100 ..... 1010111 @r_vm 531vssra_vi 101011 . ..... ..... 011 ..... 1010111 @r_vm 532vnclipu_wv 101110 . ..... ..... 000 ..... 1010111 @r_vm 533vnclipu_wx 101110 . ..... ..... 100 ..... 1010111 @r_vm 534vnclipu_wi 101110 . ..... ..... 011 ..... 1010111 @r_vm 535vnclip_wv 101111 . ..... ..... 000 ..... 1010111 @r_vm 536vnclip_wx 101111 . ..... ..... 100 ..... 1010111 @r_vm 537vnclip_wi 101111 . ..... ..... 011 ..... 1010111 @r_vm 538vfadd_vv 000000 . ..... ..... 001 ..... 1010111 @r_vm 539vfadd_vf 000000 . ..... ..... 101 ..... 1010111 @r_vm 540vfsub_vv 000010 . ..... ..... 001 ..... 1010111 @r_vm 541vfsub_vf 000010 . ..... ..... 101 ..... 1010111 @r_vm 542vfrsub_vf 100111 . ..... ..... 101 ..... 1010111 @r_vm 543vfwadd_vv 110000 . ..... ..... 001 ..... 1010111 @r_vm 544vfwadd_vf 110000 . ..... ..... 101 ..... 1010111 @r_vm 545vfwadd_wv 110100 . ..... ..... 001 ..... 1010111 @r_vm 546vfwadd_wf 110100 . ..... ..... 101 ..... 1010111 @r_vm 547vfwsub_vv 110010 . ..... ..... 001 ..... 1010111 @r_vm 548vfwsub_vf 110010 . ..... ..... 101 ..... 1010111 @r_vm 549vfwsub_wv 110110 . ..... ..... 001 ..... 1010111 @r_vm 550vfwsub_wf 110110 . ..... ..... 101 ..... 1010111 @r_vm 551vfmul_vv 100100 . ..... ..... 001 ..... 1010111 @r_vm 552vfmul_vf 100100 . ..... ..... 101 ..... 1010111 @r_vm 553vfdiv_vv 100000 . ..... ..... 001 ..... 1010111 @r_vm 554vfdiv_vf 100000 . ..... ..... 101 ..... 1010111 @r_vm 555vfrdiv_vf 100001 . ..... ..... 101 ..... 1010111 @r_vm 556vfwmul_vv 111000 . ..... ..... 001 ..... 1010111 @r_vm 557vfwmul_vf 111000 . ..... ..... 101 ..... 1010111 @r_vm 558vfmacc_vv 101100 . ..... ..... 001 ..... 1010111 @r_vm 559vfnmacc_vv 101101 . ..... ..... 001 ..... 1010111 @r_vm 560vfnmacc_vf 101101 . ..... ..... 101 ..... 1010111 @r_vm 561vfmacc_vf 101100 . ..... ..... 101 ..... 1010111 @r_vm 562vfmsac_vv 101110 . ..... ..... 001 ..... 1010111 @r_vm 563vfmsac_vf 101110 . ..... ..... 101 ..... 1010111 @r_vm 564vfnmsac_vv 101111 . ..... ..... 001 ..... 1010111 @r_vm 565vfnmsac_vf 101111 . ..... ..... 101 ..... 1010111 @r_vm 566vfmadd_vv 101000 . ..... ..... 001 ..... 1010111 @r_vm 567vfmadd_vf 101000 . ..... ..... 101 ..... 1010111 @r_vm 568vfnmadd_vv 101001 . ..... ..... 001 ..... 1010111 @r_vm 569vfnmadd_vf 101001 . ..... ..... 101 ..... 1010111 @r_vm 570vfmsub_vv 101010 . ..... ..... 001 ..... 1010111 @r_vm 571vfmsub_vf 101010 . ..... ..... 101 ..... 1010111 @r_vm 572vfnmsub_vv 101011 . ..... ..... 001 ..... 1010111 @r_vm 573vfnmsub_vf 101011 . ..... ..... 101 ..... 1010111 @r_vm 574vfwmacc_vv 111100 . ..... ..... 001 ..... 1010111 @r_vm 575vfwmacc_vf 111100 . ..... ..... 101 ..... 1010111 @r_vm 576vfwnmacc_vv 111101 . ..... ..... 001 ..... 1010111 @r_vm 577vfwnmacc_vf 111101 . ..... ..... 101 ..... 1010111 @r_vm 578vfwmsac_vv 111110 . ..... ..... 001 ..... 1010111 @r_vm 579vfwmsac_vf 111110 . ..... ..... 101 ..... 1010111 @r_vm 580vfwnmsac_vv 111111 . ..... ..... 001 ..... 1010111 @r_vm 581vfwnmsac_vf 111111 . ..... ..... 101 ..... 1010111 @r_vm 582vfsqrt_v 010011 . ..... 00000 001 ..... 1010111 @r2_vm 583vfrsqrt7_v 010011 . ..... 00100 001 ..... 1010111 @r2_vm 584vfrec7_v 010011 . ..... 00101 001 ..... 1010111 @r2_vm 585vfmin_vv 000100 . ..... ..... 001 ..... 1010111 @r_vm 586vfmin_vf 000100 . ..... ..... 101 ..... 1010111 @r_vm 587vfmax_vv 000110 . ..... ..... 001 ..... 1010111 @r_vm 588vfmax_vf 000110 . ..... ..... 101 ..... 1010111 @r_vm 589vfsgnj_vv 001000 . ..... ..... 001 ..... 1010111 @r_vm 590vfsgnj_vf 001000 . ..... ..... 101 ..... 1010111 @r_vm 591vfsgnjn_vv 001001 . ..... ..... 001 ..... 1010111 @r_vm 592vfsgnjn_vf 001001 . ..... ..... 101 ..... 1010111 @r_vm 593vfsgnjx_vv 001010 . ..... ..... 001 ..... 1010111 @r_vm 594vfsgnjx_vf 001010 . ..... ..... 101 ..... 1010111 @r_vm 595vfslide1up_vf 001110 . ..... ..... 101 ..... 1010111 @r_vm 596vfslide1down_vf 001111 . ..... ..... 101 ..... 1010111 @r_vm 597vmfeq_vv 011000 . ..... ..... 001 ..... 1010111 @r_vm 598vmfeq_vf 011000 . ..... ..... 101 ..... 1010111 @r_vm 599vmfne_vv 011100 . ..... ..... 001 ..... 1010111 @r_vm 600vmfne_vf 011100 . ..... ..... 101 ..... 1010111 @r_vm 601vmflt_vv 011011 . ..... ..... 001 ..... 1010111 @r_vm 602vmflt_vf 011011 . ..... ..... 101 ..... 1010111 @r_vm 603vmfle_vv 011001 . ..... ..... 001 ..... 1010111 @r_vm 604vmfle_vf 011001 . ..... ..... 101 ..... 1010111 @r_vm 605vmfgt_vf 011101 . ..... ..... 101 ..... 1010111 @r_vm 606vmfge_vf 011111 . ..... ..... 101 ..... 1010111 @r_vm 607vfclass_v 010011 . ..... 10000 001 ..... 1010111 @r2_vm 608vfmerge_vfm 010111 0 ..... ..... 101 ..... 1010111 @r_vm_0 609vfmv_v_f 010111 1 00000 ..... 101 ..... 1010111 @r2 610 611vfcvt_xu_f_v 010010 . ..... 00000 001 ..... 1010111 @r2_vm 612vfcvt_x_f_v 010010 . ..... 00001 001 ..... 1010111 @r2_vm 613vfcvt_f_xu_v 010010 . ..... 00010 001 ..... 1010111 @r2_vm 614vfcvt_f_x_v 010010 . ..... 00011 001 ..... 1010111 @r2_vm 615vfcvt_rtz_xu_f_v 010010 . ..... 00110 001 ..... 1010111 @r2_vm 616vfcvt_rtz_x_f_v 010010 . ..... 00111 001 ..... 1010111 @r2_vm 617 618vfwcvt_xu_f_v 010010 . ..... 01000 001 ..... 1010111 @r2_vm 619vfwcvt_x_f_v 010010 . ..... 01001 001 ..... 1010111 @r2_vm 620vfwcvt_f_xu_v 010010 . ..... 01010 001 ..... 1010111 @r2_vm 621vfwcvt_f_x_v 010010 . ..... 01011 001 ..... 1010111 @r2_vm 622vfwcvt_f_f_v 010010 . ..... 01100 001 ..... 1010111 @r2_vm 623vfwcvt_rtz_xu_f_v 010010 . ..... 01110 001 ..... 1010111 @r2_vm 624vfwcvt_rtz_x_f_v 010010 . ..... 01111 001 ..... 1010111 @r2_vm 625 626vfncvt_xu_f_w 010010 . ..... 10000 001 ..... 1010111 @r2_vm 627vfncvt_x_f_w 010010 . ..... 10001 001 ..... 1010111 @r2_vm 628vfncvt_f_xu_w 010010 . ..... 10010 001 ..... 1010111 @r2_vm 629vfncvt_f_x_w 010010 . ..... 10011 001 ..... 1010111 @r2_vm 630vfncvt_f_f_w 010010 . ..... 10100 001 ..... 1010111 @r2_vm 631vfncvt_rod_f_f_w 010010 . ..... 10101 001 ..... 1010111 @r2_vm 632vfncvt_rtz_xu_f_w 010010 . ..... 10110 001 ..... 1010111 @r2_vm 633vfncvt_rtz_x_f_w 010010 . ..... 10111 001 ..... 1010111 @r2_vm 634 635vredsum_vs 000000 . ..... ..... 010 ..... 1010111 @r_vm 636vredand_vs 000001 . ..... ..... 010 ..... 1010111 @r_vm 637vredor_vs 000010 . ..... ..... 010 ..... 1010111 @r_vm 638vredxor_vs 000011 . ..... ..... 010 ..... 1010111 @r_vm 639vredminu_vs 000100 . ..... ..... 010 ..... 1010111 @r_vm 640vredmin_vs 000101 . ..... ..... 010 ..... 1010111 @r_vm 641vredmaxu_vs 000110 . ..... ..... 010 ..... 1010111 @r_vm 642vredmax_vs 000111 . ..... ..... 010 ..... 1010111 @r_vm 643vwredsumu_vs 110000 . ..... ..... 000 ..... 1010111 @r_vm 644vwredsum_vs 110001 . ..... ..... 000 ..... 1010111 @r_vm 645# Vector ordered and unordered reduction sum 646vfredsum_vs 0000-1 . ..... ..... 001 ..... 1010111 @r_vm 647vfredmin_vs 000101 . ..... ..... 001 ..... 1010111 @r_vm 648vfredmax_vs 000111 . ..... ..... 001 ..... 1010111 @r_vm 649# Vector widening ordered and unordered float reduction sum 650vfwredsum_vs 1100-1 . ..... ..... 001 ..... 1010111 @r_vm 651vmand_mm 011001 - ..... ..... 010 ..... 1010111 @r 652vmnand_mm 011101 - ..... ..... 010 ..... 1010111 @r 653vmandn_mm 011000 - ..... ..... 010 ..... 1010111 @r 654vmxor_mm 011011 - ..... ..... 010 ..... 1010111 @r 655vmor_mm 011010 - ..... ..... 010 ..... 1010111 @r 656vmnor_mm 011110 - ..... ..... 010 ..... 1010111 @r 657vmorn_mm 011100 - ..... ..... 010 ..... 1010111 @r 658vmxnor_mm 011111 - ..... ..... 010 ..... 1010111 @r 659vcpop_m 010000 . ..... 10000 010 ..... 1010111 @r2_vm 660vfirst_m 010000 . ..... 10001 010 ..... 1010111 @r2_vm 661vmsbf_m 010100 . ..... 00001 010 ..... 1010111 @r2_vm 662vmsif_m 010100 . ..... 00011 010 ..... 1010111 @r2_vm 663vmsof_m 010100 . ..... 00010 010 ..... 1010111 @r2_vm 664viota_m 010100 . ..... 10000 010 ..... 1010111 @r2_vm 665vid_v 010100 . 00000 10001 010 ..... 1010111 @r1_vm 666vmv_x_s 010000 1 ..... 00000 010 ..... 1010111 @r2rd 667vmv_s_x 010000 1 00000 ..... 110 ..... 1010111 @r2 668vfmv_f_s 010000 1 ..... 00000 001 ..... 1010111 @r2rd 669vfmv_s_f 010000 1 00000 ..... 101 ..... 1010111 @r2 670vslideup_vx 001110 . ..... ..... 100 ..... 1010111 @r_vm 671vslideup_vi 001110 . ..... ..... 011 ..... 1010111 @r_vm 672vslide1up_vx 001110 . ..... ..... 110 ..... 1010111 @r_vm 673vslidedown_vx 001111 . ..... ..... 100 ..... 1010111 @r_vm 674vslidedown_vi 001111 . ..... ..... 011 ..... 1010111 @r_vm 675vslide1down_vx 001111 . ..... ..... 110 ..... 1010111 @r_vm 676vrgather_vv 001100 . ..... ..... 000 ..... 1010111 @r_vm 677vrgatherei16_vv 001110 . ..... ..... 000 ..... 1010111 @r_vm 678vrgather_vx 001100 . ..... ..... 100 ..... 1010111 @r_vm 679vrgather_vi 001100 . ..... ..... 011 ..... 1010111 @r_vm 680vcompress_vm 010111 - ..... ..... 010 ..... 1010111 @r 681vmv1r_v 100111 1 ..... 00000 011 ..... 1010111 @r2rd 682vmv2r_v 100111 1 ..... 00001 011 ..... 1010111 @r2rd 683vmv4r_v 100111 1 ..... 00011 011 ..... 1010111 @r2rd 684vmv8r_v 100111 1 ..... 00111 011 ..... 1010111 @r2rd 685 686# Vector Integer Extension 687vzext_vf2 010010 . ..... 00110 010 ..... 1010111 @r2_vm 688vzext_vf4 010010 . ..... 00100 010 ..... 1010111 @r2_vm 689vzext_vf8 010010 . ..... 00010 010 ..... 1010111 @r2_vm 690vsext_vf2 010010 . ..... 00111 010 ..... 1010111 @r2_vm 691vsext_vf4 010010 . ..... 00101 010 ..... 1010111 @r2_vm 692vsext_vf8 010010 . ..... 00011 010 ..... 1010111 @r2_vm 693 694vsetvli 0 ........... ..... 111 ..... 1010111 @r2_zimm11 695vsetivli 11 .......... ..... 111 ..... 1010111 @r2_zimm10 696vsetvl 1000000 ..... ..... 111 ..... 1010111 @r 697 698# *** RV32 Zba Standard Extension *** 699sh1add 0010000 .......... 010 ..... 0110011 @r 700sh2add 0010000 .......... 100 ..... 0110011 @r 701sh3add 0010000 .......... 110 ..... 0110011 @r 702 703# *** RV64 Zba Standard Extension (in addition to RV32 Zba) *** 704add_uw 0000100 .......... 000 ..... 0111011 @r 705sh1add_uw 0010000 .......... 010 ..... 0111011 @r 706sh2add_uw 0010000 .......... 100 ..... 0111011 @r 707sh3add_uw 0010000 .......... 110 ..... 0111011 @r 708slli_uw 00001 ............ 001 ..... 0011011 @sh 709 710# *** RV32 Zbb Standard Extension *** 711andn 0100000 .......... 111 ..... 0110011 @r 712clz 011000 000000 ..... 001 ..... 0010011 @r2 713cpop 011000 000010 ..... 001 ..... 0010011 @r2 714ctz 011000 000001 ..... 001 ..... 0010011 @r2 715max 0000101 .......... 110 ..... 0110011 @r 716maxu 0000101 .......... 111 ..... 0110011 @r 717min 0000101 .......... 100 ..... 0110011 @r 718minu 0000101 .......... 101 ..... 0110011 @r 719orc_b 001010 000111 ..... 101 ..... 0010011 @r2 720orn 0100000 .......... 110 ..... 0110011 @r 721# The encoding for rev8 differs between RV32 and RV64. 722# rev8_32 denotes the RV32 variant. 723rev8_32 011010 011000 ..... 101 ..... 0010011 @r2 724rol 0110000 .......... 001 ..... 0110011 @r 725ror 0110000 .......... 101 ..... 0110011 @r 726rori 01100 ............ 101 ..... 0010011 @sh 727sext_b 011000 000100 ..... 001 ..... 0010011 @r2 728sext_h 011000 000101 ..... 001 ..... 0010011 @r2 729xnor 0100000 .......... 100 ..... 0110011 @r 730# The encoding for zext.h differs between RV32 and RV64. 731# zext_h_32 denotes the RV32 variant. 732zext_h_32 0000100 00000 ..... 100 ..... 0110011 @r2 733 734# *** RV64 Zbb Standard Extension (in addition to RV32 Zbb) *** 735clzw 0110000 00000 ..... 001 ..... 0011011 @r2 736ctzw 0110000 00001 ..... 001 ..... 0011011 @r2 737cpopw 0110000 00010 ..... 001 ..... 0011011 @r2 738# The encoding for rev8 differs between RV32 and RV64. 739# When executing on RV64, the encoding used in RV32 is an illegal 740# instruction, so we use different handler functions to differentiate. 741rev8_64 011010 111000 ..... 101 ..... 0010011 @r2 742rolw 0110000 .......... 001 ..... 0111011 @r 743roriw 0110000 .......... 101 ..... 0011011 @sh5 744rorw 0110000 .......... 101 ..... 0111011 @r 745# The encoding for zext.h differs between RV32 and RV64. 746# When executing on RV64, the encoding used in RV32 is an illegal 747# instruction, so we use different handler functions to differentiate. 748zext_h_64 0000100 00000 ..... 100 ..... 0111011 @r2 749 750# *** RV32 Zbc Standard Extension *** 751clmul 0000101 .......... 001 ..... 0110011 @r 752clmulh 0000101 .......... 011 ..... 0110011 @r 753clmulr 0000101 .......... 010 ..... 0110011 @r 754 755# *** RV32 Zbs Standard Extension *** 756bclr 0100100 .......... 001 ..... 0110011 @r 757bclri 01001. ........... 001 ..... 0010011 @sh 758bext 0100100 .......... 101 ..... 0110011 @r 759bexti 01001. ........... 101 ..... 0010011 @sh 760binv 0110100 .......... 001 ..... 0110011 @r 761binvi 01101. ........... 001 ..... 0010011 @sh 762bset 0010100 .......... 001 ..... 0110011 @r 763bseti 00101. ........... 001 ..... 0010011 @sh 764 765# *** RV32 Zfh Extension *** 766flh ............ ..... 001 ..... 0000111 @i 767fsh ....... ..... ..... 001 ..... 0100111 @s 768fmadd_h ..... 10 ..... ..... ... ..... 1000011 @r4_rm 769fmsub_h ..... 10 ..... ..... ... ..... 1000111 @r4_rm 770fnmsub_h ..... 10 ..... ..... ... ..... 1001011 @r4_rm 771fnmadd_h ..... 10 ..... ..... ... ..... 1001111 @r4_rm 772fadd_h 0000010 ..... ..... ... ..... 1010011 @r_rm 773fsub_h 0000110 ..... ..... ... ..... 1010011 @r_rm 774fmul_h 0001010 ..... ..... ... ..... 1010011 @r_rm 775fdiv_h 0001110 ..... ..... ... ..... 1010011 @r_rm 776fsqrt_h 0101110 00000 ..... ... ..... 1010011 @r2_rm 777fsgnj_h 0010010 ..... ..... 000 ..... 1010011 @r 778fsgnjn_h 0010010 ..... ..... 001 ..... 1010011 @r 779fsgnjx_h 0010010 ..... ..... 010 ..... 1010011 @r 780fmin_h 0010110 ..... ..... 000 ..... 1010011 @r 781fmax_h 0010110 ..... ..... 001 ..... 1010011 @r 782fcvt_h_s 0100010 00000 ..... ... ..... 1010011 @r2_rm 783fcvt_s_h 0100000 00010 ..... ... ..... 1010011 @r2_rm 784fcvt_h_d 0100010 00001 ..... ... ..... 1010011 @r2_rm 785fcvt_d_h 0100001 00010 ..... ... ..... 1010011 @r2_rm 786fcvt_w_h 1100010 00000 ..... ... ..... 1010011 @r2_rm 787fcvt_wu_h 1100010 00001 ..... ... ..... 1010011 @r2_rm 788fmv_x_h 1110010 00000 ..... 000 ..... 1010011 @r2 789feq_h 1010010 ..... ..... 010 ..... 1010011 @r 790flt_h 1010010 ..... ..... 001 ..... 1010011 @r 791fle_h 1010010 ..... ..... 000 ..... 1010011 @r 792fclass_h 1110010 00000 ..... 001 ..... 1010011 @r2 793fcvt_h_w 1101010 00000 ..... ... ..... 1010011 @r2_rm 794fcvt_h_wu 1101010 00001 ..... ... ..... 1010011 @r2_rm 795fmv_h_x 1111010 00000 ..... 000 ..... 1010011 @r2 796 797# *** RV64 Zfh Extension (in addition to RV32 Zfh) *** 798fcvt_l_h 1100010 00010 ..... ... ..... 1010011 @r2_rm 799fcvt_lu_h 1100010 00011 ..... ... ..... 1010011 @r2_rm 800fcvt_h_l 1101010 00010 ..... ... ..... 1010011 @r2_rm 801fcvt_h_lu 1101010 00011 ..... ... ..... 1010011 @r2_rm 802