xref: /openbmc/qemu/target/riscv/insn32.decode (revision 68d19b58)
1#
2# RISC-V translation routines for the RVXI Base Integer Instruction Set.
3#
4# Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de
5#                    Bastian Koppelmann, kbastian@mail.uni-paderborn.de
6#
7# This program is free software; you can redistribute it and/or modify it
8# under the terms and conditions of the GNU General Public License,
9# version 2 or later, as published by the Free Software Foundation.
10#
11# This program is distributed in the hope it will be useful, but WITHOUT
12# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14# more details.
15#
16# You should have received a copy of the GNU General Public License along with
17# this program.  If not, see <http://www.gnu.org/licenses/>.
18
19# Fields:
20%rs3       27:5
21%rs2       20:5
22%rs1       15:5
23%rd        7:5
24%sh5       20:5
25%sh6       20:6
26
27%sh7    20:7
28%csr    20:12
29%rm     12:3
30%nf     29:3                     !function=ex_plus_1
31
32# immediates:
33%imm_i    20:s12
34%imm_s    25:s7 7:5
35%imm_b    31:s1 7:1 25:6 8:4     !function=ex_shift_1
36%imm_j    31:s1 12:8 20:1 21:10  !function=ex_shift_1
37%imm_u    12:s20                 !function=ex_shift_12
38%imm_bs   30:2                   !function=ex_shift_3
39
40# Argument sets:
41&empty
42&b    imm rs2 rs1
43&i    imm rs1 rd
44&j    imm rd
45&r    rd rs1 rs2
46&r2   rd rs1
47&r2_s rs1 rs2
48&s    imm rs1 rs2
49&u    imm rd
50&shift     shamt rs1 rd
51&atomic    aq rl rs2 rs1 rd
52&rmrr      vm rd rs1 rs2
53&rmr       vm rd rs2
54&r2nfvm    vm rd rs1 nf
55&rnfvm     vm rd rs1 rs2 nf
56&k_aes     shamt rs2 rs1 rd
57
58# Formats 32:
59@r       .......   ..... ..... ... ..... ....... &r                %rs2 %rs1 %rd
60@i       ............    ..... ... ..... ....... &i      imm=%imm_i     %rs1 %rd
61@b       .......   ..... ..... ... ..... ....... &b      imm=%imm_b %rs2 %rs1
62@s       .......   ..... ..... ... ..... ....... &s      imm=%imm_s %rs2 %rs1
63@u       ....................      ..... ....... &u      imm=%imm_u          %rd
64@j       ....................      ..... ....... &j      imm=%imm_j          %rd
65
66@sh      ......  ...... .....  ... ..... ....... &shift  shamt=%sh7     %rs1 %rd
67@csr     ............   .....  ... ..... .......               %csr     %rs1 %rd
68
69@atom_ld ..... aq:1 rl:1 ..... ........ ..... ....... &atomic rs2=0     %rs1 %rd
70@atom_st ..... aq:1 rl:1 ..... ........ ..... ....... &atomic %rs2      %rs1 %rd
71
72@r4_rm   ..... ..  ..... ..... ... ..... ....... %rs3 %rs2 %rs1 %rm %rd
73@r_rm    .......   ..... ..... ... ..... ....... %rs2 %rs1 %rm %rd
74@r2_rm   .......   ..... ..... ... ..... ....... %rs1 %rm %rd
75@r2      .......   ..... ..... ... ..... ....... &r2 %rs1 %rd
76@r2_nfvm ... ... vm:1 ..... ..... ... ..... ....... &r2nfvm %nf %rs1 %rd
77@r2_vm   ...... vm:1 ..... ..... ... ..... ....... &rmr %rs2 %rd
78@r1_vm   ...... vm:1 ..... ..... ... ..... ....... %rd
79@r_nfvm  ... ... vm:1 ..... ..... ... ..... ....... &rnfvm %nf %rs2 %rs1 %rd
80@r2rd    .......   ..... ..... ... ..... ....... %rs2 %rd
81@r_vm    ...... vm:1 ..... ..... ... ..... ....... &rmrr %rs2 %rs1 %rd
82@r_vm_1  ...... . ..... ..... ... ..... .......    &rmrr vm=1 %rs2 %rs1 %rd
83@r_vm_0  ...... . ..... ..... ... ..... .......    &rmrr vm=0 %rs2 %rs1 %rd
84@r2_zimm11 . zimm:11  ..... ... ..... ....... %rs1 %rd
85@r2_zimm10 .. zimm:10  ..... ... ..... ....... %rs1 %rd
86@r2_s    .......   ..... ..... ... ..... ....... %rs2 %rs1
87
88@hfence_gvma ....... ..... .....   ... ..... ....... %rs2 %rs1
89@hfence_vvma ....... ..... .....   ... ..... ....... %rs2 %rs1
90
91@sfence_vma ....... ..... .....   ... ..... ....... %rs2 %rs1
92@sfence_vm  ....... ..... .....   ... ..... ....... %rs1
93
94@k_aes   .. ..... ..... .....  ... ..... ....... &k_aes  shamt=%imm_bs   %rs2 %rs1 %rd
95
96# Formats 64:
97@sh5     .......  ..... .....  ... ..... ....... &shift  shamt=%sh5      %rs1 %rd
98
99# Formats 128:
100@sh6       ...... ...... ..... ... ..... ....... &shift shamt=%sh6 %rs1 %rd
101
102# *** Privileged Instructions ***
103ecall       000000000000     00000 000 00000 1110011
104ebreak      000000000001     00000 000 00000 1110011
105uret        0000000    00010 00000 000 00000 1110011
106sret        0001000    00010 00000 000 00000 1110011
107mret        0011000    00010 00000 000 00000 1110011
108wfi         0001000    00101 00000 000 00000 1110011
109sfence_vma  0001001    ..... ..... 000 00000 1110011 @sfence_vma
110sfence_vm   0001000    00100 ..... 000 00000 1110011 @sfence_vm
111
112# *** RV32I Base Instruction Set ***
113lui      ....................       ..... 0110111 @u
114auipc    ....................       ..... 0010111 @u
115jal      ....................       ..... 1101111 @j
116jalr     ............     ..... 000 ..... 1100111 @i
117beq      ....... .....    ..... 000 ..... 1100011 @b
118bne      ....... .....    ..... 001 ..... 1100011 @b
119blt      ....... .....    ..... 100 ..... 1100011 @b
120bge      ....... .....    ..... 101 ..... 1100011 @b
121bltu     ....... .....    ..... 110 ..... 1100011 @b
122bgeu     ....... .....    ..... 111 ..... 1100011 @b
123lb       ............     ..... 000 ..... 0000011 @i
124lh       ............     ..... 001 ..... 0000011 @i
125lw       ............     ..... 010 ..... 0000011 @i
126lbu      ............     ..... 100 ..... 0000011 @i
127lhu      ............     ..... 101 ..... 0000011 @i
128sb       .......  .....   ..... 000 ..... 0100011 @s
129sh       .......  .....   ..... 001 ..... 0100011 @s
130sw       .......  .....   ..... 010 ..... 0100011 @s
131addi     ............     ..... 000 ..... 0010011 @i
132slti     ............     ..... 010 ..... 0010011 @i
133sltiu    ............     ..... 011 ..... 0010011 @i
134xori     ............     ..... 100 ..... 0010011 @i
135ori      ............     ..... 110 ..... 0010011 @i
136andi     ............     ..... 111 ..... 0010011 @i
137slli     00000. ......    ..... 001 ..... 0010011 @sh
138srli     00000. ......    ..... 101 ..... 0010011 @sh
139srai     01000. ......    ..... 101 ..... 0010011 @sh
140add      0000000 .....    ..... 000 ..... 0110011 @r
141sub      0100000 .....    ..... 000 ..... 0110011 @r
142sll      0000000 .....    ..... 001 ..... 0110011 @r
143slt      0000000 .....    ..... 010 ..... 0110011 @r
144sltu     0000000 .....    ..... 011 ..... 0110011 @r
145xor      0000000 .....    ..... 100 ..... 0110011 @r
146srl      0000000 .....    ..... 101 ..... 0110011 @r
147sra      0100000 .....    ..... 101 ..... 0110011 @r
148or       0000000 .....    ..... 110 ..... 0110011 @r
149and      0000000 .....    ..... 111 ..... 0110011 @r
150fence    ---- pred:4 succ:4 ----- 000 ----- 0001111
151fence_i  ---- ----   ----   ----- 001 ----- 0001111
152csrrw    ............     ..... 001 ..... 1110011 @csr
153csrrs    ............     ..... 010 ..... 1110011 @csr
154csrrc    ............     ..... 011 ..... 1110011 @csr
155csrrwi   ............     ..... 101 ..... 1110011 @csr
156csrrsi   ............     ..... 110 ..... 1110011 @csr
157csrrci   ............     ..... 111 ..... 1110011 @csr
158
159# *** RV64I Base Instruction Set (in addition to RV32I) ***
160lwu      ............   ..... 110 ..... 0000011 @i
161ld       ............   ..... 011 ..... 0000011 @i
162sd       ....... .....  ..... 011 ..... 0100011 @s
163addiw    ............   ..... 000 ..... 0011011 @i
164slliw    0000000 .....  ..... 001 ..... 0011011 @sh5
165srliw    0000000 .....  ..... 101 ..... 0011011 @sh5
166sraiw    0100000 .....  ..... 101 ..... 0011011 @sh5
167addw     0000000 .....  ..... 000 ..... 0111011 @r
168subw     0100000 .....  ..... 000 ..... 0111011 @r
169sllw     0000000 .....  ..... 001 ..... 0111011 @r
170srlw     0000000 .....  ..... 101 ..... 0111011 @r
171sraw     0100000 .....  ..... 101 ..... 0111011 @r
172
173# *** RV128I Base Instruction Set (in addition to RV64I) ***
174ldu      ............   ..... 111 ..... 0000011 @i
175lq       ............   ..... 010 ..... 0001111 @i
176sq       ............   ..... 100 ..... 0100011 @s
177addid    ............  .....  000 ..... 1011011 @i
178sllid    000000 ......  ..... 001 ..... 1011011 @sh6
179srlid    000000 ......  ..... 101 ..... 1011011 @sh6
180sraid    010000 ......  ..... 101 ..... 1011011 @sh6
181addd     0000000 ..... .....  000 ..... 1111011 @r
182subd     0100000 ..... .....  000 ..... 1111011 @r
183slld     0000000 ..... .....  001 ..... 1111011 @r
184srld     0000000 ..... .....  101 ..... 1111011 @r
185srad     0100000 ..... .....  101 ..... 1111011 @r
186
187# *** RV32M Standard Extension ***
188mul      0000001 .....  ..... 000 ..... 0110011 @r
189mulh     0000001 .....  ..... 001 ..... 0110011 @r
190mulhsu   0000001 .....  ..... 010 ..... 0110011 @r
191mulhu    0000001 .....  ..... 011 ..... 0110011 @r
192div      0000001 .....  ..... 100 ..... 0110011 @r
193divu     0000001 .....  ..... 101 ..... 0110011 @r
194rem      0000001 .....  ..... 110 ..... 0110011 @r
195remu     0000001 .....  ..... 111 ..... 0110011 @r
196
197# *** RV64M Standard Extension (in addition to RV32M) ***
198mulw     0000001 .....  ..... 000 ..... 0111011 @r
199divw     0000001 .....  ..... 100 ..... 0111011 @r
200divuw    0000001 .....  ..... 101 ..... 0111011 @r
201remw     0000001 .....  ..... 110 ..... 0111011 @r
202remuw    0000001 .....  ..... 111 ..... 0111011 @r
203
204# *** RV128M Standard Extension (in addition to RV64M) ***
205muld     0000001 .....  ..... 000 ..... 1111011 @r
206divd     0000001 .....  ..... 100 ..... 1111011 @r
207divud    0000001 .....  ..... 101 ..... 1111011 @r
208remd     0000001 .....  ..... 110 ..... 1111011 @r
209remud    0000001 .....  ..... 111 ..... 1111011 @r
210
211# *** RV32A Standard Extension ***
212lr_w       00010 . . 00000 ..... 010 ..... 0101111 @atom_ld
213sc_w       00011 . . ..... ..... 010 ..... 0101111 @atom_st
214amoswap_w  00001 . . ..... ..... 010 ..... 0101111 @atom_st
215amoadd_w   00000 . . ..... ..... 010 ..... 0101111 @atom_st
216amoxor_w   00100 . . ..... ..... 010 ..... 0101111 @atom_st
217amoand_w   01100 . . ..... ..... 010 ..... 0101111 @atom_st
218amoor_w    01000 . . ..... ..... 010 ..... 0101111 @atom_st
219amomin_w   10000 . . ..... ..... 010 ..... 0101111 @atom_st
220amomax_w   10100 . . ..... ..... 010 ..... 0101111 @atom_st
221amominu_w  11000 . . ..... ..... 010 ..... 0101111 @atom_st
222amomaxu_w  11100 . . ..... ..... 010 ..... 0101111 @atom_st
223
224# *** RV64A Standard Extension (in addition to RV32A) ***
225lr_d       00010 . . 00000 ..... 011 ..... 0101111 @atom_ld
226sc_d       00011 . . ..... ..... 011 ..... 0101111 @atom_st
227amoswap_d  00001 . . ..... ..... 011 ..... 0101111 @atom_st
228amoadd_d   00000 . . ..... ..... 011 ..... 0101111 @atom_st
229amoxor_d   00100 . . ..... ..... 011 ..... 0101111 @atom_st
230amoand_d   01100 . . ..... ..... 011 ..... 0101111 @atom_st
231amoor_d    01000 . . ..... ..... 011 ..... 0101111 @atom_st
232amomin_d   10000 . . ..... ..... 011 ..... 0101111 @atom_st
233amomax_d   10100 . . ..... ..... 011 ..... 0101111 @atom_st
234amominu_d  11000 . . ..... ..... 011 ..... 0101111 @atom_st
235amomaxu_d  11100 . . ..... ..... 011 ..... 0101111 @atom_st
236
237# *** RV32F Standard Extension ***
238flw        ............   ..... 010 ..... 0000111 @i
239fsw        .......  ..... ..... 010 ..... 0100111 @s
240fmadd_s    ..... 00 ..... ..... ... ..... 1000011 @r4_rm
241fmsub_s    ..... 00 ..... ..... ... ..... 1000111 @r4_rm
242fnmsub_s   ..... 00 ..... ..... ... ..... 1001011 @r4_rm
243fnmadd_s   ..... 00 ..... ..... ... ..... 1001111 @r4_rm
244fadd_s     0000000  ..... ..... ... ..... 1010011 @r_rm
245fsub_s     0000100  ..... ..... ... ..... 1010011 @r_rm
246fmul_s     0001000  ..... ..... ... ..... 1010011 @r_rm
247fdiv_s     0001100  ..... ..... ... ..... 1010011 @r_rm
248fsqrt_s    0101100  00000 ..... ... ..... 1010011 @r2_rm
249fsgnj_s    0010000  ..... ..... 000 ..... 1010011 @r
250fsgnjn_s   0010000  ..... ..... 001 ..... 1010011 @r
251fsgnjx_s   0010000  ..... ..... 010 ..... 1010011 @r
252fmin_s     0010100  ..... ..... 000 ..... 1010011 @r
253fmax_s     0010100  ..... ..... 001 ..... 1010011 @r
254fcvt_w_s   1100000  00000 ..... ... ..... 1010011 @r2_rm
255fcvt_wu_s  1100000  00001 ..... ... ..... 1010011 @r2_rm
256fmv_x_w    1110000  00000 ..... 000 ..... 1010011 @r2
257feq_s      1010000  ..... ..... 010 ..... 1010011 @r
258flt_s      1010000  ..... ..... 001 ..... 1010011 @r
259fle_s      1010000  ..... ..... 000 ..... 1010011 @r
260fclass_s   1110000  00000 ..... 001 ..... 1010011 @r2
261fcvt_s_w   1101000  00000 ..... ... ..... 1010011 @r2_rm
262fcvt_s_wu  1101000  00001 ..... ... ..... 1010011 @r2_rm
263fmv_w_x    1111000  00000 ..... 000 ..... 1010011 @r2
264
265# *** RV64F Standard Extension (in addition to RV32F) ***
266fcvt_l_s   1100000  00010 ..... ... ..... 1010011 @r2_rm
267fcvt_lu_s  1100000  00011 ..... ... ..... 1010011 @r2_rm
268fcvt_s_l   1101000  00010 ..... ... ..... 1010011 @r2_rm
269fcvt_s_lu  1101000  00011 ..... ... ..... 1010011 @r2_rm
270
271# *** RV32D Standard Extension ***
272fld        ............   ..... 011 ..... 0000111 @i
273fsd        ....... .....  ..... 011 ..... 0100111 @s
274fmadd_d    ..... 01 ..... ..... ... ..... 1000011 @r4_rm
275fmsub_d    ..... 01 ..... ..... ... ..... 1000111 @r4_rm
276fnmsub_d   ..... 01 ..... ..... ... ..... 1001011 @r4_rm
277fnmadd_d   ..... 01 ..... ..... ... ..... 1001111 @r4_rm
278fadd_d     0000001  ..... ..... ... ..... 1010011 @r_rm
279fsub_d     0000101  ..... ..... ... ..... 1010011 @r_rm
280fmul_d     0001001  ..... ..... ... ..... 1010011 @r_rm
281fdiv_d     0001101  ..... ..... ... ..... 1010011 @r_rm
282fsqrt_d    0101101  00000 ..... ... ..... 1010011 @r2_rm
283fsgnj_d    0010001  ..... ..... 000 ..... 1010011 @r
284fsgnjn_d   0010001  ..... ..... 001 ..... 1010011 @r
285fsgnjx_d   0010001  ..... ..... 010 ..... 1010011 @r
286fmin_d     0010101  ..... ..... 000 ..... 1010011 @r
287fmax_d     0010101  ..... ..... 001 ..... 1010011 @r
288fcvt_s_d   0100000  00001 ..... ... ..... 1010011 @r2_rm
289fcvt_d_s   0100001  00000 ..... ... ..... 1010011 @r2_rm
290feq_d      1010001  ..... ..... 010 ..... 1010011 @r
291flt_d      1010001  ..... ..... 001 ..... 1010011 @r
292fle_d      1010001  ..... ..... 000 ..... 1010011 @r
293fclass_d   1110001  00000 ..... 001 ..... 1010011 @r2
294fcvt_w_d   1100001  00000 ..... ... ..... 1010011 @r2_rm
295fcvt_wu_d  1100001  00001 ..... ... ..... 1010011 @r2_rm
296fcvt_d_w   1101001  00000 ..... ... ..... 1010011 @r2_rm
297fcvt_d_wu  1101001  00001 ..... ... ..... 1010011 @r2_rm
298
299# *** RV64D Standard Extension (in addition to RV32D) ***
300fcvt_l_d   1100001  00010 ..... ... ..... 1010011 @r2_rm
301fcvt_lu_d  1100001  00011 ..... ... ..... 1010011 @r2_rm
302fmv_x_d    1110001  00000 ..... 000 ..... 1010011 @r2
303fcvt_d_l   1101001  00010 ..... ... ..... 1010011 @r2_rm
304fcvt_d_lu  1101001  00011 ..... ... ..... 1010011 @r2_rm
305fmv_d_x    1111001  00000 ..... 000 ..... 1010011 @r2
306
307# *** RV32H Base Instruction Set ***
308hlv_b       0110000  00000  ..... 100 ..... 1110011 @r2
309hlv_bu      0110000  00001  ..... 100 ..... 1110011 @r2
310hlv_h       0110010  00000  ..... 100 ..... 1110011 @r2
311hlv_hu      0110010  00001  ..... 100 ..... 1110011 @r2
312hlvx_hu     0110010  00011  ..... 100 ..... 1110011 @r2
313hlv_w       0110100  00000  ..... 100 ..... 1110011 @r2
314hlvx_wu     0110100  00011  ..... 100 ..... 1110011 @r2
315hsv_b       0110001  .....  ..... 100 00000 1110011 @r2_s
316hsv_h       0110011  .....  ..... 100 00000 1110011 @r2_s
317hsv_w       0110101  .....  ..... 100 00000 1110011 @r2_s
318hfence_gvma 0110001  .....  ..... 000 00000 1110011 @hfence_gvma
319hfence_vvma 0010001  .....  ..... 000 00000 1110011 @hfence_vvma
320
321# *** RV64H Base Instruction Set ***
322hlv_wu    0110100  00001   ..... 100 ..... 1110011 @r2
323hlv_d     0110110  00000   ..... 100 ..... 1110011 @r2
324hsv_d     0110111  .....   ..... 100 00000 1110011 @r2_s
325
326# *** Vector loads and stores are encoded within LOADFP/STORE-FP ***
327# Vector unit-stride load/store insns.
328vle8_v     ... 000 . 00000 ..... 000 ..... 0000111 @r2_nfvm
329vle16_v    ... 000 . 00000 ..... 101 ..... 0000111 @r2_nfvm
330vle32_v    ... 000 . 00000 ..... 110 ..... 0000111 @r2_nfvm
331vle64_v    ... 000 . 00000 ..... 111 ..... 0000111 @r2_nfvm
332vse8_v     ... 000 . 00000 ..... 000 ..... 0100111 @r2_nfvm
333vse16_v    ... 000 . 00000 ..... 101 ..... 0100111 @r2_nfvm
334vse32_v    ... 000 . 00000 ..... 110 ..... 0100111 @r2_nfvm
335vse64_v    ... 000 . 00000 ..... 111 ..... 0100111 @r2_nfvm
336
337# Vector unit-stride mask load/store insns.
338vlm_v      000 000 1 01011 ..... 000 ..... 0000111 @r2
339vsm_v      000 000 1 01011 ..... 000 ..... 0100111 @r2
340
341# Vector strided insns.
342vlse8_v     ... 010 . ..... ..... 000 ..... 0000111 @r_nfvm
343vlse16_v    ... 010 . ..... ..... 101 ..... 0000111 @r_nfvm
344vlse32_v    ... 010 . ..... ..... 110 ..... 0000111 @r_nfvm
345vlse64_v    ... 010 . ..... ..... 111 ..... 0000111 @r_nfvm
346vsse8_v     ... 010 . ..... ..... 000 ..... 0100111 @r_nfvm
347vsse16_v    ... 010 . ..... ..... 101 ..... 0100111 @r_nfvm
348vsse32_v    ... 010 . ..... ..... 110 ..... 0100111 @r_nfvm
349vsse64_v    ... 010 . ..... ..... 111 ..... 0100111 @r_nfvm
350
351# Vector ordered-indexed and unordered-indexed load insns.
352vlxei8_v      ... 0-1 . ..... ..... 000 ..... 0000111 @r_nfvm
353vlxei16_v     ... 0-1 . ..... ..... 101 ..... 0000111 @r_nfvm
354vlxei32_v     ... 0-1 . ..... ..... 110 ..... 0000111 @r_nfvm
355vlxei64_v     ... 0-1 . ..... ..... 111 ..... 0000111 @r_nfvm
356
357# Vector ordered-indexed and unordered-indexed store insns.
358vsxei8_v      ... 0-1 . ..... ..... 000 ..... 0100111 @r_nfvm
359vsxei16_v     ... 0-1 . ..... ..... 101 ..... 0100111 @r_nfvm
360vsxei32_v     ... 0-1 . ..... ..... 110 ..... 0100111 @r_nfvm
361vsxei64_v     ... 0-1 . ..... ..... 111 ..... 0100111 @r_nfvm
362
363# Vector unit-stride fault-only-first load insns.
364vle8ff_v      ... 000 . 10000 ..... 000 ..... 0000111 @r2_nfvm
365vle16ff_v     ... 000 . 10000 ..... 101 ..... 0000111 @r2_nfvm
366vle32ff_v     ... 000 . 10000 ..... 110 ..... 0000111 @r2_nfvm
367vle64ff_v     ... 000 . 10000 ..... 111 ..... 0000111 @r2_nfvm
368
369# Vector whole register insns
370vl1re8_v      000 000 1 01000 ..... 000 ..... 0000111 @r2
371vl1re16_v     000 000 1 01000 ..... 101 ..... 0000111 @r2
372vl1re32_v     000 000 1 01000 ..... 110 ..... 0000111 @r2
373vl1re64_v     000 000 1 01000 ..... 111 ..... 0000111 @r2
374vl2re8_v      001 000 1 01000 ..... 000 ..... 0000111 @r2
375vl2re16_v     001 000 1 01000 ..... 101 ..... 0000111 @r2
376vl2re32_v     001 000 1 01000 ..... 110 ..... 0000111 @r2
377vl2re64_v     001 000 1 01000 ..... 111 ..... 0000111 @r2
378vl4re8_v      011 000 1 01000 ..... 000 ..... 0000111 @r2
379vl4re16_v     011 000 1 01000 ..... 101 ..... 0000111 @r2
380vl4re32_v     011 000 1 01000 ..... 110 ..... 0000111 @r2
381vl4re64_v     011 000 1 01000 ..... 111 ..... 0000111 @r2
382vl8re8_v      111 000 1 01000 ..... 000 ..... 0000111 @r2
383vl8re16_v     111 000 1 01000 ..... 101 ..... 0000111 @r2
384vl8re32_v     111 000 1 01000 ..... 110 ..... 0000111 @r2
385vl8re64_v     111 000 1 01000 ..... 111 ..... 0000111 @r2
386vs1r_v        000 000 1 01000 ..... 000 ..... 0100111 @r2
387vs2r_v        001 000 1 01000 ..... 000 ..... 0100111 @r2
388vs4r_v        011 000 1 01000 ..... 000 ..... 0100111 @r2
389vs8r_v        111 000 1 01000 ..... 000 ..... 0100111 @r2
390
391# *** new major opcode OP-V ***
392vadd_vv         000000 . ..... ..... 000 ..... 1010111 @r_vm
393vadd_vx         000000 . ..... ..... 100 ..... 1010111 @r_vm
394vadd_vi         000000 . ..... ..... 011 ..... 1010111 @r_vm
395vsub_vv         000010 . ..... ..... 000 ..... 1010111 @r_vm
396vsub_vx         000010 . ..... ..... 100 ..... 1010111 @r_vm
397vrsub_vx        000011 . ..... ..... 100 ..... 1010111 @r_vm
398vrsub_vi        000011 . ..... ..... 011 ..... 1010111 @r_vm
399vwaddu_vv       110000 . ..... ..... 010 ..... 1010111 @r_vm
400vwaddu_vx       110000 . ..... ..... 110 ..... 1010111 @r_vm
401vwadd_vv        110001 . ..... ..... 010 ..... 1010111 @r_vm
402vwadd_vx        110001 . ..... ..... 110 ..... 1010111 @r_vm
403vwsubu_vv       110010 . ..... ..... 010 ..... 1010111 @r_vm
404vwsubu_vx       110010 . ..... ..... 110 ..... 1010111 @r_vm
405vwsub_vv        110011 . ..... ..... 010 ..... 1010111 @r_vm
406vwsub_vx        110011 . ..... ..... 110 ..... 1010111 @r_vm
407vwaddu_wv       110100 . ..... ..... 010 ..... 1010111 @r_vm
408vwaddu_wx       110100 . ..... ..... 110 ..... 1010111 @r_vm
409vwadd_wv        110101 . ..... ..... 010 ..... 1010111 @r_vm
410vwadd_wx        110101 . ..... ..... 110 ..... 1010111 @r_vm
411vwsubu_wv       110110 . ..... ..... 010 ..... 1010111 @r_vm
412vwsubu_wx       110110 . ..... ..... 110 ..... 1010111 @r_vm
413vwsub_wv        110111 . ..... ..... 010 ..... 1010111 @r_vm
414vwsub_wx        110111 . ..... ..... 110 ..... 1010111 @r_vm
415vadc_vvm        010000 0 ..... ..... 000 ..... 1010111 @r_vm_1
416vadc_vxm        010000 0 ..... ..... 100 ..... 1010111 @r_vm_1
417vadc_vim        010000 0 ..... ..... 011 ..... 1010111 @r_vm_1
418vmadc_vvm       010001 . ..... ..... 000 ..... 1010111 @r_vm
419vmadc_vxm       010001 . ..... ..... 100 ..... 1010111 @r_vm
420vmadc_vim       010001 . ..... ..... 011 ..... 1010111 @r_vm
421vsbc_vvm        010010 0 ..... ..... 000 ..... 1010111 @r_vm_1
422vsbc_vxm        010010 0 ..... ..... 100 ..... 1010111 @r_vm_1
423vmsbc_vvm       010011 . ..... ..... 000 ..... 1010111 @r_vm
424vmsbc_vxm       010011 . ..... ..... 100 ..... 1010111 @r_vm
425vand_vv         001001 . ..... ..... 000 ..... 1010111 @r_vm
426vand_vx         001001 . ..... ..... 100 ..... 1010111 @r_vm
427vand_vi         001001 . ..... ..... 011 ..... 1010111 @r_vm
428vor_vv          001010 . ..... ..... 000 ..... 1010111 @r_vm
429vor_vx          001010 . ..... ..... 100 ..... 1010111 @r_vm
430vor_vi          001010 . ..... ..... 011 ..... 1010111 @r_vm
431vxor_vv         001011 . ..... ..... 000 ..... 1010111 @r_vm
432vxor_vx         001011 . ..... ..... 100 ..... 1010111 @r_vm
433vxor_vi         001011 . ..... ..... 011 ..... 1010111 @r_vm
434vsll_vv         100101 . ..... ..... 000 ..... 1010111 @r_vm
435vsll_vx         100101 . ..... ..... 100 ..... 1010111 @r_vm
436vsll_vi         100101 . ..... ..... 011 ..... 1010111 @r_vm
437vsrl_vv         101000 . ..... ..... 000 ..... 1010111 @r_vm
438vsrl_vx         101000 . ..... ..... 100 ..... 1010111 @r_vm
439vsrl_vi         101000 . ..... ..... 011 ..... 1010111 @r_vm
440vsra_vv         101001 . ..... ..... 000 ..... 1010111 @r_vm
441vsra_vx         101001 . ..... ..... 100 ..... 1010111 @r_vm
442vsra_vi         101001 . ..... ..... 011 ..... 1010111 @r_vm
443vnsrl_wv        101100 . ..... ..... 000 ..... 1010111 @r_vm
444vnsrl_wx        101100 . ..... ..... 100 ..... 1010111 @r_vm
445vnsrl_wi        101100 . ..... ..... 011 ..... 1010111 @r_vm
446vnsra_wv        101101 . ..... ..... 000 ..... 1010111 @r_vm
447vnsra_wx        101101 . ..... ..... 100 ..... 1010111 @r_vm
448vnsra_wi        101101 . ..... ..... 011 ..... 1010111 @r_vm
449vmseq_vv        011000 . ..... ..... 000 ..... 1010111 @r_vm
450vmseq_vx        011000 . ..... ..... 100 ..... 1010111 @r_vm
451vmseq_vi        011000 . ..... ..... 011 ..... 1010111 @r_vm
452vmsne_vv        011001 . ..... ..... 000 ..... 1010111 @r_vm
453vmsne_vx        011001 . ..... ..... 100 ..... 1010111 @r_vm
454vmsne_vi        011001 . ..... ..... 011 ..... 1010111 @r_vm
455vmsltu_vv       011010 . ..... ..... 000 ..... 1010111 @r_vm
456vmsltu_vx       011010 . ..... ..... 100 ..... 1010111 @r_vm
457vmslt_vv        011011 . ..... ..... 000 ..... 1010111 @r_vm
458vmslt_vx        011011 . ..... ..... 100 ..... 1010111 @r_vm
459vmsleu_vv       011100 . ..... ..... 000 ..... 1010111 @r_vm
460vmsleu_vx       011100 . ..... ..... 100 ..... 1010111 @r_vm
461vmsleu_vi       011100 . ..... ..... 011 ..... 1010111 @r_vm
462vmsle_vv        011101 . ..... ..... 000 ..... 1010111 @r_vm
463vmsle_vx        011101 . ..... ..... 100 ..... 1010111 @r_vm
464vmsle_vi        011101 . ..... ..... 011 ..... 1010111 @r_vm
465vmsgtu_vx       011110 . ..... ..... 100 ..... 1010111 @r_vm
466vmsgtu_vi       011110 . ..... ..... 011 ..... 1010111 @r_vm
467vmsgt_vx        011111 . ..... ..... 100 ..... 1010111 @r_vm
468vmsgt_vi        011111 . ..... ..... 011 ..... 1010111 @r_vm
469vminu_vv        000100 . ..... ..... 000 ..... 1010111 @r_vm
470vminu_vx        000100 . ..... ..... 100 ..... 1010111 @r_vm
471vmin_vv         000101 . ..... ..... 000 ..... 1010111 @r_vm
472vmin_vx         000101 . ..... ..... 100 ..... 1010111 @r_vm
473vmaxu_vv        000110 . ..... ..... 000 ..... 1010111 @r_vm
474vmaxu_vx        000110 . ..... ..... 100 ..... 1010111 @r_vm
475vmax_vv         000111 . ..... ..... 000 ..... 1010111 @r_vm
476vmax_vx         000111 . ..... ..... 100 ..... 1010111 @r_vm
477vmul_vv         100101 . ..... ..... 010 ..... 1010111 @r_vm
478vmul_vx         100101 . ..... ..... 110 ..... 1010111 @r_vm
479vmulh_vv        100111 . ..... ..... 010 ..... 1010111 @r_vm
480vmulh_vx        100111 . ..... ..... 110 ..... 1010111 @r_vm
481vmulhu_vv       100100 . ..... ..... 010 ..... 1010111 @r_vm
482vmulhu_vx       100100 . ..... ..... 110 ..... 1010111 @r_vm
483vmulhsu_vv      100110 . ..... ..... 010 ..... 1010111 @r_vm
484vmulhsu_vx      100110 . ..... ..... 110 ..... 1010111 @r_vm
485vdivu_vv        100000 . ..... ..... 010 ..... 1010111 @r_vm
486vdivu_vx        100000 . ..... ..... 110 ..... 1010111 @r_vm
487vdiv_vv         100001 . ..... ..... 010 ..... 1010111 @r_vm
488vdiv_vx         100001 . ..... ..... 110 ..... 1010111 @r_vm
489vremu_vv        100010 . ..... ..... 010 ..... 1010111 @r_vm
490vremu_vx        100010 . ..... ..... 110 ..... 1010111 @r_vm
491vrem_vv         100011 . ..... ..... 010 ..... 1010111 @r_vm
492vrem_vx         100011 . ..... ..... 110 ..... 1010111 @r_vm
493vwmulu_vv       111000 . ..... ..... 010 ..... 1010111 @r_vm
494vwmulu_vx       111000 . ..... ..... 110 ..... 1010111 @r_vm
495vwmulsu_vv      111010 . ..... ..... 010 ..... 1010111 @r_vm
496vwmulsu_vx      111010 . ..... ..... 110 ..... 1010111 @r_vm
497vwmul_vv        111011 . ..... ..... 010 ..... 1010111 @r_vm
498vwmul_vx        111011 . ..... ..... 110 ..... 1010111 @r_vm
499vmacc_vv        101101 . ..... ..... 010 ..... 1010111 @r_vm
500vmacc_vx        101101 . ..... ..... 110 ..... 1010111 @r_vm
501vnmsac_vv       101111 . ..... ..... 010 ..... 1010111 @r_vm
502vnmsac_vx       101111 . ..... ..... 110 ..... 1010111 @r_vm
503vmadd_vv        101001 . ..... ..... 010 ..... 1010111 @r_vm
504vmadd_vx        101001 . ..... ..... 110 ..... 1010111 @r_vm
505vnmsub_vv       101011 . ..... ..... 010 ..... 1010111 @r_vm
506vnmsub_vx       101011 . ..... ..... 110 ..... 1010111 @r_vm
507vwmaccu_vv      111100 . ..... ..... 010 ..... 1010111 @r_vm
508vwmaccu_vx      111100 . ..... ..... 110 ..... 1010111 @r_vm
509vwmacc_vv       111101 . ..... ..... 010 ..... 1010111 @r_vm
510vwmacc_vx       111101 . ..... ..... 110 ..... 1010111 @r_vm
511vwmaccsu_vv     111111 . ..... ..... 010 ..... 1010111 @r_vm
512vwmaccsu_vx     111111 . ..... ..... 110 ..... 1010111 @r_vm
513vwmaccus_vx     111110 . ..... ..... 110 ..... 1010111 @r_vm
514vmv_v_v         010111 1 00000 ..... 000 ..... 1010111 @r2
515vmv_v_x         010111 1 00000 ..... 100 ..... 1010111 @r2
516vmv_v_i         010111 1 00000 ..... 011 ..... 1010111 @r2
517vmerge_vvm      010111 0 ..... ..... 000 ..... 1010111 @r_vm_0
518vmerge_vxm      010111 0 ..... ..... 100 ..... 1010111 @r_vm_0
519vmerge_vim      010111 0 ..... ..... 011 ..... 1010111 @r_vm_0
520vsaddu_vv       100000 . ..... ..... 000 ..... 1010111 @r_vm
521vsaddu_vx       100000 . ..... ..... 100 ..... 1010111 @r_vm
522vsaddu_vi       100000 . ..... ..... 011 ..... 1010111 @r_vm
523vsadd_vv        100001 . ..... ..... 000 ..... 1010111 @r_vm
524vsadd_vx        100001 . ..... ..... 100 ..... 1010111 @r_vm
525vsadd_vi        100001 . ..... ..... 011 ..... 1010111 @r_vm
526vssubu_vv       100010 . ..... ..... 000 ..... 1010111 @r_vm
527vssubu_vx       100010 . ..... ..... 100 ..... 1010111 @r_vm
528vssub_vv        100011 . ..... ..... 000 ..... 1010111 @r_vm
529vssub_vx        100011 . ..... ..... 100 ..... 1010111 @r_vm
530vaadd_vv        001001 . ..... ..... 010 ..... 1010111 @r_vm
531vaadd_vx        001001 . ..... ..... 110 ..... 1010111 @r_vm
532vaaddu_vv       001000 . ..... ..... 010 ..... 1010111 @r_vm
533vaaddu_vx       001000 . ..... ..... 110 ..... 1010111 @r_vm
534vasub_vv        001011 . ..... ..... 010 ..... 1010111 @r_vm
535vasub_vx        001011 . ..... ..... 110 ..... 1010111 @r_vm
536vasubu_vv       001010 . ..... ..... 010 ..... 1010111 @r_vm
537vasubu_vx       001010 . ..... ..... 110 ..... 1010111 @r_vm
538vsmul_vv        100111 . ..... ..... 000 ..... 1010111 @r_vm
539vsmul_vx        100111 . ..... ..... 100 ..... 1010111 @r_vm
540vssrl_vv        101010 . ..... ..... 000 ..... 1010111 @r_vm
541vssrl_vx        101010 . ..... ..... 100 ..... 1010111 @r_vm
542vssrl_vi        101010 . ..... ..... 011 ..... 1010111 @r_vm
543vssra_vv        101011 . ..... ..... 000 ..... 1010111 @r_vm
544vssra_vx        101011 . ..... ..... 100 ..... 1010111 @r_vm
545vssra_vi        101011 . ..... ..... 011 ..... 1010111 @r_vm
546vnclipu_wv      101110 . ..... ..... 000 ..... 1010111 @r_vm
547vnclipu_wx      101110 . ..... ..... 100 ..... 1010111 @r_vm
548vnclipu_wi      101110 . ..... ..... 011 ..... 1010111 @r_vm
549vnclip_wv       101111 . ..... ..... 000 ..... 1010111 @r_vm
550vnclip_wx       101111 . ..... ..... 100 ..... 1010111 @r_vm
551vnclip_wi       101111 . ..... ..... 011 ..... 1010111 @r_vm
552vfadd_vv        000000 . ..... ..... 001 ..... 1010111 @r_vm
553vfadd_vf        000000 . ..... ..... 101 ..... 1010111 @r_vm
554vfsub_vv        000010 . ..... ..... 001 ..... 1010111 @r_vm
555vfsub_vf        000010 . ..... ..... 101 ..... 1010111 @r_vm
556vfrsub_vf       100111 . ..... ..... 101 ..... 1010111 @r_vm
557vfwadd_vv       110000 . ..... ..... 001 ..... 1010111 @r_vm
558vfwadd_vf       110000 . ..... ..... 101 ..... 1010111 @r_vm
559vfwadd_wv       110100 . ..... ..... 001 ..... 1010111 @r_vm
560vfwadd_wf       110100 . ..... ..... 101 ..... 1010111 @r_vm
561vfwsub_vv       110010 . ..... ..... 001 ..... 1010111 @r_vm
562vfwsub_vf       110010 . ..... ..... 101 ..... 1010111 @r_vm
563vfwsub_wv       110110 . ..... ..... 001 ..... 1010111 @r_vm
564vfwsub_wf       110110 . ..... ..... 101 ..... 1010111 @r_vm
565vfmul_vv        100100 . ..... ..... 001 ..... 1010111 @r_vm
566vfmul_vf        100100 . ..... ..... 101 ..... 1010111 @r_vm
567vfdiv_vv        100000 . ..... ..... 001 ..... 1010111 @r_vm
568vfdiv_vf        100000 . ..... ..... 101 ..... 1010111 @r_vm
569vfrdiv_vf       100001 . ..... ..... 101 ..... 1010111 @r_vm
570vfwmul_vv       111000 . ..... ..... 001 ..... 1010111 @r_vm
571vfwmul_vf       111000 . ..... ..... 101 ..... 1010111 @r_vm
572vfmacc_vv       101100 . ..... ..... 001 ..... 1010111 @r_vm
573vfnmacc_vv      101101 . ..... ..... 001 ..... 1010111 @r_vm
574vfnmacc_vf      101101 . ..... ..... 101 ..... 1010111 @r_vm
575vfmacc_vf       101100 . ..... ..... 101 ..... 1010111 @r_vm
576vfmsac_vv       101110 . ..... ..... 001 ..... 1010111 @r_vm
577vfmsac_vf       101110 . ..... ..... 101 ..... 1010111 @r_vm
578vfnmsac_vv      101111 . ..... ..... 001 ..... 1010111 @r_vm
579vfnmsac_vf      101111 . ..... ..... 101 ..... 1010111 @r_vm
580vfmadd_vv       101000 . ..... ..... 001 ..... 1010111 @r_vm
581vfmadd_vf       101000 . ..... ..... 101 ..... 1010111 @r_vm
582vfnmadd_vv      101001 . ..... ..... 001 ..... 1010111 @r_vm
583vfnmadd_vf      101001 . ..... ..... 101 ..... 1010111 @r_vm
584vfmsub_vv       101010 . ..... ..... 001 ..... 1010111 @r_vm
585vfmsub_vf       101010 . ..... ..... 101 ..... 1010111 @r_vm
586vfnmsub_vv      101011 . ..... ..... 001 ..... 1010111 @r_vm
587vfnmsub_vf      101011 . ..... ..... 101 ..... 1010111 @r_vm
588vfwmacc_vv      111100 . ..... ..... 001 ..... 1010111 @r_vm
589vfwmacc_vf      111100 . ..... ..... 101 ..... 1010111 @r_vm
590vfwnmacc_vv     111101 . ..... ..... 001 ..... 1010111 @r_vm
591vfwnmacc_vf     111101 . ..... ..... 101 ..... 1010111 @r_vm
592vfwmsac_vv      111110 . ..... ..... 001 ..... 1010111 @r_vm
593vfwmsac_vf      111110 . ..... ..... 101 ..... 1010111 @r_vm
594vfwnmsac_vv     111111 . ..... ..... 001 ..... 1010111 @r_vm
595vfwnmsac_vf     111111 . ..... ..... 101 ..... 1010111 @r_vm
596vfsqrt_v        010011 . ..... 00000 001 ..... 1010111 @r2_vm
597vfrsqrt7_v      010011 . ..... 00100 001 ..... 1010111 @r2_vm
598vfrec7_v        010011 . ..... 00101 001 ..... 1010111 @r2_vm
599vfmin_vv        000100 . ..... ..... 001 ..... 1010111 @r_vm
600vfmin_vf        000100 . ..... ..... 101 ..... 1010111 @r_vm
601vfmax_vv        000110 . ..... ..... 001 ..... 1010111 @r_vm
602vfmax_vf        000110 . ..... ..... 101 ..... 1010111 @r_vm
603vfsgnj_vv       001000 . ..... ..... 001 ..... 1010111 @r_vm
604vfsgnj_vf       001000 . ..... ..... 101 ..... 1010111 @r_vm
605vfsgnjn_vv      001001 . ..... ..... 001 ..... 1010111 @r_vm
606vfsgnjn_vf      001001 . ..... ..... 101 ..... 1010111 @r_vm
607vfsgnjx_vv      001010 . ..... ..... 001 ..... 1010111 @r_vm
608vfsgnjx_vf      001010 . ..... ..... 101 ..... 1010111 @r_vm
609vfslide1up_vf   001110 . ..... ..... 101 ..... 1010111 @r_vm
610vfslide1down_vf 001111 . ..... ..... 101 ..... 1010111 @r_vm
611vmfeq_vv        011000 . ..... ..... 001 ..... 1010111 @r_vm
612vmfeq_vf        011000 . ..... ..... 101 ..... 1010111 @r_vm
613vmfne_vv        011100 . ..... ..... 001 ..... 1010111 @r_vm
614vmfne_vf        011100 . ..... ..... 101 ..... 1010111 @r_vm
615vmflt_vv        011011 . ..... ..... 001 ..... 1010111 @r_vm
616vmflt_vf        011011 . ..... ..... 101 ..... 1010111 @r_vm
617vmfle_vv        011001 . ..... ..... 001 ..... 1010111 @r_vm
618vmfle_vf        011001 . ..... ..... 101 ..... 1010111 @r_vm
619vmfgt_vf        011101 . ..... ..... 101 ..... 1010111 @r_vm
620vmfge_vf        011111 . ..... ..... 101 ..... 1010111 @r_vm
621vfclass_v       010011 . ..... 10000 001 ..... 1010111 @r2_vm
622vfmerge_vfm     010111 0 ..... ..... 101 ..... 1010111 @r_vm_0
623vfmv_v_f        010111 1 00000 ..... 101 ..... 1010111 @r2
624
625vfcvt_xu_f_v       010010 . ..... 00000 001 ..... 1010111 @r2_vm
626vfcvt_x_f_v        010010 . ..... 00001 001 ..... 1010111 @r2_vm
627vfcvt_f_xu_v       010010 . ..... 00010 001 ..... 1010111 @r2_vm
628vfcvt_f_x_v        010010 . ..... 00011 001 ..... 1010111 @r2_vm
629vfcvt_rtz_xu_f_v   010010 . ..... 00110 001 ..... 1010111 @r2_vm
630vfcvt_rtz_x_f_v    010010 . ..... 00111 001 ..... 1010111 @r2_vm
631
632vfwcvt_xu_f_v      010010 . ..... 01000 001 ..... 1010111 @r2_vm
633vfwcvt_x_f_v       010010 . ..... 01001 001 ..... 1010111 @r2_vm
634vfwcvt_f_xu_v      010010 . ..... 01010 001 ..... 1010111 @r2_vm
635vfwcvt_f_x_v       010010 . ..... 01011 001 ..... 1010111 @r2_vm
636vfwcvt_f_f_v       010010 . ..... 01100 001 ..... 1010111 @r2_vm
637vfwcvt_rtz_xu_f_v  010010 . ..... 01110 001 ..... 1010111 @r2_vm
638vfwcvt_rtz_x_f_v   010010 . ..... 01111 001 ..... 1010111 @r2_vm
639
640vfncvt_xu_f_w      010010 . ..... 10000 001 ..... 1010111 @r2_vm
641vfncvt_x_f_w       010010 . ..... 10001 001 ..... 1010111 @r2_vm
642vfncvt_f_xu_w      010010 . ..... 10010 001 ..... 1010111 @r2_vm
643vfncvt_f_x_w       010010 . ..... 10011 001 ..... 1010111 @r2_vm
644vfncvt_f_f_w       010010 . ..... 10100 001 ..... 1010111 @r2_vm
645vfncvt_rod_f_f_w   010010 . ..... 10101 001 ..... 1010111 @r2_vm
646vfncvt_rtz_xu_f_w  010010 . ..... 10110 001 ..... 1010111 @r2_vm
647vfncvt_rtz_x_f_w   010010 . ..... 10111 001 ..... 1010111 @r2_vm
648
649vredsum_vs      000000 . ..... ..... 010 ..... 1010111 @r_vm
650vredand_vs      000001 . ..... ..... 010 ..... 1010111 @r_vm
651vredor_vs       000010 . ..... ..... 010 ..... 1010111 @r_vm
652vredxor_vs      000011 . ..... ..... 010 ..... 1010111 @r_vm
653vredminu_vs     000100 . ..... ..... 010 ..... 1010111 @r_vm
654vredmin_vs      000101 . ..... ..... 010 ..... 1010111 @r_vm
655vredmaxu_vs     000110 . ..... ..... 010 ..... 1010111 @r_vm
656vredmax_vs      000111 . ..... ..... 010 ..... 1010111 @r_vm
657vwredsumu_vs    110000 . ..... ..... 000 ..... 1010111 @r_vm
658vwredsum_vs     110001 . ..... ..... 000 ..... 1010111 @r_vm
659# Vector ordered and unordered reduction sum
660vfredsum_vs     0000-1 . ..... ..... 001 ..... 1010111 @r_vm
661vfredmin_vs     000101 . ..... ..... 001 ..... 1010111 @r_vm
662vfredmax_vs     000111 . ..... ..... 001 ..... 1010111 @r_vm
663# Vector widening ordered and unordered float reduction sum
664vfwredsum_vs    1100-1 . ..... ..... 001 ..... 1010111 @r_vm
665vmand_mm        011001 - ..... ..... 010 ..... 1010111 @r
666vmnand_mm       011101 - ..... ..... 010 ..... 1010111 @r
667vmandn_mm       011000 - ..... ..... 010 ..... 1010111 @r
668vmxor_mm        011011 - ..... ..... 010 ..... 1010111 @r
669vmor_mm         011010 - ..... ..... 010 ..... 1010111 @r
670vmnor_mm        011110 - ..... ..... 010 ..... 1010111 @r
671vmorn_mm        011100 - ..... ..... 010 ..... 1010111 @r
672vmxnor_mm       011111 - ..... ..... 010 ..... 1010111 @r
673vcpop_m         010000 . ..... 10000 010 ..... 1010111 @r2_vm
674vfirst_m        010000 . ..... 10001 010 ..... 1010111 @r2_vm
675vmsbf_m         010100 . ..... 00001 010 ..... 1010111 @r2_vm
676vmsif_m         010100 . ..... 00011 010 ..... 1010111 @r2_vm
677vmsof_m         010100 . ..... 00010 010 ..... 1010111 @r2_vm
678viota_m         010100 . ..... 10000 010 ..... 1010111 @r2_vm
679vid_v           010100 . 00000 10001 010 ..... 1010111 @r1_vm
680vmv_x_s         010000 1 ..... 00000 010 ..... 1010111 @r2rd
681vmv_s_x         010000 1 00000 ..... 110 ..... 1010111 @r2
682vfmv_f_s        010000 1 ..... 00000 001 ..... 1010111 @r2rd
683vfmv_s_f        010000 1 00000 ..... 101 ..... 1010111 @r2
684vslideup_vx     001110 . ..... ..... 100 ..... 1010111 @r_vm
685vslideup_vi     001110 . ..... ..... 011 ..... 1010111 @r_vm
686vslide1up_vx    001110 . ..... ..... 110 ..... 1010111 @r_vm
687vslidedown_vx   001111 . ..... ..... 100 ..... 1010111 @r_vm
688vslidedown_vi   001111 . ..... ..... 011 ..... 1010111 @r_vm
689vslide1down_vx  001111 . ..... ..... 110 ..... 1010111 @r_vm
690vrgather_vv     001100 . ..... ..... 000 ..... 1010111 @r_vm
691vrgatherei16_vv 001110 . ..... ..... 000 ..... 1010111 @r_vm
692vrgather_vx     001100 . ..... ..... 100 ..... 1010111 @r_vm
693vrgather_vi     001100 . ..... ..... 011 ..... 1010111 @r_vm
694vcompress_vm    010111 - ..... ..... 010 ..... 1010111 @r
695vmv1r_v         100111 1 ..... 00000 011 ..... 1010111 @r2rd
696vmv2r_v         100111 1 ..... 00001 011 ..... 1010111 @r2rd
697vmv4r_v         100111 1 ..... 00011 011 ..... 1010111 @r2rd
698vmv8r_v         100111 1 ..... 00111 011 ..... 1010111 @r2rd
699
700# Vector Integer Extension
701vzext_vf2       010010 . ..... 00110 010 ..... 1010111 @r2_vm
702vzext_vf4       010010 . ..... 00100 010 ..... 1010111 @r2_vm
703vzext_vf8       010010 . ..... 00010 010 ..... 1010111 @r2_vm
704vsext_vf2       010010 . ..... 00111 010 ..... 1010111 @r2_vm
705vsext_vf4       010010 . ..... 00101 010 ..... 1010111 @r2_vm
706vsext_vf8       010010 . ..... 00011 010 ..... 1010111 @r2_vm
707
708vsetvli         0 ........... ..... 111 ..... 1010111  @r2_zimm11
709vsetivli        11 .......... ..... 111 ..... 1010111  @r2_zimm10
710vsetvl          1000000 ..... ..... 111 ..... 1010111  @r
711
712# *** RV32 Zba Standard Extension ***
713sh1add     0010000 .......... 010 ..... 0110011 @r
714sh2add     0010000 .......... 100 ..... 0110011 @r
715sh3add     0010000 .......... 110 ..... 0110011 @r
716
717# *** RV64 Zba Standard Extension (in addition to RV32 Zba) ***
718add_uw     0000100 .......... 000 ..... 0111011 @r
719sh1add_uw  0010000 .......... 010 ..... 0111011 @r
720sh2add_uw  0010000 .......... 100 ..... 0111011 @r
721sh3add_uw  0010000 .......... 110 ..... 0111011 @r
722slli_uw    00001 ............ 001 ..... 0011011 @sh
723
724# *** RV32 Zbb/Zbkb Standard Extension ***
725andn       0100000 .......... 111 ..... 0110011 @r
726rol        0110000 .......... 001 ..... 0110011 @r
727ror        0110000 .......... 101 ..... 0110011 @r
728rori       01100 ............ 101 ..... 0010011 @sh
729# The encoding for rev8 differs between RV32 and RV64.
730# rev8_32 denotes the RV32 variant.
731rev8_32    011010 011000 ..... 101 ..... 0010011 @r2
732# The encoding for zext.h differs between RV32 and RV64.
733# zext_h_32 denotes the RV32 variant.
734{
735  zext_h_32  0000100 00000 ..... 100 ..... 0110011 @r2
736  pack       0000100 ..... ..... 100 ..... 0110011 @r
737}
738xnor       0100000 .......... 100 ..... 0110011 @r
739# *** RV32 extra Zbb Standard Extension ***
740clz        011000 000000 ..... 001 ..... 0010011 @r2
741cpop       011000 000010 ..... 001 ..... 0010011 @r2
742ctz        011000 000001 ..... 001 ..... 0010011 @r2
743max        0000101 .......... 110 ..... 0110011 @r
744maxu       0000101 .......... 111 ..... 0110011 @r
745min        0000101 .......... 100 ..... 0110011 @r
746minu       0000101 .......... 101 ..... 0110011 @r
747orc_b      001010 000111 ..... 101 ..... 0010011 @r2
748orn        0100000 .......... 110 ..... 0110011 @r
749sext_b     011000 000100 ..... 001 ..... 0010011 @r2
750sext_h     011000 000101 ..... 001 ..... 0010011 @r2
751# *** RV32 extra Zbkb Standard Extension ***
752brev8      0110100 00111 ..... 101 ..... 0010011 @r2  #grevi
753packh      0000100  .......... 111 ..... 0110011 @r
754unzip      0000100 01111 ..... 101 ..... 0010011 @r2  #unshfl
755zip        0000100 01111 ..... 001 ..... 0010011 @r2  #shfl
756
757# *** RV64 Zbb/Zbkb Standard Extension (in addition to RV32 Zbb/Zbkb) ***
758# The encoding for rev8 differs between RV32 and RV64.
759# When executing on RV64, the encoding used in RV32 is an illegal
760# instruction, so we use different handler functions to differentiate.
761rev8_64    011010 111000 ..... 101 ..... 0010011 @r2
762rolw       0110000 .......... 001 ..... 0111011 @r
763roriw      0110000 .......... 101 ..... 0011011 @sh5
764rorw       0110000 .......... 101 ..... 0111011 @r
765# The encoding for zext.h differs between RV32 and RV64.
766# When executing on RV64, the encoding used in RV32 is an illegal
767# instruction, so we use different handler functions to differentiate.
768{
769  zext_h_64  0000100 00000 ..... 100 ..... 0111011 @r2
770  packw      0000100 ..... ..... 100 ..... 0111011 @r
771}
772# *** RV64 extra Zbb Standard Extension (in addition to RV32 Zbb) ***
773clzw       0110000 00000 ..... 001 ..... 0011011 @r2
774ctzw       0110000 00001 ..... 001 ..... 0011011 @r2
775cpopw      0110000 00010 ..... 001 ..... 0011011 @r2
776
777# *** RV32 Zbc/Zbkc Standard Extension ***
778clmul      0000101 .......... 001 ..... 0110011 @r
779clmulh     0000101 .......... 011 ..... 0110011 @r
780# *** RV32 extra Zbc Standard Extension ***
781clmulr     0000101 .......... 010 ..... 0110011 @r
782
783# *** RV32 Zbkx Standard Extension ***
784xperm4     0010100 .......... 010 ..... 0110011 @r
785xperm8     0010100 .......... 100 ..... 0110011 @r
786
787# *** RV32 Zbs Standard Extension ***
788bclr       0100100 .......... 001 ..... 0110011 @r
789bclri      01001. ........... 001 ..... 0010011 @sh
790bext       0100100 .......... 101 ..... 0110011 @r
791bexti      01001. ........... 101 ..... 0010011 @sh
792binv       0110100 .......... 001 ..... 0110011 @r
793binvi      01101. ........... 001 ..... 0010011 @sh
794bset       0010100 .......... 001 ..... 0110011 @r
795bseti      00101. ........... 001 ..... 0010011 @sh
796
797# *** RV32 Zfh Extension ***
798flh        ............   ..... 001 ..... 0000111 @i
799fsh        .......  ..... ..... 001 ..... 0100111 @s
800fmadd_h    ..... 10 ..... ..... ... ..... 1000011 @r4_rm
801fmsub_h    ..... 10 ..... ..... ... ..... 1000111 @r4_rm
802fnmsub_h   ..... 10 ..... ..... ... ..... 1001011 @r4_rm
803fnmadd_h   ..... 10 ..... ..... ... ..... 1001111 @r4_rm
804fadd_h     0000010  ..... ..... ... ..... 1010011 @r_rm
805fsub_h     0000110  ..... ..... ... ..... 1010011 @r_rm
806fmul_h     0001010  ..... ..... ... ..... 1010011 @r_rm
807fdiv_h     0001110  ..... ..... ... ..... 1010011 @r_rm
808fsqrt_h    0101110  00000 ..... ... ..... 1010011 @r2_rm
809fsgnj_h    0010010  ..... ..... 000 ..... 1010011 @r
810fsgnjn_h   0010010  ..... ..... 001 ..... 1010011 @r
811fsgnjx_h   0010010  ..... ..... 010 ..... 1010011 @r
812fmin_h     0010110  ..... ..... 000 ..... 1010011 @r
813fmax_h     0010110  ..... ..... 001 ..... 1010011 @r
814fcvt_h_s   0100010  00000 ..... ... ..... 1010011 @r2_rm
815fcvt_s_h   0100000  00010 ..... ... ..... 1010011 @r2_rm
816fcvt_h_d   0100010  00001 ..... ... ..... 1010011 @r2_rm
817fcvt_d_h   0100001  00010 ..... ... ..... 1010011 @r2_rm
818fcvt_w_h   1100010  00000 ..... ... ..... 1010011 @r2_rm
819fcvt_wu_h  1100010  00001 ..... ... ..... 1010011 @r2_rm
820fmv_x_h    1110010  00000 ..... 000 ..... 1010011 @r2
821feq_h      1010010  ..... ..... 010 ..... 1010011 @r
822flt_h      1010010  ..... ..... 001 ..... 1010011 @r
823fle_h      1010010  ..... ..... 000 ..... 1010011 @r
824fclass_h   1110010  00000 ..... 001 ..... 1010011 @r2
825fcvt_h_w   1101010  00000 ..... ... ..... 1010011 @r2_rm
826fcvt_h_wu  1101010  00001 ..... ... ..... 1010011 @r2_rm
827fmv_h_x    1111010  00000 ..... 000 ..... 1010011 @r2
828
829# *** RV64 Zfh Extension (in addition to RV32 Zfh) ***
830fcvt_l_h   1100010  00010 ..... ... ..... 1010011 @r2_rm
831fcvt_lu_h  1100010  00011 ..... ... ..... 1010011 @r2_rm
832fcvt_h_l   1101010  00010 ..... ... ..... 1010011 @r2_rm
833fcvt_h_lu  1101010  00011 ..... ... ..... 1010011 @r2_rm
834
835# *** Svinval Standard Extension ***
836sinval_vma        0001011 ..... ..... 000 00000 1110011 @sfence_vma
837sfence_w_inval    0001100 00000 00000 000 00000 1110011
838sfence_inval_ir   0001100 00001 00000 000 00000 1110011
839hinval_vvma       0010011 ..... ..... 000 00000 1110011 @hfence_vvma
840hinval_gvma       0110011 ..... ..... 000 00000 1110011 @hfence_gvma
841
842# *** RV32 Zknd Standard Extension ***
843aes32dsmi   .. 10111 ..... ..... 000 ..... 0110011 @k_aes
844aes32dsi    .. 10101 ..... ..... 000 ..... 0110011 @k_aes
845# *** RV32 Zkne Standard Extension ***
846aes32esmi   .. 10011 ..... ..... 000 ..... 0110011 @k_aes
847aes32esi    .. 10001 ..... ..... 000 ..... 0110011 @k_aes
848