1# 2# RISC-V translation routines for the RVXI Base Integer Instruction Set. 3# 4# Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de 5# Bastian Koppelmann, kbastian@mail.uni-paderborn.de 6# 7# This program is free software; you can redistribute it and/or modify it 8# under the terms and conditions of the GNU General Public License, 9# version 2 or later, as published by the Free Software Foundation. 10# 11# This program is distributed in the hope it will be useful, but WITHOUT 12# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14# more details. 15# 16# You should have received a copy of the GNU General Public License along with 17# this program. If not, see <http://www.gnu.org/licenses/>. 18 19# Fields: 20%rs3 27:5 21%rs2 20:5 22%rs1 15:5 23%rd 7:5 24%sh5 20:5 25 26%sh7 20:7 27%csr 20:12 28%rm 12:3 29%nf 29:3 !function=ex_plus_1 30 31# immediates: 32%imm_i 20:s12 33%imm_s 25:s7 7:5 34%imm_b 31:s1 7:1 25:6 8:4 !function=ex_shift_1 35%imm_j 31:s1 12:8 20:1 21:10 !function=ex_shift_1 36%imm_u 12:s20 !function=ex_shift_12 37 38# Argument sets: 39&empty 40&b imm rs2 rs1 41&i imm rs1 rd 42&j imm rd 43&r rd rs1 rs2 44&r2 rd rs1 45&r2_s rs1 rs2 46&s imm rs1 rs2 47&u imm rd 48&shift shamt rs1 rd 49&atomic aq rl rs2 rs1 rd 50&rmrr vm rd rs1 rs2 51&rmr vm rd rs2 52&r2nfvm vm rd rs1 nf 53&rnfvm vm rd rs1 rs2 nf 54 55# Formats 32: 56@r ....... ..... ..... ... ..... ....... &r %rs2 %rs1 %rd 57@i ............ ..... ... ..... ....... &i imm=%imm_i %rs1 %rd 58@b ....... ..... ..... ... ..... ....... &b imm=%imm_b %rs2 %rs1 59@s ....... ..... ..... ... ..... ....... &s imm=%imm_s %rs2 %rs1 60@u .................... ..... ....... &u imm=%imm_u %rd 61@j .................... ..... ....... &j imm=%imm_j %rd 62 63@sh ...... ...... ..... ... ..... ....... &shift shamt=%sh7 %rs1 %rd 64@csr ............ ..... ... ..... ....... %csr %rs1 %rd 65 66@atom_ld ..... aq:1 rl:1 ..... ........ ..... ....... &atomic rs2=0 %rs1 %rd 67@atom_st ..... aq:1 rl:1 ..... ........ ..... ....... &atomic %rs2 %rs1 %rd 68 69@r4_rm ..... .. ..... ..... ... ..... ....... %rs3 %rs2 %rs1 %rm %rd 70@r_rm ....... ..... ..... ... ..... ....... %rs2 %rs1 %rm %rd 71@r2_rm ....... ..... ..... ... ..... ....... %rs1 %rm %rd 72@r2 ....... ..... ..... ... ..... ....... &r2 %rs1 %rd 73@r2_nfvm ... ... vm:1 ..... ..... ... ..... ....... &r2nfvm %nf %rs1 %rd 74@r2_vm ...... vm:1 ..... ..... ... ..... ....... &rmr %rs2 %rd 75@r1_vm ...... vm:1 ..... ..... ... ..... ....... %rd 76@r_nfvm ... ... vm:1 ..... ..... ... ..... ....... &rnfvm %nf %rs2 %rs1 %rd 77@r2rd ....... ..... ..... ... ..... ....... %rs2 %rd 78@r_vm ...... vm:1 ..... ..... ... ..... ....... &rmrr %rs2 %rs1 %rd 79@r_vm_1 ...... . ..... ..... ... ..... ....... &rmrr vm=1 %rs2 %rs1 %rd 80@r_vm_0 ...... . ..... ..... ... ..... ....... &rmrr vm=0 %rs2 %rs1 %rd 81@r2_zimm11 . zimm:11 ..... ... ..... ....... %rs1 %rd 82@r2_zimm10 .. zimm:10 ..... ... ..... ....... %rs1 %rd 83@r2_s ....... ..... ..... ... ..... ....... %rs2 %rs1 84 85@hfence_gvma ....... ..... ..... ... ..... ....... %rs2 %rs1 86@hfence_vvma ....... ..... ..... ... ..... ....... %rs2 %rs1 87 88@sfence_vma ....... ..... ..... ... ..... ....... %rs2 %rs1 89@sfence_vm ....... ..... ..... ... ..... ....... %rs1 90 91# Formats 64: 92@sh5 ....... ..... ..... ... ..... ....... &shift shamt=%sh5 %rs1 %rd 93 94# *** Privileged Instructions *** 95ecall 000000000000 00000 000 00000 1110011 96ebreak 000000000001 00000 000 00000 1110011 97uret 0000000 00010 00000 000 00000 1110011 98sret 0001000 00010 00000 000 00000 1110011 99mret 0011000 00010 00000 000 00000 1110011 100wfi 0001000 00101 00000 000 00000 1110011 101sfence_vma 0001001 ..... ..... 000 00000 1110011 @sfence_vma 102sfence_vm 0001000 00100 ..... 000 00000 1110011 @sfence_vm 103 104# *** RV32I Base Instruction Set *** 105lui .................... ..... 0110111 @u 106auipc .................... ..... 0010111 @u 107jal .................... ..... 1101111 @j 108jalr ............ ..... 000 ..... 1100111 @i 109beq ....... ..... ..... 000 ..... 1100011 @b 110bne ....... ..... ..... 001 ..... 1100011 @b 111blt ....... ..... ..... 100 ..... 1100011 @b 112bge ....... ..... ..... 101 ..... 1100011 @b 113bltu ....... ..... ..... 110 ..... 1100011 @b 114bgeu ....... ..... ..... 111 ..... 1100011 @b 115lb ............ ..... 000 ..... 0000011 @i 116lh ............ ..... 001 ..... 0000011 @i 117lw ............ ..... 010 ..... 0000011 @i 118lbu ............ ..... 100 ..... 0000011 @i 119lhu ............ ..... 101 ..... 0000011 @i 120sb ....... ..... ..... 000 ..... 0100011 @s 121sh ....... ..... ..... 001 ..... 0100011 @s 122sw ....... ..... ..... 010 ..... 0100011 @s 123addi ............ ..... 000 ..... 0010011 @i 124slti ............ ..... 010 ..... 0010011 @i 125sltiu ............ ..... 011 ..... 0010011 @i 126xori ............ ..... 100 ..... 0010011 @i 127ori ............ ..... 110 ..... 0010011 @i 128andi ............ ..... 111 ..... 0010011 @i 129slli 00000. ...... ..... 001 ..... 0010011 @sh 130srli 00000. ...... ..... 101 ..... 0010011 @sh 131srai 01000. ...... ..... 101 ..... 0010011 @sh 132add 0000000 ..... ..... 000 ..... 0110011 @r 133sub 0100000 ..... ..... 000 ..... 0110011 @r 134sll 0000000 ..... ..... 001 ..... 0110011 @r 135slt 0000000 ..... ..... 010 ..... 0110011 @r 136sltu 0000000 ..... ..... 011 ..... 0110011 @r 137xor 0000000 ..... ..... 100 ..... 0110011 @r 138srl 0000000 ..... ..... 101 ..... 0110011 @r 139sra 0100000 ..... ..... 101 ..... 0110011 @r 140or 0000000 ..... ..... 110 ..... 0110011 @r 141and 0000000 ..... ..... 111 ..... 0110011 @r 142fence ---- pred:4 succ:4 ----- 000 ----- 0001111 143fence_i ---- ---- ---- ----- 001 ----- 0001111 144csrrw ............ ..... 001 ..... 1110011 @csr 145csrrs ............ ..... 010 ..... 1110011 @csr 146csrrc ............ ..... 011 ..... 1110011 @csr 147csrrwi ............ ..... 101 ..... 1110011 @csr 148csrrsi ............ ..... 110 ..... 1110011 @csr 149csrrci ............ ..... 111 ..... 1110011 @csr 150 151# *** RV64I Base Instruction Set (in addition to RV32I) *** 152lwu ............ ..... 110 ..... 0000011 @i 153ld ............ ..... 011 ..... 0000011 @i 154sd ....... ..... ..... 011 ..... 0100011 @s 155addiw ............ ..... 000 ..... 0011011 @i 156slliw 0000000 ..... ..... 001 ..... 0011011 @sh5 157srliw 0000000 ..... ..... 101 ..... 0011011 @sh5 158sraiw 0100000 ..... ..... 101 ..... 0011011 @sh5 159addw 0000000 ..... ..... 000 ..... 0111011 @r 160subw 0100000 ..... ..... 000 ..... 0111011 @r 161sllw 0000000 ..... ..... 001 ..... 0111011 @r 162srlw 0000000 ..... ..... 101 ..... 0111011 @r 163sraw 0100000 ..... ..... 101 ..... 0111011 @r 164 165# *** RV32M Standard Extension *** 166mul 0000001 ..... ..... 000 ..... 0110011 @r 167mulh 0000001 ..... ..... 001 ..... 0110011 @r 168mulhsu 0000001 ..... ..... 010 ..... 0110011 @r 169mulhu 0000001 ..... ..... 011 ..... 0110011 @r 170div 0000001 ..... ..... 100 ..... 0110011 @r 171divu 0000001 ..... ..... 101 ..... 0110011 @r 172rem 0000001 ..... ..... 110 ..... 0110011 @r 173remu 0000001 ..... ..... 111 ..... 0110011 @r 174 175# *** RV64M Standard Extension (in addition to RV32M) *** 176mulw 0000001 ..... ..... 000 ..... 0111011 @r 177divw 0000001 ..... ..... 100 ..... 0111011 @r 178divuw 0000001 ..... ..... 101 ..... 0111011 @r 179remw 0000001 ..... ..... 110 ..... 0111011 @r 180remuw 0000001 ..... ..... 111 ..... 0111011 @r 181 182# *** RV32A Standard Extension *** 183lr_w 00010 . . 00000 ..... 010 ..... 0101111 @atom_ld 184sc_w 00011 . . ..... ..... 010 ..... 0101111 @atom_st 185amoswap_w 00001 . . ..... ..... 010 ..... 0101111 @atom_st 186amoadd_w 00000 . . ..... ..... 010 ..... 0101111 @atom_st 187amoxor_w 00100 . . ..... ..... 010 ..... 0101111 @atom_st 188amoand_w 01100 . . ..... ..... 010 ..... 0101111 @atom_st 189amoor_w 01000 . . ..... ..... 010 ..... 0101111 @atom_st 190amomin_w 10000 . . ..... ..... 010 ..... 0101111 @atom_st 191amomax_w 10100 . . ..... ..... 010 ..... 0101111 @atom_st 192amominu_w 11000 . . ..... ..... 010 ..... 0101111 @atom_st 193amomaxu_w 11100 . . ..... ..... 010 ..... 0101111 @atom_st 194 195# *** RV64A Standard Extension (in addition to RV32A) *** 196lr_d 00010 . . 00000 ..... 011 ..... 0101111 @atom_ld 197sc_d 00011 . . ..... ..... 011 ..... 0101111 @atom_st 198amoswap_d 00001 . . ..... ..... 011 ..... 0101111 @atom_st 199amoadd_d 00000 . . ..... ..... 011 ..... 0101111 @atom_st 200amoxor_d 00100 . . ..... ..... 011 ..... 0101111 @atom_st 201amoand_d 01100 . . ..... ..... 011 ..... 0101111 @atom_st 202amoor_d 01000 . . ..... ..... 011 ..... 0101111 @atom_st 203amomin_d 10000 . . ..... ..... 011 ..... 0101111 @atom_st 204amomax_d 10100 . . ..... ..... 011 ..... 0101111 @atom_st 205amominu_d 11000 . . ..... ..... 011 ..... 0101111 @atom_st 206amomaxu_d 11100 . . ..... ..... 011 ..... 0101111 @atom_st 207 208# *** RV32F Standard Extension *** 209flw ............ ..... 010 ..... 0000111 @i 210fsw ....... ..... ..... 010 ..... 0100111 @s 211fmadd_s ..... 00 ..... ..... ... ..... 1000011 @r4_rm 212fmsub_s ..... 00 ..... ..... ... ..... 1000111 @r4_rm 213fnmsub_s ..... 00 ..... ..... ... ..... 1001011 @r4_rm 214fnmadd_s ..... 00 ..... ..... ... ..... 1001111 @r4_rm 215fadd_s 0000000 ..... ..... ... ..... 1010011 @r_rm 216fsub_s 0000100 ..... ..... ... ..... 1010011 @r_rm 217fmul_s 0001000 ..... ..... ... ..... 1010011 @r_rm 218fdiv_s 0001100 ..... ..... ... ..... 1010011 @r_rm 219fsqrt_s 0101100 00000 ..... ... ..... 1010011 @r2_rm 220fsgnj_s 0010000 ..... ..... 000 ..... 1010011 @r 221fsgnjn_s 0010000 ..... ..... 001 ..... 1010011 @r 222fsgnjx_s 0010000 ..... ..... 010 ..... 1010011 @r 223fmin_s 0010100 ..... ..... 000 ..... 1010011 @r 224fmax_s 0010100 ..... ..... 001 ..... 1010011 @r 225fcvt_w_s 1100000 00000 ..... ... ..... 1010011 @r2_rm 226fcvt_wu_s 1100000 00001 ..... ... ..... 1010011 @r2_rm 227fmv_x_w 1110000 00000 ..... 000 ..... 1010011 @r2 228feq_s 1010000 ..... ..... 010 ..... 1010011 @r 229flt_s 1010000 ..... ..... 001 ..... 1010011 @r 230fle_s 1010000 ..... ..... 000 ..... 1010011 @r 231fclass_s 1110000 00000 ..... 001 ..... 1010011 @r2 232fcvt_s_w 1101000 00000 ..... ... ..... 1010011 @r2_rm 233fcvt_s_wu 1101000 00001 ..... ... ..... 1010011 @r2_rm 234fmv_w_x 1111000 00000 ..... 000 ..... 1010011 @r2 235 236# *** RV64F Standard Extension (in addition to RV32F) *** 237fcvt_l_s 1100000 00010 ..... ... ..... 1010011 @r2_rm 238fcvt_lu_s 1100000 00011 ..... ... ..... 1010011 @r2_rm 239fcvt_s_l 1101000 00010 ..... ... ..... 1010011 @r2_rm 240fcvt_s_lu 1101000 00011 ..... ... ..... 1010011 @r2_rm 241 242# *** RV32D Standard Extension *** 243fld ............ ..... 011 ..... 0000111 @i 244fsd ....... ..... ..... 011 ..... 0100111 @s 245fmadd_d ..... 01 ..... ..... ... ..... 1000011 @r4_rm 246fmsub_d ..... 01 ..... ..... ... ..... 1000111 @r4_rm 247fnmsub_d ..... 01 ..... ..... ... ..... 1001011 @r4_rm 248fnmadd_d ..... 01 ..... ..... ... ..... 1001111 @r4_rm 249fadd_d 0000001 ..... ..... ... ..... 1010011 @r_rm 250fsub_d 0000101 ..... ..... ... ..... 1010011 @r_rm 251fmul_d 0001001 ..... ..... ... ..... 1010011 @r_rm 252fdiv_d 0001101 ..... ..... ... ..... 1010011 @r_rm 253fsqrt_d 0101101 00000 ..... ... ..... 1010011 @r2_rm 254fsgnj_d 0010001 ..... ..... 000 ..... 1010011 @r 255fsgnjn_d 0010001 ..... ..... 001 ..... 1010011 @r 256fsgnjx_d 0010001 ..... ..... 010 ..... 1010011 @r 257fmin_d 0010101 ..... ..... 000 ..... 1010011 @r 258fmax_d 0010101 ..... ..... 001 ..... 1010011 @r 259fcvt_s_d 0100000 00001 ..... ... ..... 1010011 @r2_rm 260fcvt_d_s 0100001 00000 ..... ... ..... 1010011 @r2_rm 261feq_d 1010001 ..... ..... 010 ..... 1010011 @r 262flt_d 1010001 ..... ..... 001 ..... 1010011 @r 263fle_d 1010001 ..... ..... 000 ..... 1010011 @r 264fclass_d 1110001 00000 ..... 001 ..... 1010011 @r2 265fcvt_w_d 1100001 00000 ..... ... ..... 1010011 @r2_rm 266fcvt_wu_d 1100001 00001 ..... ... ..... 1010011 @r2_rm 267fcvt_d_w 1101001 00000 ..... ... ..... 1010011 @r2_rm 268fcvt_d_wu 1101001 00001 ..... ... ..... 1010011 @r2_rm 269 270# *** RV64D Standard Extension (in addition to RV32D) *** 271fcvt_l_d 1100001 00010 ..... ... ..... 1010011 @r2_rm 272fcvt_lu_d 1100001 00011 ..... ... ..... 1010011 @r2_rm 273fmv_x_d 1110001 00000 ..... 000 ..... 1010011 @r2 274fcvt_d_l 1101001 00010 ..... ... ..... 1010011 @r2_rm 275fcvt_d_lu 1101001 00011 ..... ... ..... 1010011 @r2_rm 276fmv_d_x 1111001 00000 ..... 000 ..... 1010011 @r2 277 278# *** RV32H Base Instruction Set *** 279hlv_b 0110000 00000 ..... 100 ..... 1110011 @r2 280hlv_bu 0110000 00001 ..... 100 ..... 1110011 @r2 281hlv_h 0110010 00000 ..... 100 ..... 1110011 @r2 282hlv_hu 0110010 00001 ..... 100 ..... 1110011 @r2 283hlvx_hu 0110010 00011 ..... 100 ..... 1110011 @r2 284hlv_w 0110100 00000 ..... 100 ..... 1110011 @r2 285hlvx_wu 0110100 00011 ..... 100 ..... 1110011 @r2 286hsv_b 0110001 ..... ..... 100 00000 1110011 @r2_s 287hsv_h 0110011 ..... ..... 100 00000 1110011 @r2_s 288hsv_w 0110101 ..... ..... 100 00000 1110011 @r2_s 289hfence_gvma 0110001 ..... ..... 000 00000 1110011 @hfence_gvma 290hfence_vvma 0010001 ..... ..... 000 00000 1110011 @hfence_vvma 291 292# *** RV64H Base Instruction Set *** 293hlv_wu 0110100 00001 ..... 100 ..... 1110011 @r2 294hlv_d 0110110 00000 ..... 100 ..... 1110011 @r2 295hsv_d 0110111 ..... ..... 100 00000 1110011 @r2_s 296 297# *** Vector loads and stores are encoded within LOADFP/STORE-FP *** 298# Vector unit-stride load/store insns. 299vle8_v ... 000 . 00000 ..... 000 ..... 0000111 @r2_nfvm 300vle16_v ... 000 . 00000 ..... 101 ..... 0000111 @r2_nfvm 301vle32_v ... 000 . 00000 ..... 110 ..... 0000111 @r2_nfvm 302vle64_v ... 000 . 00000 ..... 111 ..... 0000111 @r2_nfvm 303vse8_v ... 000 . 00000 ..... 000 ..... 0100111 @r2_nfvm 304vse16_v ... 000 . 00000 ..... 101 ..... 0100111 @r2_nfvm 305vse32_v ... 000 . 00000 ..... 110 ..... 0100111 @r2_nfvm 306vse64_v ... 000 . 00000 ..... 111 ..... 0100111 @r2_nfvm 307 308# Vector unit-stride mask load/store insns. 309vlm_v 000 000 1 01011 ..... 000 ..... 0000111 @r2 310vsm_v 000 000 1 01011 ..... 000 ..... 0100111 @r2 311 312# Vector strided insns. 313vlse8_v ... 010 . ..... ..... 000 ..... 0000111 @r_nfvm 314vlse16_v ... 010 . ..... ..... 101 ..... 0000111 @r_nfvm 315vlse32_v ... 010 . ..... ..... 110 ..... 0000111 @r_nfvm 316vlse64_v ... 010 . ..... ..... 111 ..... 0000111 @r_nfvm 317vsse8_v ... 010 . ..... ..... 000 ..... 0100111 @r_nfvm 318vsse16_v ... 010 . ..... ..... 101 ..... 0100111 @r_nfvm 319vsse32_v ... 010 . ..... ..... 110 ..... 0100111 @r_nfvm 320vsse64_v ... 010 . ..... ..... 111 ..... 0100111 @r_nfvm 321 322# Vector ordered-indexed and unordered-indexed load insns. 323vlxei8_v ... 0-1 . ..... ..... 000 ..... 0000111 @r_nfvm 324vlxei16_v ... 0-1 . ..... ..... 101 ..... 0000111 @r_nfvm 325vlxei32_v ... 0-1 . ..... ..... 110 ..... 0000111 @r_nfvm 326vlxei64_v ... 0-1 . ..... ..... 111 ..... 0000111 @r_nfvm 327 328# Vector ordered-indexed and unordered-indexed store insns. 329vsxei8_v ... 0-1 . ..... ..... 000 ..... 0100111 @r_nfvm 330vsxei16_v ... 0-1 . ..... ..... 101 ..... 0100111 @r_nfvm 331vsxei32_v ... 0-1 . ..... ..... 110 ..... 0100111 @r_nfvm 332vsxei64_v ... 0-1 . ..... ..... 111 ..... 0100111 @r_nfvm 333 334# Vector unit-stride fault-only-first load insns. 335vle8ff_v ... 000 . 10000 ..... 000 ..... 0000111 @r2_nfvm 336vle16ff_v ... 000 . 10000 ..... 101 ..... 0000111 @r2_nfvm 337vle32ff_v ... 000 . 10000 ..... 110 ..... 0000111 @r2_nfvm 338vle64ff_v ... 000 . 10000 ..... 111 ..... 0000111 @r2_nfvm 339 340# Vector whole register insns 341vl1re8_v 000 000 1 01000 ..... 000 ..... 0000111 @r2 342vl1re16_v 000 000 1 01000 ..... 101 ..... 0000111 @r2 343vl1re32_v 000 000 1 01000 ..... 110 ..... 0000111 @r2 344vl1re64_v 000 000 1 01000 ..... 111 ..... 0000111 @r2 345vl2re8_v 001 000 1 01000 ..... 000 ..... 0000111 @r2 346vl2re16_v 001 000 1 01000 ..... 101 ..... 0000111 @r2 347vl2re32_v 001 000 1 01000 ..... 110 ..... 0000111 @r2 348vl2re64_v 001 000 1 01000 ..... 111 ..... 0000111 @r2 349vl4re8_v 011 000 1 01000 ..... 000 ..... 0000111 @r2 350vl4re16_v 011 000 1 01000 ..... 101 ..... 0000111 @r2 351vl4re32_v 011 000 1 01000 ..... 110 ..... 0000111 @r2 352vl4re64_v 011 000 1 01000 ..... 111 ..... 0000111 @r2 353vl8re8_v 111 000 1 01000 ..... 000 ..... 0000111 @r2 354vl8re16_v 111 000 1 01000 ..... 101 ..... 0000111 @r2 355vl8re32_v 111 000 1 01000 ..... 110 ..... 0000111 @r2 356vl8re64_v 111 000 1 01000 ..... 111 ..... 0000111 @r2 357vs1r_v 000 000 1 01000 ..... 000 ..... 0100111 @r2 358vs2r_v 001 000 1 01000 ..... 000 ..... 0100111 @r2 359vs4r_v 011 000 1 01000 ..... 000 ..... 0100111 @r2 360vs8r_v 111 000 1 01000 ..... 000 ..... 0100111 @r2 361 362# *** new major opcode OP-V *** 363vadd_vv 000000 . ..... ..... 000 ..... 1010111 @r_vm 364vadd_vx 000000 . ..... ..... 100 ..... 1010111 @r_vm 365vadd_vi 000000 . ..... ..... 011 ..... 1010111 @r_vm 366vsub_vv 000010 . ..... ..... 000 ..... 1010111 @r_vm 367vsub_vx 000010 . ..... ..... 100 ..... 1010111 @r_vm 368vrsub_vx 000011 . ..... ..... 100 ..... 1010111 @r_vm 369vrsub_vi 000011 . ..... ..... 011 ..... 1010111 @r_vm 370vwaddu_vv 110000 . ..... ..... 010 ..... 1010111 @r_vm 371vwaddu_vx 110000 . ..... ..... 110 ..... 1010111 @r_vm 372vwadd_vv 110001 . ..... ..... 010 ..... 1010111 @r_vm 373vwadd_vx 110001 . ..... ..... 110 ..... 1010111 @r_vm 374vwsubu_vv 110010 . ..... ..... 010 ..... 1010111 @r_vm 375vwsubu_vx 110010 . ..... ..... 110 ..... 1010111 @r_vm 376vwsub_vv 110011 . ..... ..... 010 ..... 1010111 @r_vm 377vwsub_vx 110011 . ..... ..... 110 ..... 1010111 @r_vm 378vwaddu_wv 110100 . ..... ..... 010 ..... 1010111 @r_vm 379vwaddu_wx 110100 . ..... ..... 110 ..... 1010111 @r_vm 380vwadd_wv 110101 . ..... ..... 010 ..... 1010111 @r_vm 381vwadd_wx 110101 . ..... ..... 110 ..... 1010111 @r_vm 382vwsubu_wv 110110 . ..... ..... 010 ..... 1010111 @r_vm 383vwsubu_wx 110110 . ..... ..... 110 ..... 1010111 @r_vm 384vwsub_wv 110111 . ..... ..... 010 ..... 1010111 @r_vm 385vwsub_wx 110111 . ..... ..... 110 ..... 1010111 @r_vm 386vadc_vvm 010000 0 ..... ..... 000 ..... 1010111 @r_vm_1 387vadc_vxm 010000 0 ..... ..... 100 ..... 1010111 @r_vm_1 388vadc_vim 010000 0 ..... ..... 011 ..... 1010111 @r_vm_1 389vmadc_vvm 010001 . ..... ..... 000 ..... 1010111 @r_vm 390vmadc_vxm 010001 . ..... ..... 100 ..... 1010111 @r_vm 391vmadc_vim 010001 . ..... ..... 011 ..... 1010111 @r_vm 392vsbc_vvm 010010 0 ..... ..... 000 ..... 1010111 @r_vm_1 393vsbc_vxm 010010 0 ..... ..... 100 ..... 1010111 @r_vm_1 394vmsbc_vvm 010011 . ..... ..... 000 ..... 1010111 @r_vm 395vmsbc_vxm 010011 . ..... ..... 100 ..... 1010111 @r_vm 396vand_vv 001001 . ..... ..... 000 ..... 1010111 @r_vm 397vand_vx 001001 . ..... ..... 100 ..... 1010111 @r_vm 398vand_vi 001001 . ..... ..... 011 ..... 1010111 @r_vm 399vor_vv 001010 . ..... ..... 000 ..... 1010111 @r_vm 400vor_vx 001010 . ..... ..... 100 ..... 1010111 @r_vm 401vor_vi 001010 . ..... ..... 011 ..... 1010111 @r_vm 402vxor_vv 001011 . ..... ..... 000 ..... 1010111 @r_vm 403vxor_vx 001011 . ..... ..... 100 ..... 1010111 @r_vm 404vxor_vi 001011 . ..... ..... 011 ..... 1010111 @r_vm 405vsll_vv 100101 . ..... ..... 000 ..... 1010111 @r_vm 406vsll_vx 100101 . ..... ..... 100 ..... 1010111 @r_vm 407vsll_vi 100101 . ..... ..... 011 ..... 1010111 @r_vm 408vsrl_vv 101000 . ..... ..... 000 ..... 1010111 @r_vm 409vsrl_vx 101000 . ..... ..... 100 ..... 1010111 @r_vm 410vsrl_vi 101000 . ..... ..... 011 ..... 1010111 @r_vm 411vsra_vv 101001 . ..... ..... 000 ..... 1010111 @r_vm 412vsra_vx 101001 . ..... ..... 100 ..... 1010111 @r_vm 413vsra_vi 101001 . ..... ..... 011 ..... 1010111 @r_vm 414vnsrl_wv 101100 . ..... ..... 000 ..... 1010111 @r_vm 415vnsrl_wx 101100 . ..... ..... 100 ..... 1010111 @r_vm 416vnsrl_wi 101100 . ..... ..... 011 ..... 1010111 @r_vm 417vnsra_wv 101101 . ..... ..... 000 ..... 1010111 @r_vm 418vnsra_wx 101101 . ..... ..... 100 ..... 1010111 @r_vm 419vnsra_wi 101101 . ..... ..... 011 ..... 1010111 @r_vm 420vmseq_vv 011000 . ..... ..... 000 ..... 1010111 @r_vm 421vmseq_vx 011000 . ..... ..... 100 ..... 1010111 @r_vm 422vmseq_vi 011000 . ..... ..... 011 ..... 1010111 @r_vm 423vmsne_vv 011001 . ..... ..... 000 ..... 1010111 @r_vm 424vmsne_vx 011001 . ..... ..... 100 ..... 1010111 @r_vm 425vmsne_vi 011001 . ..... ..... 011 ..... 1010111 @r_vm 426vmsltu_vv 011010 . ..... ..... 000 ..... 1010111 @r_vm 427vmsltu_vx 011010 . ..... ..... 100 ..... 1010111 @r_vm 428vmslt_vv 011011 . ..... ..... 000 ..... 1010111 @r_vm 429vmslt_vx 011011 . ..... ..... 100 ..... 1010111 @r_vm 430vmsleu_vv 011100 . ..... ..... 000 ..... 1010111 @r_vm 431vmsleu_vx 011100 . ..... ..... 100 ..... 1010111 @r_vm 432vmsleu_vi 011100 . ..... ..... 011 ..... 1010111 @r_vm 433vmsle_vv 011101 . ..... ..... 000 ..... 1010111 @r_vm 434vmsle_vx 011101 . ..... ..... 100 ..... 1010111 @r_vm 435vmsle_vi 011101 . ..... ..... 011 ..... 1010111 @r_vm 436vmsgtu_vx 011110 . ..... ..... 100 ..... 1010111 @r_vm 437vmsgtu_vi 011110 . ..... ..... 011 ..... 1010111 @r_vm 438vmsgt_vx 011111 . ..... ..... 100 ..... 1010111 @r_vm 439vmsgt_vi 011111 . ..... ..... 011 ..... 1010111 @r_vm 440vminu_vv 000100 . ..... ..... 000 ..... 1010111 @r_vm 441vminu_vx 000100 . ..... ..... 100 ..... 1010111 @r_vm 442vmin_vv 000101 . ..... ..... 000 ..... 1010111 @r_vm 443vmin_vx 000101 . ..... ..... 100 ..... 1010111 @r_vm 444vmaxu_vv 000110 . ..... ..... 000 ..... 1010111 @r_vm 445vmaxu_vx 000110 . ..... ..... 100 ..... 1010111 @r_vm 446vmax_vv 000111 . ..... ..... 000 ..... 1010111 @r_vm 447vmax_vx 000111 . ..... ..... 100 ..... 1010111 @r_vm 448vmul_vv 100101 . ..... ..... 010 ..... 1010111 @r_vm 449vmul_vx 100101 . ..... ..... 110 ..... 1010111 @r_vm 450vmulh_vv 100111 . ..... ..... 010 ..... 1010111 @r_vm 451vmulh_vx 100111 . ..... ..... 110 ..... 1010111 @r_vm 452vmulhu_vv 100100 . ..... ..... 010 ..... 1010111 @r_vm 453vmulhu_vx 100100 . ..... ..... 110 ..... 1010111 @r_vm 454vmulhsu_vv 100110 . ..... ..... 010 ..... 1010111 @r_vm 455vmulhsu_vx 100110 . ..... ..... 110 ..... 1010111 @r_vm 456vdivu_vv 100000 . ..... ..... 010 ..... 1010111 @r_vm 457vdivu_vx 100000 . ..... ..... 110 ..... 1010111 @r_vm 458vdiv_vv 100001 . ..... ..... 010 ..... 1010111 @r_vm 459vdiv_vx 100001 . ..... ..... 110 ..... 1010111 @r_vm 460vremu_vv 100010 . ..... ..... 010 ..... 1010111 @r_vm 461vremu_vx 100010 . ..... ..... 110 ..... 1010111 @r_vm 462vrem_vv 100011 . ..... ..... 010 ..... 1010111 @r_vm 463vrem_vx 100011 . ..... ..... 110 ..... 1010111 @r_vm 464vwmulu_vv 111000 . ..... ..... 010 ..... 1010111 @r_vm 465vwmulu_vx 111000 . ..... ..... 110 ..... 1010111 @r_vm 466vwmulsu_vv 111010 . ..... ..... 010 ..... 1010111 @r_vm 467vwmulsu_vx 111010 . ..... ..... 110 ..... 1010111 @r_vm 468vwmul_vv 111011 . ..... ..... 010 ..... 1010111 @r_vm 469vwmul_vx 111011 . ..... ..... 110 ..... 1010111 @r_vm 470vmacc_vv 101101 . ..... ..... 010 ..... 1010111 @r_vm 471vmacc_vx 101101 . ..... ..... 110 ..... 1010111 @r_vm 472vnmsac_vv 101111 . ..... ..... 010 ..... 1010111 @r_vm 473vnmsac_vx 101111 . ..... ..... 110 ..... 1010111 @r_vm 474vmadd_vv 101001 . ..... ..... 010 ..... 1010111 @r_vm 475vmadd_vx 101001 . ..... ..... 110 ..... 1010111 @r_vm 476vnmsub_vv 101011 . ..... ..... 010 ..... 1010111 @r_vm 477vnmsub_vx 101011 . ..... ..... 110 ..... 1010111 @r_vm 478vwmaccu_vv 111100 . ..... ..... 010 ..... 1010111 @r_vm 479vwmaccu_vx 111100 . ..... ..... 110 ..... 1010111 @r_vm 480vwmacc_vv 111101 . ..... ..... 010 ..... 1010111 @r_vm 481vwmacc_vx 111101 . ..... ..... 110 ..... 1010111 @r_vm 482vwmaccsu_vv 111111 . ..... ..... 010 ..... 1010111 @r_vm 483vwmaccsu_vx 111111 . ..... ..... 110 ..... 1010111 @r_vm 484vwmaccus_vx 111110 . ..... ..... 110 ..... 1010111 @r_vm 485vmv_v_v 010111 1 00000 ..... 000 ..... 1010111 @r2 486vmv_v_x 010111 1 00000 ..... 100 ..... 1010111 @r2 487vmv_v_i 010111 1 00000 ..... 011 ..... 1010111 @r2 488vmerge_vvm 010111 0 ..... ..... 000 ..... 1010111 @r_vm_0 489vmerge_vxm 010111 0 ..... ..... 100 ..... 1010111 @r_vm_0 490vmerge_vim 010111 0 ..... ..... 011 ..... 1010111 @r_vm_0 491vsaddu_vv 100000 . ..... ..... 000 ..... 1010111 @r_vm 492vsaddu_vx 100000 . ..... ..... 100 ..... 1010111 @r_vm 493vsaddu_vi 100000 . ..... ..... 011 ..... 1010111 @r_vm 494vsadd_vv 100001 . ..... ..... 000 ..... 1010111 @r_vm 495vsadd_vx 100001 . ..... ..... 100 ..... 1010111 @r_vm 496vsadd_vi 100001 . ..... ..... 011 ..... 1010111 @r_vm 497vssubu_vv 100010 . ..... ..... 000 ..... 1010111 @r_vm 498vssubu_vx 100010 . ..... ..... 100 ..... 1010111 @r_vm 499vssub_vv 100011 . ..... ..... 000 ..... 1010111 @r_vm 500vssub_vx 100011 . ..... ..... 100 ..... 1010111 @r_vm 501vaadd_vv 001001 . ..... ..... 010 ..... 1010111 @r_vm 502vaadd_vx 001001 . ..... ..... 110 ..... 1010111 @r_vm 503vaaddu_vv 001000 . ..... ..... 010 ..... 1010111 @r_vm 504vaaddu_vx 001000 . ..... ..... 110 ..... 1010111 @r_vm 505vasub_vv 001011 . ..... ..... 010 ..... 1010111 @r_vm 506vasub_vx 001011 . ..... ..... 110 ..... 1010111 @r_vm 507vasubu_vv 001010 . ..... ..... 010 ..... 1010111 @r_vm 508vasubu_vx 001010 . ..... ..... 110 ..... 1010111 @r_vm 509vsmul_vv 100111 . ..... ..... 000 ..... 1010111 @r_vm 510vsmul_vx 100111 . ..... ..... 100 ..... 1010111 @r_vm 511vssrl_vv 101010 . ..... ..... 000 ..... 1010111 @r_vm 512vssrl_vx 101010 . ..... ..... 100 ..... 1010111 @r_vm 513vssrl_vi 101010 . ..... ..... 011 ..... 1010111 @r_vm 514vssra_vv 101011 . ..... ..... 000 ..... 1010111 @r_vm 515vssra_vx 101011 . ..... ..... 100 ..... 1010111 @r_vm 516vssra_vi 101011 . ..... ..... 011 ..... 1010111 @r_vm 517vnclipu_wv 101110 . ..... ..... 000 ..... 1010111 @r_vm 518vnclipu_wx 101110 . ..... ..... 100 ..... 1010111 @r_vm 519vnclipu_wi 101110 . ..... ..... 011 ..... 1010111 @r_vm 520vnclip_wv 101111 . ..... ..... 000 ..... 1010111 @r_vm 521vnclip_wx 101111 . ..... ..... 100 ..... 1010111 @r_vm 522vnclip_wi 101111 . ..... ..... 011 ..... 1010111 @r_vm 523vfadd_vv 000000 . ..... ..... 001 ..... 1010111 @r_vm 524vfadd_vf 000000 . ..... ..... 101 ..... 1010111 @r_vm 525vfsub_vv 000010 . ..... ..... 001 ..... 1010111 @r_vm 526vfsub_vf 000010 . ..... ..... 101 ..... 1010111 @r_vm 527vfrsub_vf 100111 . ..... ..... 101 ..... 1010111 @r_vm 528vfwadd_vv 110000 . ..... ..... 001 ..... 1010111 @r_vm 529vfwadd_vf 110000 . ..... ..... 101 ..... 1010111 @r_vm 530vfwadd_wv 110100 . ..... ..... 001 ..... 1010111 @r_vm 531vfwadd_wf 110100 . ..... ..... 101 ..... 1010111 @r_vm 532vfwsub_vv 110010 . ..... ..... 001 ..... 1010111 @r_vm 533vfwsub_vf 110010 . ..... ..... 101 ..... 1010111 @r_vm 534vfwsub_wv 110110 . ..... ..... 001 ..... 1010111 @r_vm 535vfwsub_wf 110110 . ..... ..... 101 ..... 1010111 @r_vm 536vfmul_vv 100100 . ..... ..... 001 ..... 1010111 @r_vm 537vfmul_vf 100100 . ..... ..... 101 ..... 1010111 @r_vm 538vfdiv_vv 100000 . ..... ..... 001 ..... 1010111 @r_vm 539vfdiv_vf 100000 . ..... ..... 101 ..... 1010111 @r_vm 540vfrdiv_vf 100001 . ..... ..... 101 ..... 1010111 @r_vm 541vfwmul_vv 111000 . ..... ..... 001 ..... 1010111 @r_vm 542vfwmul_vf 111000 . ..... ..... 101 ..... 1010111 @r_vm 543vfmacc_vv 101100 . ..... ..... 001 ..... 1010111 @r_vm 544vfnmacc_vv 101101 . ..... ..... 001 ..... 1010111 @r_vm 545vfnmacc_vf 101101 . ..... ..... 101 ..... 1010111 @r_vm 546vfmacc_vf 101100 . ..... ..... 101 ..... 1010111 @r_vm 547vfmsac_vv 101110 . ..... ..... 001 ..... 1010111 @r_vm 548vfmsac_vf 101110 . ..... ..... 101 ..... 1010111 @r_vm 549vfnmsac_vv 101111 . ..... ..... 001 ..... 1010111 @r_vm 550vfnmsac_vf 101111 . ..... ..... 101 ..... 1010111 @r_vm 551vfmadd_vv 101000 . ..... ..... 001 ..... 1010111 @r_vm 552vfmadd_vf 101000 . ..... ..... 101 ..... 1010111 @r_vm 553vfnmadd_vv 101001 . ..... ..... 001 ..... 1010111 @r_vm 554vfnmadd_vf 101001 . ..... ..... 101 ..... 1010111 @r_vm 555vfmsub_vv 101010 . ..... ..... 001 ..... 1010111 @r_vm 556vfmsub_vf 101010 . ..... ..... 101 ..... 1010111 @r_vm 557vfnmsub_vv 101011 . ..... ..... 001 ..... 1010111 @r_vm 558vfnmsub_vf 101011 . ..... ..... 101 ..... 1010111 @r_vm 559vfwmacc_vv 111100 . ..... ..... 001 ..... 1010111 @r_vm 560vfwmacc_vf 111100 . ..... ..... 101 ..... 1010111 @r_vm 561vfwnmacc_vv 111101 . ..... ..... 001 ..... 1010111 @r_vm 562vfwnmacc_vf 111101 . ..... ..... 101 ..... 1010111 @r_vm 563vfwmsac_vv 111110 . ..... ..... 001 ..... 1010111 @r_vm 564vfwmsac_vf 111110 . ..... ..... 101 ..... 1010111 @r_vm 565vfwnmsac_vv 111111 . ..... ..... 001 ..... 1010111 @r_vm 566vfwnmsac_vf 111111 . ..... ..... 101 ..... 1010111 @r_vm 567vfsqrt_v 010011 . ..... 00000 001 ..... 1010111 @r2_vm 568vfrsqrt7_v 010011 . ..... 00100 001 ..... 1010111 @r2_vm 569vfrec7_v 010011 . ..... 00101 001 ..... 1010111 @r2_vm 570vfmin_vv 000100 . ..... ..... 001 ..... 1010111 @r_vm 571vfmin_vf 000100 . ..... ..... 101 ..... 1010111 @r_vm 572vfmax_vv 000110 . ..... ..... 001 ..... 1010111 @r_vm 573vfmax_vf 000110 . ..... ..... 101 ..... 1010111 @r_vm 574vfsgnj_vv 001000 . ..... ..... 001 ..... 1010111 @r_vm 575vfsgnj_vf 001000 . ..... ..... 101 ..... 1010111 @r_vm 576vfsgnjn_vv 001001 . ..... ..... 001 ..... 1010111 @r_vm 577vfsgnjn_vf 001001 . ..... ..... 101 ..... 1010111 @r_vm 578vfsgnjx_vv 001010 . ..... ..... 001 ..... 1010111 @r_vm 579vfsgnjx_vf 001010 . ..... ..... 101 ..... 1010111 @r_vm 580vfslide1up_vf 001110 . ..... ..... 101 ..... 1010111 @r_vm 581vfslide1down_vf 001111 . ..... ..... 101 ..... 1010111 @r_vm 582vmfeq_vv 011000 . ..... ..... 001 ..... 1010111 @r_vm 583vmfeq_vf 011000 . ..... ..... 101 ..... 1010111 @r_vm 584vmfne_vv 011100 . ..... ..... 001 ..... 1010111 @r_vm 585vmfne_vf 011100 . ..... ..... 101 ..... 1010111 @r_vm 586vmflt_vv 011011 . ..... ..... 001 ..... 1010111 @r_vm 587vmflt_vf 011011 . ..... ..... 101 ..... 1010111 @r_vm 588vmfle_vv 011001 . ..... ..... 001 ..... 1010111 @r_vm 589vmfle_vf 011001 . ..... ..... 101 ..... 1010111 @r_vm 590vmfgt_vf 011101 . ..... ..... 101 ..... 1010111 @r_vm 591vmfge_vf 011111 . ..... ..... 101 ..... 1010111 @r_vm 592vfclass_v 010011 . ..... 10000 001 ..... 1010111 @r2_vm 593vfmerge_vfm 010111 0 ..... ..... 101 ..... 1010111 @r_vm_0 594vfmv_v_f 010111 1 00000 ..... 101 ..... 1010111 @r2 595 596vfcvt_xu_f_v 010010 . ..... 00000 001 ..... 1010111 @r2_vm 597vfcvt_x_f_v 010010 . ..... 00001 001 ..... 1010111 @r2_vm 598vfcvt_f_xu_v 010010 . ..... 00010 001 ..... 1010111 @r2_vm 599vfcvt_f_x_v 010010 . ..... 00011 001 ..... 1010111 @r2_vm 600vfcvt_rtz_xu_f_v 010010 . ..... 00110 001 ..... 1010111 @r2_vm 601vfcvt_rtz_x_f_v 010010 . ..... 00111 001 ..... 1010111 @r2_vm 602 603vfwcvt_xu_f_v 010010 . ..... 01000 001 ..... 1010111 @r2_vm 604vfwcvt_x_f_v 010010 . ..... 01001 001 ..... 1010111 @r2_vm 605vfwcvt_f_xu_v 010010 . ..... 01010 001 ..... 1010111 @r2_vm 606vfwcvt_f_x_v 010010 . ..... 01011 001 ..... 1010111 @r2_vm 607vfwcvt_f_f_v 010010 . ..... 01100 001 ..... 1010111 @r2_vm 608vfwcvt_rtz_xu_f_v 010010 . ..... 01110 001 ..... 1010111 @r2_vm 609vfwcvt_rtz_x_f_v 010010 . ..... 01111 001 ..... 1010111 @r2_vm 610 611vfncvt_xu_f_w 010010 . ..... 10000 001 ..... 1010111 @r2_vm 612vfncvt_x_f_w 010010 . ..... 10001 001 ..... 1010111 @r2_vm 613vfncvt_f_xu_w 010010 . ..... 10010 001 ..... 1010111 @r2_vm 614vfncvt_f_x_w 010010 . ..... 10011 001 ..... 1010111 @r2_vm 615vfncvt_f_f_w 010010 . ..... 10100 001 ..... 1010111 @r2_vm 616vfncvt_rod_f_f_w 010010 . ..... 10101 001 ..... 1010111 @r2_vm 617vfncvt_rtz_xu_f_w 010010 . ..... 10110 001 ..... 1010111 @r2_vm 618vfncvt_rtz_x_f_w 010010 . ..... 10111 001 ..... 1010111 @r2_vm 619 620vredsum_vs 000000 . ..... ..... 010 ..... 1010111 @r_vm 621vredand_vs 000001 . ..... ..... 010 ..... 1010111 @r_vm 622vredor_vs 000010 . ..... ..... 010 ..... 1010111 @r_vm 623vredxor_vs 000011 . ..... ..... 010 ..... 1010111 @r_vm 624vredminu_vs 000100 . ..... ..... 010 ..... 1010111 @r_vm 625vredmin_vs 000101 . ..... ..... 010 ..... 1010111 @r_vm 626vredmaxu_vs 000110 . ..... ..... 010 ..... 1010111 @r_vm 627vredmax_vs 000111 . ..... ..... 010 ..... 1010111 @r_vm 628vwredsumu_vs 110000 . ..... ..... 000 ..... 1010111 @r_vm 629vwredsum_vs 110001 . ..... ..... 000 ..... 1010111 @r_vm 630# Vector ordered and unordered reduction sum 631vfredsum_vs 0000-1 . ..... ..... 001 ..... 1010111 @r_vm 632vfredmin_vs 000101 . ..... ..... 001 ..... 1010111 @r_vm 633vfredmax_vs 000111 . ..... ..... 001 ..... 1010111 @r_vm 634# Vector widening ordered and unordered float reduction sum 635vfwredsum_vs 1100-1 . ..... ..... 001 ..... 1010111 @r_vm 636vmand_mm 011001 - ..... ..... 010 ..... 1010111 @r 637vmnand_mm 011101 - ..... ..... 010 ..... 1010111 @r 638vmandn_mm 011000 - ..... ..... 010 ..... 1010111 @r 639vmxor_mm 011011 - ..... ..... 010 ..... 1010111 @r 640vmor_mm 011010 - ..... ..... 010 ..... 1010111 @r 641vmnor_mm 011110 - ..... ..... 010 ..... 1010111 @r 642vmorn_mm 011100 - ..... ..... 010 ..... 1010111 @r 643vmxnor_mm 011111 - ..... ..... 010 ..... 1010111 @r 644vcpop_m 010000 . ..... 10000 010 ..... 1010111 @r2_vm 645vfirst_m 010000 . ..... 10001 010 ..... 1010111 @r2_vm 646vmsbf_m 010100 . ..... 00001 010 ..... 1010111 @r2_vm 647vmsif_m 010100 . ..... 00011 010 ..... 1010111 @r2_vm 648vmsof_m 010100 . ..... 00010 010 ..... 1010111 @r2_vm 649viota_m 010100 . ..... 10000 010 ..... 1010111 @r2_vm 650vid_v 010100 . 00000 10001 010 ..... 1010111 @r1_vm 651vmv_x_s 010000 1 ..... 00000 010 ..... 1010111 @r2rd 652vmv_s_x 010000 1 00000 ..... 110 ..... 1010111 @r2 653vfmv_f_s 010000 1 ..... 00000 001 ..... 1010111 @r2rd 654vfmv_s_f 010000 1 00000 ..... 101 ..... 1010111 @r2 655vslideup_vx 001110 . ..... ..... 100 ..... 1010111 @r_vm 656vslideup_vi 001110 . ..... ..... 011 ..... 1010111 @r_vm 657vslide1up_vx 001110 . ..... ..... 110 ..... 1010111 @r_vm 658vslidedown_vx 001111 . ..... ..... 100 ..... 1010111 @r_vm 659vslidedown_vi 001111 . ..... ..... 011 ..... 1010111 @r_vm 660vslide1down_vx 001111 . ..... ..... 110 ..... 1010111 @r_vm 661vrgather_vv 001100 . ..... ..... 000 ..... 1010111 @r_vm 662vrgatherei16_vv 001110 . ..... ..... 000 ..... 1010111 @r_vm 663vrgather_vx 001100 . ..... ..... 100 ..... 1010111 @r_vm 664vrgather_vi 001100 . ..... ..... 011 ..... 1010111 @r_vm 665vcompress_vm 010111 - ..... ..... 010 ..... 1010111 @r 666vmv1r_v 100111 1 ..... 00000 011 ..... 1010111 @r2rd 667vmv2r_v 100111 1 ..... 00001 011 ..... 1010111 @r2rd 668vmv4r_v 100111 1 ..... 00011 011 ..... 1010111 @r2rd 669vmv8r_v 100111 1 ..... 00111 011 ..... 1010111 @r2rd 670 671# Vector Integer Extension 672vzext_vf2 010010 . ..... 00110 010 ..... 1010111 @r2_vm 673vzext_vf4 010010 . ..... 00100 010 ..... 1010111 @r2_vm 674vzext_vf8 010010 . ..... 00010 010 ..... 1010111 @r2_vm 675vsext_vf2 010010 . ..... 00111 010 ..... 1010111 @r2_vm 676vsext_vf4 010010 . ..... 00101 010 ..... 1010111 @r2_vm 677vsext_vf8 010010 . ..... 00011 010 ..... 1010111 @r2_vm 678 679vsetvli 0 ........... ..... 111 ..... 1010111 @r2_zimm11 680vsetivli 11 .......... ..... 111 ..... 1010111 @r2_zimm10 681vsetvl 1000000 ..... ..... 111 ..... 1010111 @r 682 683# *** RV32 Zba Standard Extension *** 684sh1add 0010000 .......... 010 ..... 0110011 @r 685sh2add 0010000 .......... 100 ..... 0110011 @r 686sh3add 0010000 .......... 110 ..... 0110011 @r 687 688# *** RV64 Zba Standard Extension (in addition to RV32 Zba) *** 689add_uw 0000100 .......... 000 ..... 0111011 @r 690sh1add_uw 0010000 .......... 010 ..... 0111011 @r 691sh2add_uw 0010000 .......... 100 ..... 0111011 @r 692sh3add_uw 0010000 .......... 110 ..... 0111011 @r 693slli_uw 00001 ............ 001 ..... 0011011 @sh 694 695# *** RV32 Zbb Standard Extension *** 696andn 0100000 .......... 111 ..... 0110011 @r 697clz 011000 000000 ..... 001 ..... 0010011 @r2 698cpop 011000 000010 ..... 001 ..... 0010011 @r2 699ctz 011000 000001 ..... 001 ..... 0010011 @r2 700max 0000101 .......... 110 ..... 0110011 @r 701maxu 0000101 .......... 111 ..... 0110011 @r 702min 0000101 .......... 100 ..... 0110011 @r 703minu 0000101 .......... 101 ..... 0110011 @r 704orc_b 001010 000111 ..... 101 ..... 0010011 @r2 705orn 0100000 .......... 110 ..... 0110011 @r 706# The encoding for rev8 differs between RV32 and RV64. 707# rev8_32 denotes the RV32 variant. 708rev8_32 011010 011000 ..... 101 ..... 0010011 @r2 709rol 0110000 .......... 001 ..... 0110011 @r 710ror 0110000 .......... 101 ..... 0110011 @r 711rori 01100 ............ 101 ..... 0010011 @sh 712sext_b 011000 000100 ..... 001 ..... 0010011 @r2 713sext_h 011000 000101 ..... 001 ..... 0010011 @r2 714xnor 0100000 .......... 100 ..... 0110011 @r 715# The encoding for zext.h differs between RV32 and RV64. 716# zext_h_32 denotes the RV32 variant. 717zext_h_32 0000100 00000 ..... 100 ..... 0110011 @r2 718 719# *** RV64 Zbb Standard Extension (in addition to RV32 Zbb) *** 720clzw 0110000 00000 ..... 001 ..... 0011011 @r2 721ctzw 0110000 00001 ..... 001 ..... 0011011 @r2 722cpopw 0110000 00010 ..... 001 ..... 0011011 @r2 723# The encoding for rev8 differs between RV32 and RV64. 724# When executing on RV64, the encoding used in RV32 is an illegal 725# instruction, so we use different handler functions to differentiate. 726rev8_64 011010 111000 ..... 101 ..... 0010011 @r2 727rolw 0110000 .......... 001 ..... 0111011 @r 728roriw 0110000 .......... 101 ..... 0011011 @sh5 729rorw 0110000 .......... 101 ..... 0111011 @r 730# The encoding for zext.h differs between RV32 and RV64. 731# When executing on RV64, the encoding used in RV32 is an illegal 732# instruction, so we use different handler functions to differentiate. 733zext_h_64 0000100 00000 ..... 100 ..... 0111011 @r2 734 735# *** RV32 Zbc Standard Extension *** 736clmul 0000101 .......... 001 ..... 0110011 @r 737clmulh 0000101 .......... 011 ..... 0110011 @r 738clmulr 0000101 .......... 010 ..... 0110011 @r 739 740# *** RV32 Zbs Standard Extension *** 741bclr 0100100 .......... 001 ..... 0110011 @r 742bclri 01001. ........... 001 ..... 0010011 @sh 743bext 0100100 .......... 101 ..... 0110011 @r 744bexti 01001. ........... 101 ..... 0010011 @sh 745binv 0110100 .......... 001 ..... 0110011 @r 746binvi 01101. ........... 001 ..... 0010011 @sh 747bset 0010100 .......... 001 ..... 0110011 @r 748bseti 00101. ........... 001 ..... 0010011 @sh 749 750# *** RV32 Zfh Extension *** 751flh ............ ..... 001 ..... 0000111 @i 752fsh ....... ..... ..... 001 ..... 0100111 @s 753fmadd_h ..... 10 ..... ..... ... ..... 1000011 @r4_rm 754fmsub_h ..... 10 ..... ..... ... ..... 1000111 @r4_rm 755fnmsub_h ..... 10 ..... ..... ... ..... 1001011 @r4_rm 756fnmadd_h ..... 10 ..... ..... ... ..... 1001111 @r4_rm 757fadd_h 0000010 ..... ..... ... ..... 1010011 @r_rm 758fsub_h 0000110 ..... ..... ... ..... 1010011 @r_rm 759fmul_h 0001010 ..... ..... ... ..... 1010011 @r_rm 760fdiv_h 0001110 ..... ..... ... ..... 1010011 @r_rm 761fsqrt_h 0101110 00000 ..... ... ..... 1010011 @r2_rm 762fsgnj_h 0010010 ..... ..... 000 ..... 1010011 @r 763fsgnjn_h 0010010 ..... ..... 001 ..... 1010011 @r 764fsgnjx_h 0010010 ..... ..... 010 ..... 1010011 @r 765fmin_h 0010110 ..... ..... 000 ..... 1010011 @r 766fmax_h 0010110 ..... ..... 001 ..... 1010011 @r 767fcvt_h_s 0100010 00000 ..... ... ..... 1010011 @r2_rm 768fcvt_s_h 0100000 00010 ..... ... ..... 1010011 @r2_rm 769fcvt_h_d 0100010 00001 ..... ... ..... 1010011 @r2_rm 770fcvt_d_h 0100001 00010 ..... ... ..... 1010011 @r2_rm 771fcvt_w_h 1100010 00000 ..... ... ..... 1010011 @r2_rm 772fcvt_wu_h 1100010 00001 ..... ... ..... 1010011 @r2_rm 773fmv_x_h 1110010 00000 ..... 000 ..... 1010011 @r2 774feq_h 1010010 ..... ..... 010 ..... 1010011 @r 775flt_h 1010010 ..... ..... 001 ..... 1010011 @r 776fle_h 1010010 ..... ..... 000 ..... 1010011 @r 777fclass_h 1110010 00000 ..... 001 ..... 1010011 @r2 778fcvt_h_w 1101010 00000 ..... ... ..... 1010011 @r2_rm 779fcvt_h_wu 1101010 00001 ..... ... ..... 1010011 @r2_rm 780fmv_h_x 1111010 00000 ..... 000 ..... 1010011 @r2 781 782# *** RV64 Zfh Extension (in addition to RV32 Zfh) *** 783fcvt_l_h 1100010 00010 ..... ... ..... 1010011 @r2_rm 784fcvt_lu_h 1100010 00011 ..... ... ..... 1010011 @r2_rm 785fcvt_h_l 1101010 00010 ..... ... ..... 1010011 @r2_rm 786fcvt_h_lu 1101010 00011 ..... ... ..... 1010011 @r2_rm 787