1# 2# RISC-V translation routines for the RVXI Base Integer Instruction Set. 3# 4# Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de 5# Bastian Koppelmann, kbastian@mail.uni-paderborn.de 6# 7# This program is free software; you can redistribute it and/or modify it 8# under the terms and conditions of the GNU General Public License, 9# version 2 or later, as published by the Free Software Foundation. 10# 11# This program is distributed in the hope it will be useful, but WITHOUT 12# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14# more details. 15# 16# You should have received a copy of the GNU General Public License along with 17# this program. If not, see <http://www.gnu.org/licenses/>. 18 19# Fields: 20%rs3 27:5 21%rs2 20:5 22%rs1 15:5 23%rd 7:5 24 25%sh10 20:10 26%csr 20:12 27%rm 12:3 28%nf 29:3 !function=ex_plus_1 29 30# immediates: 31%imm_i 20:s12 32%imm_s 25:s7 7:5 33%imm_b 31:s1 7:1 25:6 8:4 !function=ex_shift_1 34%imm_j 31:s1 12:8 20:1 21:10 !function=ex_shift_1 35%imm_u 12:s20 !function=ex_shift_12 36 37# Argument sets: 38&empty 39&b imm rs2 rs1 40&i imm rs1 rd 41&j imm rd 42&r rd rs1 rs2 43&s imm rs1 rs2 44&u imm rd 45&shift shamt rs1 rd 46&atomic aq rl rs2 rs1 rd 47&rmrr vm rd rs1 rs2 48&rwdvm vm wd rd rs1 rs2 49&r2nfvm vm rd rs1 nf 50&rnfvm vm rd rs1 rs2 nf 51 52# Formats 32: 53@r ....... ..... ..... ... ..... ....... &r %rs2 %rs1 %rd 54@i ............ ..... ... ..... ....... &i imm=%imm_i %rs1 %rd 55@b ....... ..... ..... ... ..... ....... &b imm=%imm_b %rs2 %rs1 56@s ....... ..... ..... ... ..... ....... &s imm=%imm_s %rs2 %rs1 57@u .................... ..... ....... &u imm=%imm_u %rd 58@j .................... ..... ....... &j imm=%imm_j %rd 59 60@sh ...... ...... ..... ... ..... ....... &shift shamt=%sh10 %rs1 %rd 61@csr ............ ..... ... ..... ....... %csr %rs1 %rd 62 63@atom_ld ..... aq:1 rl:1 ..... ........ ..... ....... &atomic rs2=0 %rs1 %rd 64@atom_st ..... aq:1 rl:1 ..... ........ ..... ....... &atomic %rs2 %rs1 %rd 65 66@r4_rm ..... .. ..... ..... ... ..... ....... %rs3 %rs2 %rs1 %rm %rd 67@r_rm ....... ..... ..... ... ..... ....... %rs2 %rs1 %rm %rd 68@r2_rm ....... ..... ..... ... ..... ....... %rs1 %rm %rd 69@r2 ....... ..... ..... ... ..... ....... %rs1 %rd 70@r2_nfvm ... ... vm:1 ..... ..... ... ..... ....... &r2nfvm %nf %rs1 %rd 71@r_nfvm ... ... vm:1 ..... ..... ... ..... ....... &rnfvm %nf %rs2 %rs1 %rd 72@r_vm ...... vm:1 ..... ..... ... ..... ....... &rmrr %rs2 %rs1 %rd 73@r_vm_1 ...... . ..... ..... ... ..... ....... &rmrr vm=1 %rs2 %rs1 %rd 74@r_wdvm ..... wd:1 vm:1 ..... ..... ... ..... ....... &rwdvm %rs2 %rs1 %rd 75@r2_zimm . zimm:11 ..... ... ..... ....... %rs1 %rd 76 77@hfence_gvma ....... ..... ..... ... ..... ....... %rs2 %rs1 78@hfence_vvma ....... ..... ..... ... ..... ....... %rs2 %rs1 79 80@sfence_vma ....... ..... ..... ... ..... ....... %rs2 %rs1 81@sfence_vm ....... ..... ..... ... ..... ....... %rs1 82 83 84# *** Privileged Instructions *** 85ecall 000000000000 00000 000 00000 1110011 86ebreak 000000000001 00000 000 00000 1110011 87uret 0000000 00010 00000 000 00000 1110011 88sret 0001000 00010 00000 000 00000 1110011 89mret 0011000 00010 00000 000 00000 1110011 90wfi 0001000 00101 00000 000 00000 1110011 91sfence_vma 0001001 ..... ..... 000 00000 1110011 @sfence_vma 92sfence_vm 0001000 00100 ..... 000 00000 1110011 @sfence_vm 93 94# *** RV32I Base Instruction Set *** 95lui .................... ..... 0110111 @u 96auipc .................... ..... 0010111 @u 97jal .................... ..... 1101111 @j 98jalr ............ ..... 000 ..... 1100111 @i 99beq ....... ..... ..... 000 ..... 1100011 @b 100bne ....... ..... ..... 001 ..... 1100011 @b 101blt ....... ..... ..... 100 ..... 1100011 @b 102bge ....... ..... ..... 101 ..... 1100011 @b 103bltu ....... ..... ..... 110 ..... 1100011 @b 104bgeu ....... ..... ..... 111 ..... 1100011 @b 105lb ............ ..... 000 ..... 0000011 @i 106lh ............ ..... 001 ..... 0000011 @i 107lw ............ ..... 010 ..... 0000011 @i 108lbu ............ ..... 100 ..... 0000011 @i 109lhu ............ ..... 101 ..... 0000011 @i 110sb ....... ..... ..... 000 ..... 0100011 @s 111sh ....... ..... ..... 001 ..... 0100011 @s 112sw ....... ..... ..... 010 ..... 0100011 @s 113addi ............ ..... 000 ..... 0010011 @i 114slti ............ ..... 010 ..... 0010011 @i 115sltiu ............ ..... 011 ..... 0010011 @i 116xori ............ ..... 100 ..... 0010011 @i 117ori ............ ..... 110 ..... 0010011 @i 118andi ............ ..... 111 ..... 0010011 @i 119slli 00.... ...... ..... 001 ..... 0010011 @sh 120srli 00.... ...... ..... 101 ..... 0010011 @sh 121srai 01.... ...... ..... 101 ..... 0010011 @sh 122add 0000000 ..... ..... 000 ..... 0110011 @r 123sub 0100000 ..... ..... 000 ..... 0110011 @r 124sll 0000000 ..... ..... 001 ..... 0110011 @r 125slt 0000000 ..... ..... 010 ..... 0110011 @r 126sltu 0000000 ..... ..... 011 ..... 0110011 @r 127xor 0000000 ..... ..... 100 ..... 0110011 @r 128srl 0000000 ..... ..... 101 ..... 0110011 @r 129sra 0100000 ..... ..... 101 ..... 0110011 @r 130or 0000000 ..... ..... 110 ..... 0110011 @r 131and 0000000 ..... ..... 111 ..... 0110011 @r 132fence ---- pred:4 succ:4 ----- 000 ----- 0001111 133fence_i ---- ---- ---- ----- 001 ----- 0001111 134csrrw ............ ..... 001 ..... 1110011 @csr 135csrrs ............ ..... 010 ..... 1110011 @csr 136csrrc ............ ..... 011 ..... 1110011 @csr 137csrrwi ............ ..... 101 ..... 1110011 @csr 138csrrsi ............ ..... 110 ..... 1110011 @csr 139csrrci ............ ..... 111 ..... 1110011 @csr 140 141# *** RV32M Standard Extension *** 142mul 0000001 ..... ..... 000 ..... 0110011 @r 143mulh 0000001 ..... ..... 001 ..... 0110011 @r 144mulhsu 0000001 ..... ..... 010 ..... 0110011 @r 145mulhu 0000001 ..... ..... 011 ..... 0110011 @r 146div 0000001 ..... ..... 100 ..... 0110011 @r 147divu 0000001 ..... ..... 101 ..... 0110011 @r 148rem 0000001 ..... ..... 110 ..... 0110011 @r 149remu 0000001 ..... ..... 111 ..... 0110011 @r 150 151# *** RV32A Standard Extension *** 152lr_w 00010 . . 00000 ..... 010 ..... 0101111 @atom_ld 153sc_w 00011 . . ..... ..... 010 ..... 0101111 @atom_st 154amoswap_w 00001 . . ..... ..... 010 ..... 0101111 @atom_st 155amoadd_w 00000 . . ..... ..... 010 ..... 0101111 @atom_st 156amoxor_w 00100 . . ..... ..... 010 ..... 0101111 @atom_st 157amoand_w 01100 . . ..... ..... 010 ..... 0101111 @atom_st 158amoor_w 01000 . . ..... ..... 010 ..... 0101111 @atom_st 159amomin_w 10000 . . ..... ..... 010 ..... 0101111 @atom_st 160amomax_w 10100 . . ..... ..... 010 ..... 0101111 @atom_st 161amominu_w 11000 . . ..... ..... 010 ..... 0101111 @atom_st 162amomaxu_w 11100 . . ..... ..... 010 ..... 0101111 @atom_st 163 164# *** RV32F Standard Extension *** 165flw ............ ..... 010 ..... 0000111 @i 166fsw ....... ..... ..... 010 ..... 0100111 @s 167fmadd_s ..... 00 ..... ..... ... ..... 1000011 @r4_rm 168fmsub_s ..... 00 ..... ..... ... ..... 1000111 @r4_rm 169fnmsub_s ..... 00 ..... ..... ... ..... 1001011 @r4_rm 170fnmadd_s ..... 00 ..... ..... ... ..... 1001111 @r4_rm 171fadd_s 0000000 ..... ..... ... ..... 1010011 @r_rm 172fsub_s 0000100 ..... ..... ... ..... 1010011 @r_rm 173fmul_s 0001000 ..... ..... ... ..... 1010011 @r_rm 174fdiv_s 0001100 ..... ..... ... ..... 1010011 @r_rm 175fsqrt_s 0101100 00000 ..... ... ..... 1010011 @r2_rm 176fsgnj_s 0010000 ..... ..... 000 ..... 1010011 @r 177fsgnjn_s 0010000 ..... ..... 001 ..... 1010011 @r 178fsgnjx_s 0010000 ..... ..... 010 ..... 1010011 @r 179fmin_s 0010100 ..... ..... 000 ..... 1010011 @r 180fmax_s 0010100 ..... ..... 001 ..... 1010011 @r 181fcvt_w_s 1100000 00000 ..... ... ..... 1010011 @r2_rm 182fcvt_wu_s 1100000 00001 ..... ... ..... 1010011 @r2_rm 183fmv_x_w 1110000 00000 ..... 000 ..... 1010011 @r2 184feq_s 1010000 ..... ..... 010 ..... 1010011 @r 185flt_s 1010000 ..... ..... 001 ..... 1010011 @r 186fle_s 1010000 ..... ..... 000 ..... 1010011 @r 187fclass_s 1110000 00000 ..... 001 ..... 1010011 @r2 188fcvt_s_w 1101000 00000 ..... ... ..... 1010011 @r2_rm 189fcvt_s_wu 1101000 00001 ..... ... ..... 1010011 @r2_rm 190fmv_w_x 1111000 00000 ..... 000 ..... 1010011 @r2 191 192# *** RV32D Standard Extension *** 193fld ............ ..... 011 ..... 0000111 @i 194fsd ....... ..... ..... 011 ..... 0100111 @s 195fmadd_d ..... 01 ..... ..... ... ..... 1000011 @r4_rm 196fmsub_d ..... 01 ..... ..... ... ..... 1000111 @r4_rm 197fnmsub_d ..... 01 ..... ..... ... ..... 1001011 @r4_rm 198fnmadd_d ..... 01 ..... ..... ... ..... 1001111 @r4_rm 199fadd_d 0000001 ..... ..... ... ..... 1010011 @r_rm 200fsub_d 0000101 ..... ..... ... ..... 1010011 @r_rm 201fmul_d 0001001 ..... ..... ... ..... 1010011 @r_rm 202fdiv_d 0001101 ..... ..... ... ..... 1010011 @r_rm 203fsqrt_d 0101101 00000 ..... ... ..... 1010011 @r2_rm 204fsgnj_d 0010001 ..... ..... 000 ..... 1010011 @r 205fsgnjn_d 0010001 ..... ..... 001 ..... 1010011 @r 206fsgnjx_d 0010001 ..... ..... 010 ..... 1010011 @r 207fmin_d 0010101 ..... ..... 000 ..... 1010011 @r 208fmax_d 0010101 ..... ..... 001 ..... 1010011 @r 209fcvt_s_d 0100000 00001 ..... ... ..... 1010011 @r2_rm 210fcvt_d_s 0100001 00000 ..... ... ..... 1010011 @r2_rm 211feq_d 1010001 ..... ..... 010 ..... 1010011 @r 212flt_d 1010001 ..... ..... 001 ..... 1010011 @r 213fle_d 1010001 ..... ..... 000 ..... 1010011 @r 214fclass_d 1110001 00000 ..... 001 ..... 1010011 @r2 215fcvt_w_d 1100001 00000 ..... ... ..... 1010011 @r2_rm 216fcvt_wu_d 1100001 00001 ..... ... ..... 1010011 @r2_rm 217fcvt_d_w 1101001 00000 ..... ... ..... 1010011 @r2_rm 218fcvt_d_wu 1101001 00001 ..... ... ..... 1010011 @r2_rm 219 220# *** RV32H Base Instruction Set *** 221hfence_gvma 0110001 ..... ..... 000 00000 1110011 @hfence_gvma 222hfence_vvma 0010001 ..... ..... 000 00000 1110011 @hfence_vvma 223 224# *** RV32V Extension *** 225 226# *** Vector loads and stores are encoded within LOADFP/STORE-FP *** 227vlb_v ... 100 . 00000 ..... 000 ..... 0000111 @r2_nfvm 228vlh_v ... 100 . 00000 ..... 101 ..... 0000111 @r2_nfvm 229vlw_v ... 100 . 00000 ..... 110 ..... 0000111 @r2_nfvm 230vle_v ... 000 . 00000 ..... 111 ..... 0000111 @r2_nfvm 231vlbu_v ... 000 . 00000 ..... 000 ..... 0000111 @r2_nfvm 232vlhu_v ... 000 . 00000 ..... 101 ..... 0000111 @r2_nfvm 233vlwu_v ... 000 . 00000 ..... 110 ..... 0000111 @r2_nfvm 234vlbff_v ... 100 . 10000 ..... 000 ..... 0000111 @r2_nfvm 235vlhff_v ... 100 . 10000 ..... 101 ..... 0000111 @r2_nfvm 236vlwff_v ... 100 . 10000 ..... 110 ..... 0000111 @r2_nfvm 237vleff_v ... 000 . 10000 ..... 111 ..... 0000111 @r2_nfvm 238vlbuff_v ... 000 . 10000 ..... 000 ..... 0000111 @r2_nfvm 239vlhuff_v ... 000 . 10000 ..... 101 ..... 0000111 @r2_nfvm 240vlwuff_v ... 000 . 10000 ..... 110 ..... 0000111 @r2_nfvm 241vsb_v ... 000 . 00000 ..... 000 ..... 0100111 @r2_nfvm 242vsh_v ... 000 . 00000 ..... 101 ..... 0100111 @r2_nfvm 243vsw_v ... 000 . 00000 ..... 110 ..... 0100111 @r2_nfvm 244vse_v ... 000 . 00000 ..... 111 ..... 0100111 @r2_nfvm 245 246vlsb_v ... 110 . ..... ..... 000 ..... 0000111 @r_nfvm 247vlsh_v ... 110 . ..... ..... 101 ..... 0000111 @r_nfvm 248vlsw_v ... 110 . ..... ..... 110 ..... 0000111 @r_nfvm 249vlse_v ... 010 . ..... ..... 111 ..... 0000111 @r_nfvm 250vlsbu_v ... 010 . ..... ..... 000 ..... 0000111 @r_nfvm 251vlshu_v ... 010 . ..... ..... 101 ..... 0000111 @r_nfvm 252vlswu_v ... 010 . ..... ..... 110 ..... 0000111 @r_nfvm 253vssb_v ... 010 . ..... ..... 000 ..... 0100111 @r_nfvm 254vssh_v ... 010 . ..... ..... 101 ..... 0100111 @r_nfvm 255vssw_v ... 010 . ..... ..... 110 ..... 0100111 @r_nfvm 256vsse_v ... 010 . ..... ..... 111 ..... 0100111 @r_nfvm 257 258vlxb_v ... 111 . ..... ..... 000 ..... 0000111 @r_nfvm 259vlxh_v ... 111 . ..... ..... 101 ..... 0000111 @r_nfvm 260vlxw_v ... 111 . ..... ..... 110 ..... 0000111 @r_nfvm 261vlxe_v ... 011 . ..... ..... 111 ..... 0000111 @r_nfvm 262vlxbu_v ... 011 . ..... ..... 000 ..... 0000111 @r_nfvm 263vlxhu_v ... 011 . ..... ..... 101 ..... 0000111 @r_nfvm 264vlxwu_v ... 011 . ..... ..... 110 ..... 0000111 @r_nfvm 265# Vector ordered-indexed and unordered-indexed store insns. 266vsxb_v ... -11 . ..... ..... 000 ..... 0100111 @r_nfvm 267vsxh_v ... -11 . ..... ..... 101 ..... 0100111 @r_nfvm 268vsxw_v ... -11 . ..... ..... 110 ..... 0100111 @r_nfvm 269vsxe_v ... -11 . ..... ..... 111 ..... 0100111 @r_nfvm 270 271#*** Vector AMO operations are encoded under the standard AMO major opcode *** 272vamoswapw_v 00001 . . ..... ..... 110 ..... 0101111 @r_wdvm 273vamoaddw_v 00000 . . ..... ..... 110 ..... 0101111 @r_wdvm 274vamoxorw_v 00100 . . ..... ..... 110 ..... 0101111 @r_wdvm 275vamoandw_v 01100 . . ..... ..... 110 ..... 0101111 @r_wdvm 276vamoorw_v 01000 . . ..... ..... 110 ..... 0101111 @r_wdvm 277vamominw_v 10000 . . ..... ..... 110 ..... 0101111 @r_wdvm 278vamomaxw_v 10100 . . ..... ..... 110 ..... 0101111 @r_wdvm 279vamominuw_v 11000 . . ..... ..... 110 ..... 0101111 @r_wdvm 280vamomaxuw_v 11100 . . ..... ..... 110 ..... 0101111 @r_wdvm 281 282# *** new major opcode OP-V *** 283vadd_vv 000000 . ..... ..... 000 ..... 1010111 @r_vm 284vadd_vx 000000 . ..... ..... 100 ..... 1010111 @r_vm 285vadd_vi 000000 . ..... ..... 011 ..... 1010111 @r_vm 286vsub_vv 000010 . ..... ..... 000 ..... 1010111 @r_vm 287vsub_vx 000010 . ..... ..... 100 ..... 1010111 @r_vm 288vrsub_vx 000011 . ..... ..... 100 ..... 1010111 @r_vm 289vrsub_vi 000011 . ..... ..... 011 ..... 1010111 @r_vm 290vwaddu_vv 110000 . ..... ..... 010 ..... 1010111 @r_vm 291vwaddu_vx 110000 . ..... ..... 110 ..... 1010111 @r_vm 292vwadd_vv 110001 . ..... ..... 010 ..... 1010111 @r_vm 293vwadd_vx 110001 . ..... ..... 110 ..... 1010111 @r_vm 294vwsubu_vv 110010 . ..... ..... 010 ..... 1010111 @r_vm 295vwsubu_vx 110010 . ..... ..... 110 ..... 1010111 @r_vm 296vwsub_vv 110011 . ..... ..... 010 ..... 1010111 @r_vm 297vwsub_vx 110011 . ..... ..... 110 ..... 1010111 @r_vm 298vwaddu_wv 110100 . ..... ..... 010 ..... 1010111 @r_vm 299vwaddu_wx 110100 . ..... ..... 110 ..... 1010111 @r_vm 300vwadd_wv 110101 . ..... ..... 010 ..... 1010111 @r_vm 301vwadd_wx 110101 . ..... ..... 110 ..... 1010111 @r_vm 302vwsubu_wv 110110 . ..... ..... 010 ..... 1010111 @r_vm 303vwsubu_wx 110110 . ..... ..... 110 ..... 1010111 @r_vm 304vwsub_wv 110111 . ..... ..... 010 ..... 1010111 @r_vm 305vwsub_wx 110111 . ..... ..... 110 ..... 1010111 @r_vm 306vadc_vvm 010000 1 ..... ..... 000 ..... 1010111 @r_vm_1 307vadc_vxm 010000 1 ..... ..... 100 ..... 1010111 @r_vm_1 308vadc_vim 010000 1 ..... ..... 011 ..... 1010111 @r_vm_1 309vmadc_vvm 010001 1 ..... ..... 000 ..... 1010111 @r_vm_1 310vmadc_vxm 010001 1 ..... ..... 100 ..... 1010111 @r_vm_1 311vmadc_vim 010001 1 ..... ..... 011 ..... 1010111 @r_vm_1 312vsbc_vvm 010010 1 ..... ..... 000 ..... 1010111 @r_vm_1 313vsbc_vxm 010010 1 ..... ..... 100 ..... 1010111 @r_vm_1 314vmsbc_vvm 010011 1 ..... ..... 000 ..... 1010111 @r_vm_1 315vmsbc_vxm 010011 1 ..... ..... 100 ..... 1010111 @r_vm_1 316vand_vv 001001 . ..... ..... 000 ..... 1010111 @r_vm 317vand_vx 001001 . ..... ..... 100 ..... 1010111 @r_vm 318vand_vi 001001 . ..... ..... 011 ..... 1010111 @r_vm 319vor_vv 001010 . ..... ..... 000 ..... 1010111 @r_vm 320vor_vx 001010 . ..... ..... 100 ..... 1010111 @r_vm 321vor_vi 001010 . ..... ..... 011 ..... 1010111 @r_vm 322vxor_vv 001011 . ..... ..... 000 ..... 1010111 @r_vm 323vxor_vx 001011 . ..... ..... 100 ..... 1010111 @r_vm 324vxor_vi 001011 . ..... ..... 011 ..... 1010111 @r_vm 325vsll_vv 100101 . ..... ..... 000 ..... 1010111 @r_vm 326vsll_vx 100101 . ..... ..... 100 ..... 1010111 @r_vm 327vsll_vi 100101 . ..... ..... 011 ..... 1010111 @r_vm 328vsrl_vv 101000 . ..... ..... 000 ..... 1010111 @r_vm 329vsrl_vx 101000 . ..... ..... 100 ..... 1010111 @r_vm 330vsrl_vi 101000 . ..... ..... 011 ..... 1010111 @r_vm 331vsra_vv 101001 . ..... ..... 000 ..... 1010111 @r_vm 332vsra_vx 101001 . ..... ..... 100 ..... 1010111 @r_vm 333vsra_vi 101001 . ..... ..... 011 ..... 1010111 @r_vm 334vnsrl_vv 101100 . ..... ..... 000 ..... 1010111 @r_vm 335vnsrl_vx 101100 . ..... ..... 100 ..... 1010111 @r_vm 336vnsrl_vi 101100 . ..... ..... 011 ..... 1010111 @r_vm 337vnsra_vv 101101 . ..... ..... 000 ..... 1010111 @r_vm 338vnsra_vx 101101 . ..... ..... 100 ..... 1010111 @r_vm 339vnsra_vi 101101 . ..... ..... 011 ..... 1010111 @r_vm 340vmseq_vv 011000 . ..... ..... 000 ..... 1010111 @r_vm 341vmseq_vx 011000 . ..... ..... 100 ..... 1010111 @r_vm 342vmseq_vi 011000 . ..... ..... 011 ..... 1010111 @r_vm 343vmsne_vv 011001 . ..... ..... 000 ..... 1010111 @r_vm 344vmsne_vx 011001 . ..... ..... 100 ..... 1010111 @r_vm 345vmsne_vi 011001 . ..... ..... 011 ..... 1010111 @r_vm 346vmsltu_vv 011010 . ..... ..... 000 ..... 1010111 @r_vm 347vmsltu_vx 011010 . ..... ..... 100 ..... 1010111 @r_vm 348vmslt_vv 011011 . ..... ..... 000 ..... 1010111 @r_vm 349vmslt_vx 011011 . ..... ..... 100 ..... 1010111 @r_vm 350vmsleu_vv 011100 . ..... ..... 000 ..... 1010111 @r_vm 351vmsleu_vx 011100 . ..... ..... 100 ..... 1010111 @r_vm 352vmsleu_vi 011100 . ..... ..... 011 ..... 1010111 @r_vm 353vmsle_vv 011101 . ..... ..... 000 ..... 1010111 @r_vm 354vmsle_vx 011101 . ..... ..... 100 ..... 1010111 @r_vm 355vmsle_vi 011101 . ..... ..... 011 ..... 1010111 @r_vm 356vmsgtu_vx 011110 . ..... ..... 100 ..... 1010111 @r_vm 357vmsgtu_vi 011110 . ..... ..... 011 ..... 1010111 @r_vm 358vmsgt_vx 011111 . ..... ..... 100 ..... 1010111 @r_vm 359vmsgt_vi 011111 . ..... ..... 011 ..... 1010111 @r_vm 360vminu_vv 000100 . ..... ..... 000 ..... 1010111 @r_vm 361vminu_vx 000100 . ..... ..... 100 ..... 1010111 @r_vm 362vmin_vv 000101 . ..... ..... 000 ..... 1010111 @r_vm 363vmin_vx 000101 . ..... ..... 100 ..... 1010111 @r_vm 364vmaxu_vv 000110 . ..... ..... 000 ..... 1010111 @r_vm 365vmaxu_vx 000110 . ..... ..... 100 ..... 1010111 @r_vm 366vmax_vv 000111 . ..... ..... 000 ..... 1010111 @r_vm 367vmax_vx 000111 . ..... ..... 100 ..... 1010111 @r_vm 368 369vsetvli 0 ........... ..... 111 ..... 1010111 @r2_zimm 370vsetvl 1000000 ..... ..... 111 ..... 1010111 @r 371