xref: /openbmc/qemu/target/riscv/insn32.decode (revision 53c7c924)
1#
2# RISC-V translation routines for the RVXI Base Integer Instruction Set.
3#
4# Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de
5#                    Bastian Koppelmann, kbastian@mail.uni-paderborn.de
6#
7# This program is free software; you can redistribute it and/or modify it
8# under the terms and conditions of the GNU General Public License,
9# version 2 or later, as published by the Free Software Foundation.
10#
11# This program is distributed in the hope it will be useful, but WITHOUT
12# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14# more details.
15#
16# You should have received a copy of the GNU General Public License along with
17# this program.  If not, see <http://www.gnu.org/licenses/>.
18
19# Fields:
20%rs3       27:5
21%rs2       20:5
22%rs1       15:5
23%rd        7:5
24%sh5       20:5
25%sh6       20:6
26
27%sh7    20:7
28%csr    20:12
29%rm     12:3
30%nf     29:3                     !function=ex_plus_1
31
32# immediates:
33%imm_i    20:s12
34%imm_s    25:s7 7:5
35%imm_b    31:s1 7:1 25:6 8:4     !function=ex_shift_1
36%imm_j    31:s1 12:8 20:1 21:10  !function=ex_shift_1
37%imm_u    12:s20                 !function=ex_shift_12
38%imm_bs   30:2                   !function=ex_shift_3
39%imm_rnum 20:4
40
41# Argument sets:
42&empty
43&b    imm rs2 rs1
44&i    imm rs1 rd
45&j    imm rd
46&r    rd rs1 rs2
47&r2   rd rs1
48&r2_s rs1 rs2
49&s    imm rs1 rs2
50&u    imm rd
51&shift     shamt rs1 rd
52&atomic    aq rl rs2 rs1 rd
53&rmrr      vm rd rs1 rs2
54&rmr       vm rd rs2
55&r2nfvm    vm rd rs1 nf
56&rnfvm     vm rd rs1 rs2 nf
57&k_aes     shamt rs2 rs1 rd
58
59# Formats 32:
60@r       .......   ..... ..... ... ..... ....... &r                %rs2 %rs1 %rd
61@i       ............    ..... ... ..... ....... &i      imm=%imm_i     %rs1 %rd
62@b       .......   ..... ..... ... ..... ....... &b      imm=%imm_b %rs2 %rs1
63@s       .......   ..... ..... ... ..... ....... &s      imm=%imm_s %rs2 %rs1
64@u       ....................      ..... ....... &u      imm=%imm_u          %rd
65@j       ....................      ..... ....... &j      imm=%imm_j          %rd
66
67@sh      ......  ...... .....  ... ..... ....... &shift  shamt=%sh7     %rs1 %rd
68@csr     ............   .....  ... ..... .......               %csr     %rs1 %rd
69
70@atom_ld ..... aq:1 rl:1 ..... ........ ..... ....... &atomic rs2=0     %rs1 %rd
71@atom_st ..... aq:1 rl:1 ..... ........ ..... ....... &atomic %rs2      %rs1 %rd
72
73@r4_rm   ..... ..  ..... ..... ... ..... ....... %rs3 %rs2 %rs1 %rm %rd
74@r_rm    .......   ..... ..... ... ..... ....... %rs2 %rs1 %rm %rd
75@r2_rm   .......   ..... ..... ... ..... ....... %rs1 %rm %rd
76@r2      .......   ..... ..... ... ..... ....... &r2 %rs1 %rd
77@r2_nfvm ... ... vm:1 ..... ..... ... ..... ....... &r2nfvm %nf %rs1 %rd
78@r2_vm   ...... vm:1 ..... ..... ... ..... ....... &rmr %rs2 %rd
79@r1_vm   ...... vm:1 ..... ..... ... ..... ....... %rd
80@r_nfvm  ... ... vm:1 ..... ..... ... ..... ....... &rnfvm %nf %rs2 %rs1 %rd
81@r2rd    .......   ..... ..... ... ..... ....... %rs2 %rd
82@r_vm    ...... vm:1 ..... ..... ... ..... ....... &rmrr %rs2 %rs1 %rd
83@r_vm_1  ...... . ..... ..... ... ..... .......    &rmrr vm=1 %rs2 %rs1 %rd
84@r_vm_0  ...... . ..... ..... ... ..... .......    &rmrr vm=0 %rs2 %rs1 %rd
85@r2_zimm11 . zimm:11  ..... ... ..... ....... %rs1 %rd
86@r2_zimm10 .. zimm:10  ..... ... ..... ....... %rs1 %rd
87@r2_s    .......   ..... ..... ... ..... ....... %rs2 %rs1
88
89@hfence_gvma ....... ..... .....   ... ..... ....... %rs2 %rs1
90@hfence_vvma ....... ..... .....   ... ..... ....... %rs2 %rs1
91
92@sfence_vma ....... ..... .....   ... ..... ....... %rs2 %rs1
93@sfence_vm  ....... ..... .....   ... ..... ....... %rs1
94
95@k_aes   .. ..... ..... .....  ... ..... ....... &k_aes  shamt=%imm_bs   %rs2 %rs1 %rd
96@i_aes   .. ..... ..... .....  ... ..... ....... &i      imm=%imm_rnum        %rs1 %rd
97
98# Formats 64:
99@sh5     .......  ..... .....  ... ..... ....... &shift  shamt=%sh5      %rs1 %rd
100
101# Formats 128:
102@sh6       ...... ...... ..... ... ..... ....... &shift shamt=%sh6 %rs1 %rd
103
104# *** Privileged Instructions ***
105ecall       000000000000     00000 000 00000 1110011
106ebreak      000000000001     00000 000 00000 1110011
107uret        0000000    00010 00000 000 00000 1110011
108sret        0001000    00010 00000 000 00000 1110011
109mret        0011000    00010 00000 000 00000 1110011
110wfi         0001000    00101 00000 000 00000 1110011
111sfence_vma  0001001    ..... ..... 000 00000 1110011 @sfence_vma
112sfence_vm   0001000    00100 ..... 000 00000 1110011 @sfence_vm
113
114# *** RV32I Base Instruction Set ***
115lui      ....................       ..... 0110111 @u
116auipc    ....................       ..... 0010111 @u
117jal      ....................       ..... 1101111 @j
118jalr     ............     ..... 000 ..... 1100111 @i
119beq      ....... .....    ..... 000 ..... 1100011 @b
120bne      ....... .....    ..... 001 ..... 1100011 @b
121blt      ....... .....    ..... 100 ..... 1100011 @b
122bge      ....... .....    ..... 101 ..... 1100011 @b
123bltu     ....... .....    ..... 110 ..... 1100011 @b
124bgeu     ....... .....    ..... 111 ..... 1100011 @b
125lb       ............     ..... 000 ..... 0000011 @i
126lh       ............     ..... 001 ..... 0000011 @i
127lw       ............     ..... 010 ..... 0000011 @i
128lbu      ............     ..... 100 ..... 0000011 @i
129lhu      ............     ..... 101 ..... 0000011 @i
130sb       .......  .....   ..... 000 ..... 0100011 @s
131sh       .......  .....   ..... 001 ..... 0100011 @s
132sw       .......  .....   ..... 010 ..... 0100011 @s
133addi     ............     ..... 000 ..... 0010011 @i
134slti     ............     ..... 010 ..... 0010011 @i
135sltiu    ............     ..... 011 ..... 0010011 @i
136xori     ............     ..... 100 ..... 0010011 @i
137# cbo.prefetch_{i,r,m} instructions are ori with rd=x0 and not decoded.
138ori      ............     ..... 110 ..... 0010011 @i
139andi     ............     ..... 111 ..... 0010011 @i
140slli     00000. ......    ..... 001 ..... 0010011 @sh
141srli     00000. ......    ..... 101 ..... 0010011 @sh
142srai     01000. ......    ..... 101 ..... 0010011 @sh
143add      0000000 .....    ..... 000 ..... 0110011 @r
144sub      0100000 .....    ..... 000 ..... 0110011 @r
145sll      0000000 .....    ..... 001 ..... 0110011 @r
146slt      0000000 .....    ..... 010 ..... 0110011 @r
147sltu     0000000 .....    ..... 011 ..... 0110011 @r
148xor      0000000 .....    ..... 100 ..... 0110011 @r
149srl      0000000 .....    ..... 101 ..... 0110011 @r
150sra      0100000 .....    ..... 101 ..... 0110011 @r
151or       0000000 .....    ..... 110 ..... 0110011 @r
152and      0000000 .....    ..... 111 ..... 0110011 @r
153
154{
155  pause  0000 0001   0000   00000 000 00000 0001111
156  fence  ---- pred:4 succ:4 ----- 000 ----- 0001111
157}
158
159fence_i  ---- ----   ----   ----- 001 ----- 0001111
160csrrw    ............     ..... 001 ..... 1110011 @csr
161csrrs    ............     ..... 010 ..... 1110011 @csr
162csrrc    ............     ..... 011 ..... 1110011 @csr
163csrrwi   ............     ..... 101 ..... 1110011 @csr
164csrrsi   ............     ..... 110 ..... 1110011 @csr
165csrrci   ............     ..... 111 ..... 1110011 @csr
166
167# *** RV64I Base Instruction Set (in addition to RV32I) ***
168lwu      ............   ..... 110 ..... 0000011 @i
169ld       ............   ..... 011 ..... 0000011 @i
170sd       ....... .....  ..... 011 ..... 0100011 @s
171addiw    ............   ..... 000 ..... 0011011 @i
172slliw    0000000 .....  ..... 001 ..... 0011011 @sh5
173srliw    0000000 .....  ..... 101 ..... 0011011 @sh5
174sraiw    0100000 .....  ..... 101 ..... 0011011 @sh5
175addw     0000000 .....  ..... 000 ..... 0111011 @r
176subw     0100000 .....  ..... 000 ..... 0111011 @r
177sllw     0000000 .....  ..... 001 ..... 0111011 @r
178srlw     0000000 .....  ..... 101 ..... 0111011 @r
179sraw     0100000 .....  ..... 101 ..... 0111011 @r
180
181# *** RV128I Base Instruction Set (in addition to RV64I) ***
182ldu      ............   ..... 111 ..... 0000011 @i
183{
184  [
185    # *** RV32 Zicbom Standard Extension ***
186    cbo_clean  0000000 00001 ..... 010 00000 0001111 @sfence_vm
187    cbo_flush  0000000 00010 ..... 010 00000 0001111 @sfence_vm
188    cbo_inval  0000000 00000 ..... 010 00000 0001111 @sfence_vm
189
190    # *** RV32 Zicboz Standard Extension ***
191    cbo_zero   0000000 00100 ..... 010 00000 0001111 @sfence_vm
192  ]
193
194  # *** RVI128 lq ***
195  lq       ............   ..... 010 ..... 0001111 @i
196}
197sq       ............   ..... 100 ..... 0100011 @s
198addid    ............  .....  000 ..... 1011011 @i
199sllid    000000 ......  ..... 001 ..... 1011011 @sh6
200srlid    000000 ......  ..... 101 ..... 1011011 @sh6
201sraid    010000 ......  ..... 101 ..... 1011011 @sh6
202addd     0000000 ..... .....  000 ..... 1111011 @r
203subd     0100000 ..... .....  000 ..... 1111011 @r
204slld     0000000 ..... .....  001 ..... 1111011 @r
205srld     0000000 ..... .....  101 ..... 1111011 @r
206srad     0100000 ..... .....  101 ..... 1111011 @r
207
208# *** RV32M Standard Extension ***
209mul      0000001 .....  ..... 000 ..... 0110011 @r
210mulh     0000001 .....  ..... 001 ..... 0110011 @r
211mulhsu   0000001 .....  ..... 010 ..... 0110011 @r
212mulhu    0000001 .....  ..... 011 ..... 0110011 @r
213div      0000001 .....  ..... 100 ..... 0110011 @r
214divu     0000001 .....  ..... 101 ..... 0110011 @r
215rem      0000001 .....  ..... 110 ..... 0110011 @r
216remu     0000001 .....  ..... 111 ..... 0110011 @r
217
218# *** RV64M Standard Extension (in addition to RV32M) ***
219mulw     0000001 .....  ..... 000 ..... 0111011 @r
220divw     0000001 .....  ..... 100 ..... 0111011 @r
221divuw    0000001 .....  ..... 101 ..... 0111011 @r
222remw     0000001 .....  ..... 110 ..... 0111011 @r
223remuw    0000001 .....  ..... 111 ..... 0111011 @r
224
225# *** RV128M Standard Extension (in addition to RV64M) ***
226muld     0000001 .....  ..... 000 ..... 1111011 @r
227divd     0000001 .....  ..... 100 ..... 1111011 @r
228divud    0000001 .....  ..... 101 ..... 1111011 @r
229remd     0000001 .....  ..... 110 ..... 1111011 @r
230remud    0000001 .....  ..... 111 ..... 1111011 @r
231
232# *** RV32A Standard Extension ***
233lr_w       00010 . . 00000 ..... 010 ..... 0101111 @atom_ld
234sc_w       00011 . . ..... ..... 010 ..... 0101111 @atom_st
235amoswap_w  00001 . . ..... ..... 010 ..... 0101111 @atom_st
236amoadd_w   00000 . . ..... ..... 010 ..... 0101111 @atom_st
237amoxor_w   00100 . . ..... ..... 010 ..... 0101111 @atom_st
238amoand_w   01100 . . ..... ..... 010 ..... 0101111 @atom_st
239amoor_w    01000 . . ..... ..... 010 ..... 0101111 @atom_st
240amomin_w   10000 . . ..... ..... 010 ..... 0101111 @atom_st
241amomax_w   10100 . . ..... ..... 010 ..... 0101111 @atom_st
242amominu_w  11000 . . ..... ..... 010 ..... 0101111 @atom_st
243amomaxu_w  11100 . . ..... ..... 010 ..... 0101111 @atom_st
244
245# *** RV64A Standard Extension (in addition to RV32A) ***
246lr_d       00010 . . 00000 ..... 011 ..... 0101111 @atom_ld
247sc_d       00011 . . ..... ..... 011 ..... 0101111 @atom_st
248amoswap_d  00001 . . ..... ..... 011 ..... 0101111 @atom_st
249amoadd_d   00000 . . ..... ..... 011 ..... 0101111 @atom_st
250amoxor_d   00100 . . ..... ..... 011 ..... 0101111 @atom_st
251amoand_d   01100 . . ..... ..... 011 ..... 0101111 @atom_st
252amoor_d    01000 . . ..... ..... 011 ..... 0101111 @atom_st
253amomin_d   10000 . . ..... ..... 011 ..... 0101111 @atom_st
254amomax_d   10100 . . ..... ..... 011 ..... 0101111 @atom_st
255amominu_d  11000 . . ..... ..... 011 ..... 0101111 @atom_st
256amomaxu_d  11100 . . ..... ..... 011 ..... 0101111 @atom_st
257
258# *** RV32F Standard Extension ***
259flw        ............   ..... 010 ..... 0000111 @i
260fsw        .......  ..... ..... 010 ..... 0100111 @s
261fmadd_s    ..... 00 ..... ..... ... ..... 1000011 @r4_rm
262fmsub_s    ..... 00 ..... ..... ... ..... 1000111 @r4_rm
263fnmsub_s   ..... 00 ..... ..... ... ..... 1001011 @r4_rm
264fnmadd_s   ..... 00 ..... ..... ... ..... 1001111 @r4_rm
265fadd_s     0000000  ..... ..... ... ..... 1010011 @r_rm
266fsub_s     0000100  ..... ..... ... ..... 1010011 @r_rm
267fmul_s     0001000  ..... ..... ... ..... 1010011 @r_rm
268fdiv_s     0001100  ..... ..... ... ..... 1010011 @r_rm
269fsqrt_s    0101100  00000 ..... ... ..... 1010011 @r2_rm
270fsgnj_s    0010000  ..... ..... 000 ..... 1010011 @r
271fsgnjn_s   0010000  ..... ..... 001 ..... 1010011 @r
272fsgnjx_s   0010000  ..... ..... 010 ..... 1010011 @r
273fmin_s     0010100  ..... ..... 000 ..... 1010011 @r
274fmax_s     0010100  ..... ..... 001 ..... 1010011 @r
275fcvt_w_s   1100000  00000 ..... ... ..... 1010011 @r2_rm
276fcvt_wu_s  1100000  00001 ..... ... ..... 1010011 @r2_rm
277fmv_x_w    1110000  00000 ..... 000 ..... 1010011 @r2
278feq_s      1010000  ..... ..... 010 ..... 1010011 @r
279flt_s      1010000  ..... ..... 001 ..... 1010011 @r
280fle_s      1010000  ..... ..... 000 ..... 1010011 @r
281fclass_s   1110000  00000 ..... 001 ..... 1010011 @r2
282fcvt_s_w   1101000  00000 ..... ... ..... 1010011 @r2_rm
283fcvt_s_wu  1101000  00001 ..... ... ..... 1010011 @r2_rm
284fmv_w_x    1111000  00000 ..... 000 ..... 1010011 @r2
285
286# *** RV64F Standard Extension (in addition to RV32F) ***
287fcvt_l_s   1100000  00010 ..... ... ..... 1010011 @r2_rm
288fcvt_lu_s  1100000  00011 ..... ... ..... 1010011 @r2_rm
289fcvt_s_l   1101000  00010 ..... ... ..... 1010011 @r2_rm
290fcvt_s_lu  1101000  00011 ..... ... ..... 1010011 @r2_rm
291
292# *** RV32D Standard Extension ***
293fld        ............   ..... 011 ..... 0000111 @i
294fsd        ....... .....  ..... 011 ..... 0100111 @s
295fmadd_d    ..... 01 ..... ..... ... ..... 1000011 @r4_rm
296fmsub_d    ..... 01 ..... ..... ... ..... 1000111 @r4_rm
297fnmsub_d   ..... 01 ..... ..... ... ..... 1001011 @r4_rm
298fnmadd_d   ..... 01 ..... ..... ... ..... 1001111 @r4_rm
299fadd_d     0000001  ..... ..... ... ..... 1010011 @r_rm
300fsub_d     0000101  ..... ..... ... ..... 1010011 @r_rm
301fmul_d     0001001  ..... ..... ... ..... 1010011 @r_rm
302fdiv_d     0001101  ..... ..... ... ..... 1010011 @r_rm
303fsqrt_d    0101101  00000 ..... ... ..... 1010011 @r2_rm
304fsgnj_d    0010001  ..... ..... 000 ..... 1010011 @r
305fsgnjn_d   0010001  ..... ..... 001 ..... 1010011 @r
306fsgnjx_d   0010001  ..... ..... 010 ..... 1010011 @r
307fmin_d     0010101  ..... ..... 000 ..... 1010011 @r
308fmax_d     0010101  ..... ..... 001 ..... 1010011 @r
309fcvt_s_d   0100000  00001 ..... ... ..... 1010011 @r2_rm
310fcvt_d_s   0100001  00000 ..... ... ..... 1010011 @r2_rm
311feq_d      1010001  ..... ..... 010 ..... 1010011 @r
312flt_d      1010001  ..... ..... 001 ..... 1010011 @r
313fle_d      1010001  ..... ..... 000 ..... 1010011 @r
314fclass_d   1110001  00000 ..... 001 ..... 1010011 @r2
315fcvt_w_d   1100001  00000 ..... ... ..... 1010011 @r2_rm
316fcvt_wu_d  1100001  00001 ..... ... ..... 1010011 @r2_rm
317fcvt_d_w   1101001  00000 ..... ... ..... 1010011 @r2_rm
318fcvt_d_wu  1101001  00001 ..... ... ..... 1010011 @r2_rm
319
320# *** RV64D Standard Extension (in addition to RV32D) ***
321fcvt_l_d   1100001  00010 ..... ... ..... 1010011 @r2_rm
322fcvt_lu_d  1100001  00011 ..... ... ..... 1010011 @r2_rm
323fmv_x_d    1110001  00000 ..... 000 ..... 1010011 @r2
324fcvt_d_l   1101001  00010 ..... ... ..... 1010011 @r2_rm
325fcvt_d_lu  1101001  00011 ..... ... ..... 1010011 @r2_rm
326fmv_d_x    1111001  00000 ..... 000 ..... 1010011 @r2
327
328# *** RV32H Base Instruction Set ***
329hlv_b       0110000  00000  ..... 100 ..... 1110011 @r2
330hlv_bu      0110000  00001  ..... 100 ..... 1110011 @r2
331hlv_h       0110010  00000  ..... 100 ..... 1110011 @r2
332hlv_hu      0110010  00001  ..... 100 ..... 1110011 @r2
333hlvx_hu     0110010  00011  ..... 100 ..... 1110011 @r2
334hlv_w       0110100  00000  ..... 100 ..... 1110011 @r2
335hlvx_wu     0110100  00011  ..... 100 ..... 1110011 @r2
336hsv_b       0110001  .....  ..... 100 00000 1110011 @r2_s
337hsv_h       0110011  .....  ..... 100 00000 1110011 @r2_s
338hsv_w       0110101  .....  ..... 100 00000 1110011 @r2_s
339hfence_gvma 0110001  .....  ..... 000 00000 1110011 @hfence_gvma
340hfence_vvma 0010001  .....  ..... 000 00000 1110011 @hfence_vvma
341
342# *** RV64H Base Instruction Set ***
343hlv_wu    0110100  00001   ..... 100 ..... 1110011 @r2
344hlv_d     0110110  00000   ..... 100 ..... 1110011 @r2
345hsv_d     0110111  .....   ..... 100 00000 1110011 @r2_s
346
347# *** Vector loads and stores are encoded within LOADFP/STORE-FP ***
348# Vector unit-stride load/store insns.
349vle8_v     ... 000 . 00000 ..... 000 ..... 0000111 @r2_nfvm
350vle16_v    ... 000 . 00000 ..... 101 ..... 0000111 @r2_nfvm
351vle32_v    ... 000 . 00000 ..... 110 ..... 0000111 @r2_nfvm
352vle64_v    ... 000 . 00000 ..... 111 ..... 0000111 @r2_nfvm
353vse8_v     ... 000 . 00000 ..... 000 ..... 0100111 @r2_nfvm
354vse16_v    ... 000 . 00000 ..... 101 ..... 0100111 @r2_nfvm
355vse32_v    ... 000 . 00000 ..... 110 ..... 0100111 @r2_nfvm
356vse64_v    ... 000 . 00000 ..... 111 ..... 0100111 @r2_nfvm
357
358# Vector unit-stride mask load/store insns.
359vlm_v      000 000 1 01011 ..... 000 ..... 0000111 @r2
360vsm_v      000 000 1 01011 ..... 000 ..... 0100111 @r2
361
362# Vector strided insns.
363vlse8_v     ... 010 . ..... ..... 000 ..... 0000111 @r_nfvm
364vlse16_v    ... 010 . ..... ..... 101 ..... 0000111 @r_nfvm
365vlse32_v    ... 010 . ..... ..... 110 ..... 0000111 @r_nfvm
366vlse64_v    ... 010 . ..... ..... 111 ..... 0000111 @r_nfvm
367vsse8_v     ... 010 . ..... ..... 000 ..... 0100111 @r_nfvm
368vsse16_v    ... 010 . ..... ..... 101 ..... 0100111 @r_nfvm
369vsse32_v    ... 010 . ..... ..... 110 ..... 0100111 @r_nfvm
370vsse64_v    ... 010 . ..... ..... 111 ..... 0100111 @r_nfvm
371
372# Vector ordered-indexed and unordered-indexed load insns.
373vlxei8_v      ... 0-1 . ..... ..... 000 ..... 0000111 @r_nfvm
374vlxei16_v     ... 0-1 . ..... ..... 101 ..... 0000111 @r_nfvm
375vlxei32_v     ... 0-1 . ..... ..... 110 ..... 0000111 @r_nfvm
376vlxei64_v     ... 0-1 . ..... ..... 111 ..... 0000111 @r_nfvm
377
378# Vector ordered-indexed and unordered-indexed store insns.
379vsxei8_v      ... 0-1 . ..... ..... 000 ..... 0100111 @r_nfvm
380vsxei16_v     ... 0-1 . ..... ..... 101 ..... 0100111 @r_nfvm
381vsxei32_v     ... 0-1 . ..... ..... 110 ..... 0100111 @r_nfvm
382vsxei64_v     ... 0-1 . ..... ..... 111 ..... 0100111 @r_nfvm
383
384# Vector unit-stride fault-only-first load insns.
385vle8ff_v      ... 000 . 10000 ..... 000 ..... 0000111 @r2_nfvm
386vle16ff_v     ... 000 . 10000 ..... 101 ..... 0000111 @r2_nfvm
387vle32ff_v     ... 000 . 10000 ..... 110 ..... 0000111 @r2_nfvm
388vle64ff_v     ... 000 . 10000 ..... 111 ..... 0000111 @r2_nfvm
389
390# Vector whole register insns
391vl1re8_v      000 000 1 01000 ..... 000 ..... 0000111 @r2
392vl1re16_v     000 000 1 01000 ..... 101 ..... 0000111 @r2
393vl1re32_v     000 000 1 01000 ..... 110 ..... 0000111 @r2
394vl1re64_v     000 000 1 01000 ..... 111 ..... 0000111 @r2
395vl2re8_v      001 000 1 01000 ..... 000 ..... 0000111 @r2
396vl2re16_v     001 000 1 01000 ..... 101 ..... 0000111 @r2
397vl2re32_v     001 000 1 01000 ..... 110 ..... 0000111 @r2
398vl2re64_v     001 000 1 01000 ..... 111 ..... 0000111 @r2
399vl4re8_v      011 000 1 01000 ..... 000 ..... 0000111 @r2
400vl4re16_v     011 000 1 01000 ..... 101 ..... 0000111 @r2
401vl4re32_v     011 000 1 01000 ..... 110 ..... 0000111 @r2
402vl4re64_v     011 000 1 01000 ..... 111 ..... 0000111 @r2
403vl8re8_v      111 000 1 01000 ..... 000 ..... 0000111 @r2
404vl8re16_v     111 000 1 01000 ..... 101 ..... 0000111 @r2
405vl8re32_v     111 000 1 01000 ..... 110 ..... 0000111 @r2
406vl8re64_v     111 000 1 01000 ..... 111 ..... 0000111 @r2
407vs1r_v        000 000 1 01000 ..... 000 ..... 0100111 @r2
408vs2r_v        001 000 1 01000 ..... 000 ..... 0100111 @r2
409vs4r_v        011 000 1 01000 ..... 000 ..... 0100111 @r2
410vs8r_v        111 000 1 01000 ..... 000 ..... 0100111 @r2
411
412# *** new major opcode OP-V ***
413vadd_vv         000000 . ..... ..... 000 ..... 1010111 @r_vm
414vadd_vx         000000 . ..... ..... 100 ..... 1010111 @r_vm
415vadd_vi         000000 . ..... ..... 011 ..... 1010111 @r_vm
416vsub_vv         000010 . ..... ..... 000 ..... 1010111 @r_vm
417vsub_vx         000010 . ..... ..... 100 ..... 1010111 @r_vm
418vrsub_vx        000011 . ..... ..... 100 ..... 1010111 @r_vm
419vrsub_vi        000011 . ..... ..... 011 ..... 1010111 @r_vm
420vwaddu_vv       110000 . ..... ..... 010 ..... 1010111 @r_vm
421vwaddu_vx       110000 . ..... ..... 110 ..... 1010111 @r_vm
422vwadd_vv        110001 . ..... ..... 010 ..... 1010111 @r_vm
423vwadd_vx        110001 . ..... ..... 110 ..... 1010111 @r_vm
424vwsubu_vv       110010 . ..... ..... 010 ..... 1010111 @r_vm
425vwsubu_vx       110010 . ..... ..... 110 ..... 1010111 @r_vm
426vwsub_vv        110011 . ..... ..... 010 ..... 1010111 @r_vm
427vwsub_vx        110011 . ..... ..... 110 ..... 1010111 @r_vm
428vwaddu_wv       110100 . ..... ..... 010 ..... 1010111 @r_vm
429vwaddu_wx       110100 . ..... ..... 110 ..... 1010111 @r_vm
430vwadd_wv        110101 . ..... ..... 010 ..... 1010111 @r_vm
431vwadd_wx        110101 . ..... ..... 110 ..... 1010111 @r_vm
432vwsubu_wv       110110 . ..... ..... 010 ..... 1010111 @r_vm
433vwsubu_wx       110110 . ..... ..... 110 ..... 1010111 @r_vm
434vwsub_wv        110111 . ..... ..... 010 ..... 1010111 @r_vm
435vwsub_wx        110111 . ..... ..... 110 ..... 1010111 @r_vm
436vadc_vvm        010000 0 ..... ..... 000 ..... 1010111 @r_vm_1
437vadc_vxm        010000 0 ..... ..... 100 ..... 1010111 @r_vm_1
438vadc_vim        010000 0 ..... ..... 011 ..... 1010111 @r_vm_1
439vmadc_vvm       010001 . ..... ..... 000 ..... 1010111 @r_vm
440vmadc_vxm       010001 . ..... ..... 100 ..... 1010111 @r_vm
441vmadc_vim       010001 . ..... ..... 011 ..... 1010111 @r_vm
442vsbc_vvm        010010 0 ..... ..... 000 ..... 1010111 @r_vm_1
443vsbc_vxm        010010 0 ..... ..... 100 ..... 1010111 @r_vm_1
444vmsbc_vvm       010011 . ..... ..... 000 ..... 1010111 @r_vm
445vmsbc_vxm       010011 . ..... ..... 100 ..... 1010111 @r_vm
446vand_vv         001001 . ..... ..... 000 ..... 1010111 @r_vm
447vand_vx         001001 . ..... ..... 100 ..... 1010111 @r_vm
448vand_vi         001001 . ..... ..... 011 ..... 1010111 @r_vm
449vor_vv          001010 . ..... ..... 000 ..... 1010111 @r_vm
450vor_vx          001010 . ..... ..... 100 ..... 1010111 @r_vm
451vor_vi          001010 . ..... ..... 011 ..... 1010111 @r_vm
452vxor_vv         001011 . ..... ..... 000 ..... 1010111 @r_vm
453vxor_vx         001011 . ..... ..... 100 ..... 1010111 @r_vm
454vxor_vi         001011 . ..... ..... 011 ..... 1010111 @r_vm
455vsll_vv         100101 . ..... ..... 000 ..... 1010111 @r_vm
456vsll_vx         100101 . ..... ..... 100 ..... 1010111 @r_vm
457vsll_vi         100101 . ..... ..... 011 ..... 1010111 @r_vm
458vsrl_vv         101000 . ..... ..... 000 ..... 1010111 @r_vm
459vsrl_vx         101000 . ..... ..... 100 ..... 1010111 @r_vm
460vsrl_vi         101000 . ..... ..... 011 ..... 1010111 @r_vm
461vsra_vv         101001 . ..... ..... 000 ..... 1010111 @r_vm
462vsra_vx         101001 . ..... ..... 100 ..... 1010111 @r_vm
463vsra_vi         101001 . ..... ..... 011 ..... 1010111 @r_vm
464vnsrl_wv        101100 . ..... ..... 000 ..... 1010111 @r_vm
465vnsrl_wx        101100 . ..... ..... 100 ..... 1010111 @r_vm
466vnsrl_wi        101100 . ..... ..... 011 ..... 1010111 @r_vm
467vnsra_wv        101101 . ..... ..... 000 ..... 1010111 @r_vm
468vnsra_wx        101101 . ..... ..... 100 ..... 1010111 @r_vm
469vnsra_wi        101101 . ..... ..... 011 ..... 1010111 @r_vm
470vmseq_vv        011000 . ..... ..... 000 ..... 1010111 @r_vm
471vmseq_vx        011000 . ..... ..... 100 ..... 1010111 @r_vm
472vmseq_vi        011000 . ..... ..... 011 ..... 1010111 @r_vm
473vmsne_vv        011001 . ..... ..... 000 ..... 1010111 @r_vm
474vmsne_vx        011001 . ..... ..... 100 ..... 1010111 @r_vm
475vmsne_vi        011001 . ..... ..... 011 ..... 1010111 @r_vm
476vmsltu_vv       011010 . ..... ..... 000 ..... 1010111 @r_vm
477vmsltu_vx       011010 . ..... ..... 100 ..... 1010111 @r_vm
478vmslt_vv        011011 . ..... ..... 000 ..... 1010111 @r_vm
479vmslt_vx        011011 . ..... ..... 100 ..... 1010111 @r_vm
480vmsleu_vv       011100 . ..... ..... 000 ..... 1010111 @r_vm
481vmsleu_vx       011100 . ..... ..... 100 ..... 1010111 @r_vm
482vmsleu_vi       011100 . ..... ..... 011 ..... 1010111 @r_vm
483vmsle_vv        011101 . ..... ..... 000 ..... 1010111 @r_vm
484vmsle_vx        011101 . ..... ..... 100 ..... 1010111 @r_vm
485vmsle_vi        011101 . ..... ..... 011 ..... 1010111 @r_vm
486vmsgtu_vx       011110 . ..... ..... 100 ..... 1010111 @r_vm
487vmsgtu_vi       011110 . ..... ..... 011 ..... 1010111 @r_vm
488vmsgt_vx        011111 . ..... ..... 100 ..... 1010111 @r_vm
489vmsgt_vi        011111 . ..... ..... 011 ..... 1010111 @r_vm
490vminu_vv        000100 . ..... ..... 000 ..... 1010111 @r_vm
491vminu_vx        000100 . ..... ..... 100 ..... 1010111 @r_vm
492vmin_vv         000101 . ..... ..... 000 ..... 1010111 @r_vm
493vmin_vx         000101 . ..... ..... 100 ..... 1010111 @r_vm
494vmaxu_vv        000110 . ..... ..... 000 ..... 1010111 @r_vm
495vmaxu_vx        000110 . ..... ..... 100 ..... 1010111 @r_vm
496vmax_vv         000111 . ..... ..... 000 ..... 1010111 @r_vm
497vmax_vx         000111 . ..... ..... 100 ..... 1010111 @r_vm
498vmul_vv         100101 . ..... ..... 010 ..... 1010111 @r_vm
499vmul_vx         100101 . ..... ..... 110 ..... 1010111 @r_vm
500vmulh_vv        100111 . ..... ..... 010 ..... 1010111 @r_vm
501vmulh_vx        100111 . ..... ..... 110 ..... 1010111 @r_vm
502vmulhu_vv       100100 . ..... ..... 010 ..... 1010111 @r_vm
503vmulhu_vx       100100 . ..... ..... 110 ..... 1010111 @r_vm
504vmulhsu_vv      100110 . ..... ..... 010 ..... 1010111 @r_vm
505vmulhsu_vx      100110 . ..... ..... 110 ..... 1010111 @r_vm
506vdivu_vv        100000 . ..... ..... 010 ..... 1010111 @r_vm
507vdivu_vx        100000 . ..... ..... 110 ..... 1010111 @r_vm
508vdiv_vv         100001 . ..... ..... 010 ..... 1010111 @r_vm
509vdiv_vx         100001 . ..... ..... 110 ..... 1010111 @r_vm
510vremu_vv        100010 . ..... ..... 010 ..... 1010111 @r_vm
511vremu_vx        100010 . ..... ..... 110 ..... 1010111 @r_vm
512vrem_vv         100011 . ..... ..... 010 ..... 1010111 @r_vm
513vrem_vx         100011 . ..... ..... 110 ..... 1010111 @r_vm
514vwmulu_vv       111000 . ..... ..... 010 ..... 1010111 @r_vm
515vwmulu_vx       111000 . ..... ..... 110 ..... 1010111 @r_vm
516vwmulsu_vv      111010 . ..... ..... 010 ..... 1010111 @r_vm
517vwmulsu_vx      111010 . ..... ..... 110 ..... 1010111 @r_vm
518vwmul_vv        111011 . ..... ..... 010 ..... 1010111 @r_vm
519vwmul_vx        111011 . ..... ..... 110 ..... 1010111 @r_vm
520vmacc_vv        101101 . ..... ..... 010 ..... 1010111 @r_vm
521vmacc_vx        101101 . ..... ..... 110 ..... 1010111 @r_vm
522vnmsac_vv       101111 . ..... ..... 010 ..... 1010111 @r_vm
523vnmsac_vx       101111 . ..... ..... 110 ..... 1010111 @r_vm
524vmadd_vv        101001 . ..... ..... 010 ..... 1010111 @r_vm
525vmadd_vx        101001 . ..... ..... 110 ..... 1010111 @r_vm
526vnmsub_vv       101011 . ..... ..... 010 ..... 1010111 @r_vm
527vnmsub_vx       101011 . ..... ..... 110 ..... 1010111 @r_vm
528vwmaccu_vv      111100 . ..... ..... 010 ..... 1010111 @r_vm
529vwmaccu_vx      111100 . ..... ..... 110 ..... 1010111 @r_vm
530vwmacc_vv       111101 . ..... ..... 010 ..... 1010111 @r_vm
531vwmacc_vx       111101 . ..... ..... 110 ..... 1010111 @r_vm
532vwmaccsu_vv     111111 . ..... ..... 010 ..... 1010111 @r_vm
533vwmaccsu_vx     111111 . ..... ..... 110 ..... 1010111 @r_vm
534vwmaccus_vx     111110 . ..... ..... 110 ..... 1010111 @r_vm
535vmv_v_v         010111 1 00000 ..... 000 ..... 1010111 @r2
536vmv_v_x         010111 1 00000 ..... 100 ..... 1010111 @r2
537vmv_v_i         010111 1 00000 ..... 011 ..... 1010111 @r2
538vmerge_vvm      010111 0 ..... ..... 000 ..... 1010111 @r_vm_0
539vmerge_vxm      010111 0 ..... ..... 100 ..... 1010111 @r_vm_0
540vmerge_vim      010111 0 ..... ..... 011 ..... 1010111 @r_vm_0
541vsaddu_vv       100000 . ..... ..... 000 ..... 1010111 @r_vm
542vsaddu_vx       100000 . ..... ..... 100 ..... 1010111 @r_vm
543vsaddu_vi       100000 . ..... ..... 011 ..... 1010111 @r_vm
544vsadd_vv        100001 . ..... ..... 000 ..... 1010111 @r_vm
545vsadd_vx        100001 . ..... ..... 100 ..... 1010111 @r_vm
546vsadd_vi        100001 . ..... ..... 011 ..... 1010111 @r_vm
547vssubu_vv       100010 . ..... ..... 000 ..... 1010111 @r_vm
548vssubu_vx       100010 . ..... ..... 100 ..... 1010111 @r_vm
549vssub_vv        100011 . ..... ..... 000 ..... 1010111 @r_vm
550vssub_vx        100011 . ..... ..... 100 ..... 1010111 @r_vm
551vaadd_vv        001001 . ..... ..... 010 ..... 1010111 @r_vm
552vaadd_vx        001001 . ..... ..... 110 ..... 1010111 @r_vm
553vaaddu_vv       001000 . ..... ..... 010 ..... 1010111 @r_vm
554vaaddu_vx       001000 . ..... ..... 110 ..... 1010111 @r_vm
555vasub_vv        001011 . ..... ..... 010 ..... 1010111 @r_vm
556vasub_vx        001011 . ..... ..... 110 ..... 1010111 @r_vm
557vasubu_vv       001010 . ..... ..... 010 ..... 1010111 @r_vm
558vasubu_vx       001010 . ..... ..... 110 ..... 1010111 @r_vm
559vsmul_vv        100111 . ..... ..... 000 ..... 1010111 @r_vm
560vsmul_vx        100111 . ..... ..... 100 ..... 1010111 @r_vm
561vssrl_vv        101010 . ..... ..... 000 ..... 1010111 @r_vm
562vssrl_vx        101010 . ..... ..... 100 ..... 1010111 @r_vm
563vssrl_vi        101010 . ..... ..... 011 ..... 1010111 @r_vm
564vssra_vv        101011 . ..... ..... 000 ..... 1010111 @r_vm
565vssra_vx        101011 . ..... ..... 100 ..... 1010111 @r_vm
566vssra_vi        101011 . ..... ..... 011 ..... 1010111 @r_vm
567vnclipu_wv      101110 . ..... ..... 000 ..... 1010111 @r_vm
568vnclipu_wx      101110 . ..... ..... 100 ..... 1010111 @r_vm
569vnclipu_wi      101110 . ..... ..... 011 ..... 1010111 @r_vm
570vnclip_wv       101111 . ..... ..... 000 ..... 1010111 @r_vm
571vnclip_wx       101111 . ..... ..... 100 ..... 1010111 @r_vm
572vnclip_wi       101111 . ..... ..... 011 ..... 1010111 @r_vm
573vfadd_vv        000000 . ..... ..... 001 ..... 1010111 @r_vm
574vfadd_vf        000000 . ..... ..... 101 ..... 1010111 @r_vm
575vfsub_vv        000010 . ..... ..... 001 ..... 1010111 @r_vm
576vfsub_vf        000010 . ..... ..... 101 ..... 1010111 @r_vm
577vfrsub_vf       100111 . ..... ..... 101 ..... 1010111 @r_vm
578vfwadd_vv       110000 . ..... ..... 001 ..... 1010111 @r_vm
579vfwadd_vf       110000 . ..... ..... 101 ..... 1010111 @r_vm
580vfwadd_wv       110100 . ..... ..... 001 ..... 1010111 @r_vm
581vfwadd_wf       110100 . ..... ..... 101 ..... 1010111 @r_vm
582vfwsub_vv       110010 . ..... ..... 001 ..... 1010111 @r_vm
583vfwsub_vf       110010 . ..... ..... 101 ..... 1010111 @r_vm
584vfwsub_wv       110110 . ..... ..... 001 ..... 1010111 @r_vm
585vfwsub_wf       110110 . ..... ..... 101 ..... 1010111 @r_vm
586vfmul_vv        100100 . ..... ..... 001 ..... 1010111 @r_vm
587vfmul_vf        100100 . ..... ..... 101 ..... 1010111 @r_vm
588vfdiv_vv        100000 . ..... ..... 001 ..... 1010111 @r_vm
589vfdiv_vf        100000 . ..... ..... 101 ..... 1010111 @r_vm
590vfrdiv_vf       100001 . ..... ..... 101 ..... 1010111 @r_vm
591vfwmul_vv       111000 . ..... ..... 001 ..... 1010111 @r_vm
592vfwmul_vf       111000 . ..... ..... 101 ..... 1010111 @r_vm
593vfmacc_vv       101100 . ..... ..... 001 ..... 1010111 @r_vm
594vfnmacc_vv      101101 . ..... ..... 001 ..... 1010111 @r_vm
595vfnmacc_vf      101101 . ..... ..... 101 ..... 1010111 @r_vm
596vfmacc_vf       101100 . ..... ..... 101 ..... 1010111 @r_vm
597vfmsac_vv       101110 . ..... ..... 001 ..... 1010111 @r_vm
598vfmsac_vf       101110 . ..... ..... 101 ..... 1010111 @r_vm
599vfnmsac_vv      101111 . ..... ..... 001 ..... 1010111 @r_vm
600vfnmsac_vf      101111 . ..... ..... 101 ..... 1010111 @r_vm
601vfmadd_vv       101000 . ..... ..... 001 ..... 1010111 @r_vm
602vfmadd_vf       101000 . ..... ..... 101 ..... 1010111 @r_vm
603vfnmadd_vv      101001 . ..... ..... 001 ..... 1010111 @r_vm
604vfnmadd_vf      101001 . ..... ..... 101 ..... 1010111 @r_vm
605vfmsub_vv       101010 . ..... ..... 001 ..... 1010111 @r_vm
606vfmsub_vf       101010 . ..... ..... 101 ..... 1010111 @r_vm
607vfnmsub_vv      101011 . ..... ..... 001 ..... 1010111 @r_vm
608vfnmsub_vf      101011 . ..... ..... 101 ..... 1010111 @r_vm
609vfwmacc_vv      111100 . ..... ..... 001 ..... 1010111 @r_vm
610vfwmacc_vf      111100 . ..... ..... 101 ..... 1010111 @r_vm
611vfwnmacc_vv     111101 . ..... ..... 001 ..... 1010111 @r_vm
612vfwnmacc_vf     111101 . ..... ..... 101 ..... 1010111 @r_vm
613vfwmsac_vv      111110 . ..... ..... 001 ..... 1010111 @r_vm
614vfwmsac_vf      111110 . ..... ..... 101 ..... 1010111 @r_vm
615vfwnmsac_vv     111111 . ..... ..... 001 ..... 1010111 @r_vm
616vfwnmsac_vf     111111 . ..... ..... 101 ..... 1010111 @r_vm
617vfsqrt_v        010011 . ..... 00000 001 ..... 1010111 @r2_vm
618vfrsqrt7_v      010011 . ..... 00100 001 ..... 1010111 @r2_vm
619vfrec7_v        010011 . ..... 00101 001 ..... 1010111 @r2_vm
620vfmin_vv        000100 . ..... ..... 001 ..... 1010111 @r_vm
621vfmin_vf        000100 . ..... ..... 101 ..... 1010111 @r_vm
622vfmax_vv        000110 . ..... ..... 001 ..... 1010111 @r_vm
623vfmax_vf        000110 . ..... ..... 101 ..... 1010111 @r_vm
624vfsgnj_vv       001000 . ..... ..... 001 ..... 1010111 @r_vm
625vfsgnj_vf       001000 . ..... ..... 101 ..... 1010111 @r_vm
626vfsgnjn_vv      001001 . ..... ..... 001 ..... 1010111 @r_vm
627vfsgnjn_vf      001001 . ..... ..... 101 ..... 1010111 @r_vm
628vfsgnjx_vv      001010 . ..... ..... 001 ..... 1010111 @r_vm
629vfsgnjx_vf      001010 . ..... ..... 101 ..... 1010111 @r_vm
630vfslide1up_vf   001110 . ..... ..... 101 ..... 1010111 @r_vm
631vfslide1down_vf 001111 . ..... ..... 101 ..... 1010111 @r_vm
632vmfeq_vv        011000 . ..... ..... 001 ..... 1010111 @r_vm
633vmfeq_vf        011000 . ..... ..... 101 ..... 1010111 @r_vm
634vmfne_vv        011100 . ..... ..... 001 ..... 1010111 @r_vm
635vmfne_vf        011100 . ..... ..... 101 ..... 1010111 @r_vm
636vmflt_vv        011011 . ..... ..... 001 ..... 1010111 @r_vm
637vmflt_vf        011011 . ..... ..... 101 ..... 1010111 @r_vm
638vmfle_vv        011001 . ..... ..... 001 ..... 1010111 @r_vm
639vmfle_vf        011001 . ..... ..... 101 ..... 1010111 @r_vm
640vmfgt_vf        011101 . ..... ..... 101 ..... 1010111 @r_vm
641vmfge_vf        011111 . ..... ..... 101 ..... 1010111 @r_vm
642vfclass_v       010011 . ..... 10000 001 ..... 1010111 @r2_vm
643vfmerge_vfm     010111 0 ..... ..... 101 ..... 1010111 @r_vm_0
644vfmv_v_f        010111 1 00000 ..... 101 ..... 1010111 @r2
645
646vfcvt_xu_f_v       010010 . ..... 00000 001 ..... 1010111 @r2_vm
647vfcvt_x_f_v        010010 . ..... 00001 001 ..... 1010111 @r2_vm
648vfcvt_f_xu_v       010010 . ..... 00010 001 ..... 1010111 @r2_vm
649vfcvt_f_x_v        010010 . ..... 00011 001 ..... 1010111 @r2_vm
650vfcvt_rtz_xu_f_v   010010 . ..... 00110 001 ..... 1010111 @r2_vm
651vfcvt_rtz_x_f_v    010010 . ..... 00111 001 ..... 1010111 @r2_vm
652
653vfwcvt_xu_f_v      010010 . ..... 01000 001 ..... 1010111 @r2_vm
654vfwcvt_x_f_v       010010 . ..... 01001 001 ..... 1010111 @r2_vm
655vfwcvt_f_xu_v      010010 . ..... 01010 001 ..... 1010111 @r2_vm
656vfwcvt_f_x_v       010010 . ..... 01011 001 ..... 1010111 @r2_vm
657vfwcvt_f_f_v       010010 . ..... 01100 001 ..... 1010111 @r2_vm
658vfwcvt_rtz_xu_f_v  010010 . ..... 01110 001 ..... 1010111 @r2_vm
659vfwcvt_rtz_x_f_v   010010 . ..... 01111 001 ..... 1010111 @r2_vm
660
661vfncvt_xu_f_w      010010 . ..... 10000 001 ..... 1010111 @r2_vm
662vfncvt_x_f_w       010010 . ..... 10001 001 ..... 1010111 @r2_vm
663vfncvt_f_xu_w      010010 . ..... 10010 001 ..... 1010111 @r2_vm
664vfncvt_f_x_w       010010 . ..... 10011 001 ..... 1010111 @r2_vm
665vfncvt_f_f_w       010010 . ..... 10100 001 ..... 1010111 @r2_vm
666vfncvt_rod_f_f_w   010010 . ..... 10101 001 ..... 1010111 @r2_vm
667vfncvt_rtz_xu_f_w  010010 . ..... 10110 001 ..... 1010111 @r2_vm
668vfncvt_rtz_x_f_w   010010 . ..... 10111 001 ..... 1010111 @r2_vm
669
670vredsum_vs      000000 . ..... ..... 010 ..... 1010111 @r_vm
671vredand_vs      000001 . ..... ..... 010 ..... 1010111 @r_vm
672vredor_vs       000010 . ..... ..... 010 ..... 1010111 @r_vm
673vredxor_vs      000011 . ..... ..... 010 ..... 1010111 @r_vm
674vredminu_vs     000100 . ..... ..... 010 ..... 1010111 @r_vm
675vredmin_vs      000101 . ..... ..... 010 ..... 1010111 @r_vm
676vredmaxu_vs     000110 . ..... ..... 010 ..... 1010111 @r_vm
677vredmax_vs      000111 . ..... ..... 010 ..... 1010111 @r_vm
678vwredsumu_vs    110000 . ..... ..... 000 ..... 1010111 @r_vm
679vwredsum_vs     110001 . ..... ..... 000 ..... 1010111 @r_vm
680# Vector ordered and unordered reduction sum
681vfredusum_vs    000001 . ..... ..... 001 ..... 1010111 @r_vm
682vfredosum_vs    000011 . ..... ..... 001 ..... 1010111 @r_vm
683vfredmin_vs     000101 . ..... ..... 001 ..... 1010111 @r_vm
684vfredmax_vs     000111 . ..... ..... 001 ..... 1010111 @r_vm
685# Vector widening ordered and unordered float reduction sum
686vfwredusum_vs   110001 . ..... ..... 001 ..... 1010111 @r_vm
687vfwredosum_vs   110011 . ..... ..... 001 ..... 1010111 @r_vm
688vmand_mm        011001 - ..... ..... 010 ..... 1010111 @r
689vmnand_mm       011101 - ..... ..... 010 ..... 1010111 @r
690vmandn_mm       011000 - ..... ..... 010 ..... 1010111 @r
691vmxor_mm        011011 - ..... ..... 010 ..... 1010111 @r
692vmor_mm         011010 - ..... ..... 010 ..... 1010111 @r
693vmnor_mm        011110 - ..... ..... 010 ..... 1010111 @r
694vmorn_mm        011100 - ..... ..... 010 ..... 1010111 @r
695vmxnor_mm       011111 - ..... ..... 010 ..... 1010111 @r
696vcpop_m         010000 . ..... 10000 010 ..... 1010111 @r2_vm
697vfirst_m        010000 . ..... 10001 010 ..... 1010111 @r2_vm
698vmsbf_m         010100 . ..... 00001 010 ..... 1010111 @r2_vm
699vmsif_m         010100 . ..... 00011 010 ..... 1010111 @r2_vm
700vmsof_m         010100 . ..... 00010 010 ..... 1010111 @r2_vm
701viota_m         010100 . ..... 10000 010 ..... 1010111 @r2_vm
702vid_v           010100 . 00000 10001 010 ..... 1010111 @r1_vm
703vmv_x_s         010000 1 ..... 00000 010 ..... 1010111 @r2rd
704vmv_s_x         010000 1 00000 ..... 110 ..... 1010111 @r2
705vfmv_f_s        010000 1 ..... 00000 001 ..... 1010111 @r2rd
706vfmv_s_f        010000 1 00000 ..... 101 ..... 1010111 @r2
707vslideup_vx     001110 . ..... ..... 100 ..... 1010111 @r_vm
708vslideup_vi     001110 . ..... ..... 011 ..... 1010111 @r_vm
709vslide1up_vx    001110 . ..... ..... 110 ..... 1010111 @r_vm
710vslidedown_vx   001111 . ..... ..... 100 ..... 1010111 @r_vm
711vslidedown_vi   001111 . ..... ..... 011 ..... 1010111 @r_vm
712vslide1down_vx  001111 . ..... ..... 110 ..... 1010111 @r_vm
713vrgather_vv     001100 . ..... ..... 000 ..... 1010111 @r_vm
714vrgatherei16_vv 001110 . ..... ..... 000 ..... 1010111 @r_vm
715vrgather_vx     001100 . ..... ..... 100 ..... 1010111 @r_vm
716vrgather_vi     001100 . ..... ..... 011 ..... 1010111 @r_vm
717vcompress_vm    010111 - ..... ..... 010 ..... 1010111 @r
718vmv1r_v         100111 1 ..... 00000 011 ..... 1010111 @r2rd
719vmv2r_v         100111 1 ..... 00001 011 ..... 1010111 @r2rd
720vmv4r_v         100111 1 ..... 00011 011 ..... 1010111 @r2rd
721vmv8r_v         100111 1 ..... 00111 011 ..... 1010111 @r2rd
722
723# Vector Integer Extension
724vzext_vf2       010010 . ..... 00110 010 ..... 1010111 @r2_vm
725vzext_vf4       010010 . ..... 00100 010 ..... 1010111 @r2_vm
726vzext_vf8       010010 . ..... 00010 010 ..... 1010111 @r2_vm
727vsext_vf2       010010 . ..... 00111 010 ..... 1010111 @r2_vm
728vsext_vf4       010010 . ..... 00101 010 ..... 1010111 @r2_vm
729vsext_vf8       010010 . ..... 00011 010 ..... 1010111 @r2_vm
730
731vsetvli         0 ........... ..... 111 ..... 1010111  @r2_zimm11
732vsetivli        11 .......... ..... 111 ..... 1010111  @r2_zimm10
733vsetvl          1000000 ..... ..... 111 ..... 1010111  @r
734
735# *** Zawrs Standard Extension ***
736wrs_nto    000000001101 00000 000 00000 1110011
737wrs_sto    000000011101 00000 000 00000 1110011
738
739# *** RV32 Zba Standard Extension ***
740sh1add     0010000 .......... 010 ..... 0110011 @r
741sh2add     0010000 .......... 100 ..... 0110011 @r
742sh3add     0010000 .......... 110 ..... 0110011 @r
743
744# *** RV64 Zba Standard Extension (in addition to RV32 Zba) ***
745add_uw     0000100 .......... 000 ..... 0111011 @r
746sh1add_uw  0010000 .......... 010 ..... 0111011 @r
747sh2add_uw  0010000 .......... 100 ..... 0111011 @r
748sh3add_uw  0010000 .......... 110 ..... 0111011 @r
749slli_uw    00001 ............ 001 ..... 0011011 @sh
750
751# *** RV32 Zbb/Zbkb Standard Extension ***
752andn       0100000 .......... 111 ..... 0110011 @r
753rol        0110000 .......... 001 ..... 0110011 @r
754ror        0110000 .......... 101 ..... 0110011 @r
755rori       01100 ............ 101 ..... 0010011 @sh
756# The encoding for rev8 differs between RV32 and RV64.
757# rev8_32 denotes the RV32 variant.
758rev8_32    011010 011000 ..... 101 ..... 0010011 @r2
759# The encoding for zext.h differs between RV32 and RV64.
760# zext_h_32 denotes the RV32 variant.
761{
762  zext_h_32  0000100 00000 ..... 100 ..... 0110011 @r2
763  pack       0000100 ..... ..... 100 ..... 0110011 @r
764}
765xnor       0100000 .......... 100 ..... 0110011 @r
766# *** RV32 extra Zbb Standard Extension ***
767clz        011000 000000 ..... 001 ..... 0010011 @r2
768cpop       011000 000010 ..... 001 ..... 0010011 @r2
769ctz        011000 000001 ..... 001 ..... 0010011 @r2
770max        0000101 .......... 110 ..... 0110011 @r
771maxu       0000101 .......... 111 ..... 0110011 @r
772min        0000101 .......... 100 ..... 0110011 @r
773minu       0000101 .......... 101 ..... 0110011 @r
774orc_b      001010 000111 ..... 101 ..... 0010011 @r2
775orn        0100000 .......... 110 ..... 0110011 @r
776sext_b     011000 000100 ..... 001 ..... 0010011 @r2
777sext_h     011000 000101 ..... 001 ..... 0010011 @r2
778# *** RV32 extra Zbkb Standard Extension ***
779brev8      0110100 00111 ..... 101 ..... 0010011 @r2  #grevi
780packh      0000100  .......... 111 ..... 0110011 @r
781unzip      0000100 01111 ..... 101 ..... 0010011 @r2  #unshfl
782zip        0000100 01111 ..... 001 ..... 0010011 @r2  #shfl
783
784# *** RV64 Zbb/Zbkb Standard Extension (in addition to RV32 Zbb/Zbkb) ***
785# The encoding for rev8 differs between RV32 and RV64.
786# When executing on RV64, the encoding used in RV32 is an illegal
787# instruction, so we use different handler functions to differentiate.
788rev8_64    011010 111000 ..... 101 ..... 0010011 @r2
789rolw       0110000 .......... 001 ..... 0111011 @r
790roriw      0110000 .......... 101 ..... 0011011 @sh5
791rorw       0110000 .......... 101 ..... 0111011 @r
792# The encoding for zext.h differs between RV32 and RV64.
793# When executing on RV64, the encoding used in RV32 is an illegal
794# instruction, so we use different handler functions to differentiate.
795{
796  zext_h_64  0000100 00000 ..... 100 ..... 0111011 @r2
797  packw      0000100 ..... ..... 100 ..... 0111011 @r
798}
799# *** RV64 extra Zbb Standard Extension (in addition to RV32 Zbb) ***
800clzw       0110000 00000 ..... 001 ..... 0011011 @r2
801ctzw       0110000 00001 ..... 001 ..... 0011011 @r2
802cpopw      0110000 00010 ..... 001 ..... 0011011 @r2
803
804# *** RV32 Zbc/Zbkc Standard Extension ***
805clmul      0000101 .......... 001 ..... 0110011 @r
806clmulh     0000101 .......... 011 ..... 0110011 @r
807# *** RV32 extra Zbc Standard Extension ***
808clmulr     0000101 .......... 010 ..... 0110011 @r
809
810# *** RV32 Zbkx Standard Extension ***
811xperm4     0010100 .......... 010 ..... 0110011 @r
812xperm8     0010100 .......... 100 ..... 0110011 @r
813
814# *** RV32 Zbs Standard Extension ***
815bclr       0100100 .......... 001 ..... 0110011 @r
816bclri      01001. ........... 001 ..... 0010011 @sh
817bext       0100100 .......... 101 ..... 0110011 @r
818bexti      01001. ........... 101 ..... 0010011 @sh
819binv       0110100 .......... 001 ..... 0110011 @r
820binvi      01101. ........... 001 ..... 0010011 @sh
821bset       0010100 .......... 001 ..... 0110011 @r
822bseti      00101. ........... 001 ..... 0010011 @sh
823
824# *** Zfa Standard Extension ***
825fli_s       1111000 00001 ..... 000 ..... 1010011 @r2
826fli_d       1111001 00001 ..... 000 ..... 1010011 @r2
827fli_h       1111010 00001 ..... 000 ..... 1010011 @r2
828fminm_s     0010100 ..... ..... 010 ..... 1010011 @r
829fmaxm_s     0010100 ..... ..... 011 ..... 1010011 @r
830fminm_d     0010101 ..... ..... 010 ..... 1010011 @r
831fmaxm_d     0010101 ..... ..... 011 ..... 1010011 @r
832fminm_h     0010110 ..... ..... 010 ..... 1010011 @r
833fmaxm_h     0010110 ..... ..... 011 ..... 1010011 @r
834fround_s    0100000 00100 ..... ... ..... 1010011 @r2_rm
835froundnx_s  0100000 00101 ..... ... ..... 1010011 @r2_rm
836fround_d    0100001 00100 ..... ... ..... 1010011 @r2_rm
837froundnx_d  0100001 00101 ..... ... ..... 1010011 @r2_rm
838fround_h    0100010 00100 ..... ... ..... 1010011 @r2_rm
839froundnx_h  0100010 00101 ..... ... ..... 1010011 @r2_rm
840fcvtmod_w_d 1100001 01000 ..... 001 ..... 1010011 @r2
841fmvh_x_d    1110001 00001 ..... 000 ..... 1010011 @r2
842fmvp_d_x    1011001 ..... ..... 000 ..... 1010011 @r
843fleq_s      1010000 ..... ..... 100 ..... 1010011 @r
844fltq_s      1010000 ..... ..... 101 ..... 1010011 @r
845fleq_d      1010001 ..... ..... 100 ..... 1010011 @r
846fltq_d      1010001 ..... ..... 101 ..... 1010011 @r
847fleq_h      1010010 ..... ..... 100 ..... 1010011 @r
848fltq_h      1010010 ..... ..... 101 ..... 1010011 @r
849
850# *** RV32 Zfh Extension ***
851flh        ............   ..... 001 ..... 0000111 @i
852fsh        .......  ..... ..... 001 ..... 0100111 @s
853fmadd_h    ..... 10 ..... ..... ... ..... 1000011 @r4_rm
854fmsub_h    ..... 10 ..... ..... ... ..... 1000111 @r4_rm
855fnmsub_h   ..... 10 ..... ..... ... ..... 1001011 @r4_rm
856fnmadd_h   ..... 10 ..... ..... ... ..... 1001111 @r4_rm
857fadd_h     0000010  ..... ..... ... ..... 1010011 @r_rm
858fsub_h     0000110  ..... ..... ... ..... 1010011 @r_rm
859fmul_h     0001010  ..... ..... ... ..... 1010011 @r_rm
860fdiv_h     0001110  ..... ..... ... ..... 1010011 @r_rm
861fsqrt_h    0101110  00000 ..... ... ..... 1010011 @r2_rm
862fsgnj_h    0010010  ..... ..... 000 ..... 1010011 @r
863fsgnjn_h   0010010  ..... ..... 001 ..... 1010011 @r
864fsgnjx_h   0010010  ..... ..... 010 ..... 1010011 @r
865fmin_h     0010110  ..... ..... 000 ..... 1010011 @r
866fmax_h     0010110  ..... ..... 001 ..... 1010011 @r
867fcvt_h_s   0100010  00000 ..... ... ..... 1010011 @r2_rm
868fcvt_s_h   0100000  00010 ..... ... ..... 1010011 @r2_rm
869fcvt_h_d   0100010  00001 ..... ... ..... 1010011 @r2_rm
870fcvt_d_h   0100001  00010 ..... ... ..... 1010011 @r2_rm
871fcvt_w_h   1100010  00000 ..... ... ..... 1010011 @r2_rm
872fcvt_wu_h  1100010  00001 ..... ... ..... 1010011 @r2_rm
873fmv_x_h    1110010  00000 ..... 000 ..... 1010011 @r2
874feq_h      1010010  ..... ..... 010 ..... 1010011 @r
875flt_h      1010010  ..... ..... 001 ..... 1010011 @r
876fle_h      1010010  ..... ..... 000 ..... 1010011 @r
877fclass_h   1110010  00000 ..... 001 ..... 1010011 @r2
878fcvt_h_w   1101010  00000 ..... ... ..... 1010011 @r2_rm
879fcvt_h_wu  1101010  00001 ..... ... ..... 1010011 @r2_rm
880fmv_h_x    1111010  00000 ..... 000 ..... 1010011 @r2
881
882# *** RV64 Zfh Extension (in addition to RV32 Zfh) ***
883fcvt_l_h   1100010  00010 ..... ... ..... 1010011 @r2_rm
884fcvt_lu_h  1100010  00011 ..... ... ..... 1010011 @r2_rm
885fcvt_h_l   1101010  00010 ..... ... ..... 1010011 @r2_rm
886fcvt_h_lu  1101010  00011 ..... ... ..... 1010011 @r2_rm
887
888# *** Svinval Standard Extension ***
889sinval_vma        0001011 ..... ..... 000 00000 1110011 @sfence_vma
890sfence_w_inval    0001100 00000 00000 000 00000 1110011
891sfence_inval_ir   0001100 00001 00000 000 00000 1110011
892hinval_vvma       0010011 ..... ..... 000 00000 1110011 @hfence_vvma
893hinval_gvma       0110011 ..... ..... 000 00000 1110011 @hfence_gvma
894
895# *** RV32 Zknd Standard Extension ***
896aes32dsmi   .. 10111 ..... ..... 000 ..... 0110011 @k_aes
897aes32dsi    .. 10101 ..... ..... 000 ..... 0110011 @k_aes
898# *** RV64 Zknd Standard Extension ***
899aes64dsm    00 11111 ..... ..... 000 ..... 0110011 @r
900aes64ds     00 11101 ..... ..... 000 ..... 0110011 @r
901aes64im     00 11000 00000 ..... 001 ..... 0010011 @r2
902# *** RV32 Zkne Standard Extension ***
903aes32esmi   .. 10011 ..... ..... 000 ..... 0110011 @k_aes
904aes32esi    .. 10001 ..... ..... 000 ..... 0110011 @k_aes
905# *** RV64 Zkne Standard Extension ***
906aes64es     00 11001 ..... ..... 000 ..... 0110011 @r
907aes64esm    00 11011 ..... ..... 000 ..... 0110011 @r
908# *** RV64 Zkne/zknd Standard Extension ***
909aes64ks2    01 11111 ..... ..... 000 ..... 0110011 @r
910aes64ks1i   00 11000 1.... ..... 001 ..... 0010011 @i_aes
911# *** RV32 Zknh Standard Extension ***
912sha256sig0  00 01000 00010 ..... 001 ..... 0010011 @r2
913sha256sig1  00 01000 00011 ..... 001 ..... 0010011 @r2
914sha256sum0  00 01000 00000 ..... 001 ..... 0010011 @r2
915sha256sum1  00 01000 00001 ..... 001 ..... 0010011 @r2
916sha512sum0r 01 01000 ..... ..... 000 ..... 0110011 @r
917sha512sum1r 01 01001 ..... ..... 000 ..... 0110011 @r
918sha512sig0l 01 01010 ..... ..... 000 ..... 0110011 @r
919sha512sig0h 01 01110 ..... ..... 000 ..... 0110011 @r
920sha512sig1l 01 01011 ..... ..... 000 ..... 0110011 @r
921sha512sig1h 01 01111 ..... ..... 000 ..... 0110011 @r
922# *** RV64 Zknh Standard Extension ***
923sha512sig0  00 01000 00110 ..... 001 ..... 0010011 @r2
924sha512sig1  00 01000 00111 ..... 001 ..... 0010011 @r2
925sha512sum0  00 01000 00100 ..... 001 ..... 0010011 @r2
926sha512sum1  00 01000 00101 ..... 001 ..... 0010011 @r2
927# *** RV32 Zksh Standard Extension ***
928sm3p0       00 01000 01000 ..... 001 ..... 0010011 @r2
929sm3p1       00 01000 01001 ..... 001 ..... 0010011 @r2
930# *** RV32 Zksed Standard Extension ***
931sm4ed       .. 11000 ..... ..... 000 ..... 0110011 @k_aes
932sm4ks       .. 11010 ..... ..... 000 ..... 0110011 @k_aes
933
934# *** RV32 Zicond Standard Extension ***
935czero_eqz   0000111  ..... ..... 101 ..... 0110011 @r
936czero_nez   0000111  ..... ..... 111 ..... 0110011 @r
937
938# *** Zfbfmin Standard Extension ***
939fcvt_bf16_s       0100010  01000 ..... ... ..... 1010011 @r2_rm
940fcvt_s_bf16       0100000  00110 ..... ... ..... 1010011 @r2_rm
941
942# *** Zvfbfmin Standard Extension ***
943vfncvtbf16_f_f_w  010010 . ..... 11101 001 ..... 1010111 @r2_vm
944vfwcvtbf16_f_f_v  010010 . ..... 01101 001 ..... 1010111 @r2_vm
945
946# *** Zvfbfwma Standard Extension ***
947vfwmaccbf16_vv    111011 . ..... ..... 001 ..... 1010111 @r_vm
948vfwmaccbf16_vf    111011 . ..... ..... 101 ..... 1010111 @r_vm
949