xref: /openbmc/qemu/target/riscv/insn32.decode (revision 2843420a)
1#
2# RISC-V translation routines for the RVXI Base Integer Instruction Set.
3#
4# Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de
5#                    Bastian Koppelmann, kbastian@mail.uni-paderborn.de
6#
7# This program is free software; you can redistribute it and/or modify it
8# under the terms and conditions of the GNU General Public License,
9# version 2 or later, as published by the Free Software Foundation.
10#
11# This program is distributed in the hope it will be useful, but WITHOUT
12# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14# more details.
15#
16# You should have received a copy of the GNU General Public License along with
17# this program.  If not, see <http://www.gnu.org/licenses/>.
18
19# Fields:
20%rs3       27:5
21%rs2       20:5
22%rs1       15:5
23%rd        7:5
24
25%sh10    20:10
26%csr    20:12
27%rm     12:3
28%nf     29:3                     !function=ex_plus_1
29
30# immediates:
31%imm_i    20:s12
32%imm_s    25:s7 7:5
33%imm_b    31:s1 7:1 25:6 8:4     !function=ex_shift_1
34%imm_j    31:s1 12:8 20:1 21:10  !function=ex_shift_1
35%imm_u    12:s20                 !function=ex_shift_12
36
37# Argument sets:
38&empty
39&b    imm rs2 rs1
40&i    imm rs1 rd
41&j    imm rd
42&r    rd rs1 rs2
43&s    imm rs1 rs2
44&u    imm rd
45&shift     shamt rs1 rd
46&atomic    aq rl rs2 rs1 rd
47&rmrr      vm rd rs1 rs2
48&rmr       vm rd rs2
49&rwdvm     vm wd rd rs1 rs2
50&r2nfvm    vm rd rs1 nf
51&rnfvm     vm rd rs1 rs2 nf
52
53# Formats 32:
54@r       .......   ..... ..... ... ..... ....... &r                %rs2 %rs1 %rd
55@i       ............    ..... ... ..... ....... &i      imm=%imm_i     %rs1 %rd
56@b       .......   ..... ..... ... ..... ....... &b      imm=%imm_b %rs2 %rs1
57@s       .......   ..... ..... ... ..... ....... &s      imm=%imm_s %rs2 %rs1
58@u       ....................      ..... ....... &u      imm=%imm_u          %rd
59@j       ....................      ..... ....... &j      imm=%imm_j          %rd
60
61@sh      ......  ...... .....  ... ..... ....... &shift  shamt=%sh10      %rs1 %rd
62@csr     ............   .....  ... ..... .......               %csr     %rs1 %rd
63
64@atom_ld ..... aq:1 rl:1 ..... ........ ..... ....... &atomic rs2=0     %rs1 %rd
65@atom_st ..... aq:1 rl:1 ..... ........ ..... ....... &atomic %rs2      %rs1 %rd
66
67@r4_rm   ..... ..  ..... ..... ... ..... ....... %rs3 %rs2 %rs1 %rm %rd
68@r_rm    .......   ..... ..... ... ..... ....... %rs2 %rs1 %rm %rd
69@r2_rm   .......   ..... ..... ... ..... ....... %rs1 %rm %rd
70@r2      .......   ..... ..... ... ..... ....... %rs1 %rd
71@r2_nfvm ... ... vm:1 ..... ..... ... ..... ....... &r2nfvm %nf %rs1 %rd
72@r2_vm   ...... vm:1 ..... ..... ... ..... ....... &rmr %rs2 %rd
73@r1_vm   ...... vm:1 ..... ..... ... ..... ....... %rd
74@r_nfvm  ... ... vm:1 ..... ..... ... ..... ....... &rnfvm %nf %rs2 %rs1 %rd
75@r2rd    .......   ..... ..... ... ..... ....... %rs2 %rd
76@r_vm    ...... vm:1 ..... ..... ... ..... ....... &rmrr %rs2 %rs1 %rd
77@r_vm_1  ...... . ..... ..... ... ..... .......    &rmrr vm=1 %rs2 %rs1 %rd
78@r_vm_0  ...... . ..... ..... ... ..... .......    &rmrr vm=0 %rs2 %rs1 %rd
79@r_wdvm  ..... wd:1 vm:1 ..... ..... ... ..... ....... &rwdvm %rs2 %rs1 %rd
80@r2_zimm . zimm:11  ..... ... ..... ....... %rs1 %rd
81
82@hfence_gvma ....... ..... .....   ... ..... ....... %rs2 %rs1
83@hfence_vvma ....... ..... .....   ... ..... ....... %rs2 %rs1
84
85@sfence_vma ....... ..... .....   ... ..... ....... %rs2 %rs1
86@sfence_vm  ....... ..... .....   ... ..... ....... %rs1
87
88
89# *** Privileged Instructions ***
90ecall       000000000000     00000 000 00000 1110011
91ebreak      000000000001     00000 000 00000 1110011
92uret        0000000    00010 00000 000 00000 1110011
93sret        0001000    00010 00000 000 00000 1110011
94mret        0011000    00010 00000 000 00000 1110011
95wfi         0001000    00101 00000 000 00000 1110011
96sfence_vma  0001001    ..... ..... 000 00000 1110011 @sfence_vma
97sfence_vm   0001000    00100 ..... 000 00000 1110011 @sfence_vm
98
99# *** RV32I Base Instruction Set ***
100lui      ....................       ..... 0110111 @u
101auipc    ....................       ..... 0010111 @u
102jal      ....................       ..... 1101111 @j
103jalr     ............     ..... 000 ..... 1100111 @i
104beq      ....... .....    ..... 000 ..... 1100011 @b
105bne      ....... .....    ..... 001 ..... 1100011 @b
106blt      ....... .....    ..... 100 ..... 1100011 @b
107bge      ....... .....    ..... 101 ..... 1100011 @b
108bltu     ....... .....    ..... 110 ..... 1100011 @b
109bgeu     ....... .....    ..... 111 ..... 1100011 @b
110lb       ............     ..... 000 ..... 0000011 @i
111lh       ............     ..... 001 ..... 0000011 @i
112lw       ............     ..... 010 ..... 0000011 @i
113lbu      ............     ..... 100 ..... 0000011 @i
114lhu      ............     ..... 101 ..... 0000011 @i
115sb       .......  .....   ..... 000 ..... 0100011 @s
116sh       .......  .....   ..... 001 ..... 0100011 @s
117sw       .......  .....   ..... 010 ..... 0100011 @s
118addi     ............     ..... 000 ..... 0010011 @i
119slti     ............     ..... 010 ..... 0010011 @i
120sltiu    ............     ..... 011 ..... 0010011 @i
121xori     ............     ..... 100 ..... 0010011 @i
122ori      ............     ..... 110 ..... 0010011 @i
123andi     ............     ..... 111 ..... 0010011 @i
124slli     00.... ......    ..... 001 ..... 0010011 @sh
125srli     00.... ......    ..... 101 ..... 0010011 @sh
126srai     01.... ......    ..... 101 ..... 0010011 @sh
127add      0000000 .....    ..... 000 ..... 0110011 @r
128sub      0100000 .....    ..... 000 ..... 0110011 @r
129sll      0000000 .....    ..... 001 ..... 0110011 @r
130slt      0000000 .....    ..... 010 ..... 0110011 @r
131sltu     0000000 .....    ..... 011 ..... 0110011 @r
132xor      0000000 .....    ..... 100 ..... 0110011 @r
133srl      0000000 .....    ..... 101 ..... 0110011 @r
134sra      0100000 .....    ..... 101 ..... 0110011 @r
135or       0000000 .....    ..... 110 ..... 0110011 @r
136and      0000000 .....    ..... 111 ..... 0110011 @r
137fence    ---- pred:4 succ:4 ----- 000 ----- 0001111
138fence_i  ---- ----   ----   ----- 001 ----- 0001111
139csrrw    ............     ..... 001 ..... 1110011 @csr
140csrrs    ............     ..... 010 ..... 1110011 @csr
141csrrc    ............     ..... 011 ..... 1110011 @csr
142csrrwi   ............     ..... 101 ..... 1110011 @csr
143csrrsi   ............     ..... 110 ..... 1110011 @csr
144csrrci   ............     ..... 111 ..... 1110011 @csr
145
146# *** RV32M Standard Extension ***
147mul      0000001 .....  ..... 000 ..... 0110011 @r
148mulh     0000001 .....  ..... 001 ..... 0110011 @r
149mulhsu   0000001 .....  ..... 010 ..... 0110011 @r
150mulhu    0000001 .....  ..... 011 ..... 0110011 @r
151div      0000001 .....  ..... 100 ..... 0110011 @r
152divu     0000001 .....  ..... 101 ..... 0110011 @r
153rem      0000001 .....  ..... 110 ..... 0110011 @r
154remu     0000001 .....  ..... 111 ..... 0110011 @r
155
156# *** RV32A Standard Extension ***
157lr_w       00010 . . 00000 ..... 010 ..... 0101111 @atom_ld
158sc_w       00011 . . ..... ..... 010 ..... 0101111 @atom_st
159amoswap_w  00001 . . ..... ..... 010 ..... 0101111 @atom_st
160amoadd_w   00000 . . ..... ..... 010 ..... 0101111 @atom_st
161amoxor_w   00100 . . ..... ..... 010 ..... 0101111 @atom_st
162amoand_w   01100 . . ..... ..... 010 ..... 0101111 @atom_st
163amoor_w    01000 . . ..... ..... 010 ..... 0101111 @atom_st
164amomin_w   10000 . . ..... ..... 010 ..... 0101111 @atom_st
165amomax_w   10100 . . ..... ..... 010 ..... 0101111 @atom_st
166amominu_w  11000 . . ..... ..... 010 ..... 0101111 @atom_st
167amomaxu_w  11100 . . ..... ..... 010 ..... 0101111 @atom_st
168
169# *** RV32F Standard Extension ***
170flw        ............   ..... 010 ..... 0000111 @i
171fsw        .......  ..... ..... 010 ..... 0100111 @s
172fmadd_s    ..... 00 ..... ..... ... ..... 1000011 @r4_rm
173fmsub_s    ..... 00 ..... ..... ... ..... 1000111 @r4_rm
174fnmsub_s   ..... 00 ..... ..... ... ..... 1001011 @r4_rm
175fnmadd_s   ..... 00 ..... ..... ... ..... 1001111 @r4_rm
176fadd_s     0000000  ..... ..... ... ..... 1010011 @r_rm
177fsub_s     0000100  ..... ..... ... ..... 1010011 @r_rm
178fmul_s     0001000  ..... ..... ... ..... 1010011 @r_rm
179fdiv_s     0001100  ..... ..... ... ..... 1010011 @r_rm
180fsqrt_s    0101100  00000 ..... ... ..... 1010011 @r2_rm
181fsgnj_s    0010000  ..... ..... 000 ..... 1010011 @r
182fsgnjn_s   0010000  ..... ..... 001 ..... 1010011 @r
183fsgnjx_s   0010000  ..... ..... 010 ..... 1010011 @r
184fmin_s     0010100  ..... ..... 000 ..... 1010011 @r
185fmax_s     0010100  ..... ..... 001 ..... 1010011 @r
186fcvt_w_s   1100000  00000 ..... ... ..... 1010011 @r2_rm
187fcvt_wu_s  1100000  00001 ..... ... ..... 1010011 @r2_rm
188fmv_x_w    1110000  00000 ..... 000 ..... 1010011 @r2
189feq_s      1010000  ..... ..... 010 ..... 1010011 @r
190flt_s      1010000  ..... ..... 001 ..... 1010011 @r
191fle_s      1010000  ..... ..... 000 ..... 1010011 @r
192fclass_s   1110000  00000 ..... 001 ..... 1010011 @r2
193fcvt_s_w   1101000  00000 ..... ... ..... 1010011 @r2_rm
194fcvt_s_wu  1101000  00001 ..... ... ..... 1010011 @r2_rm
195fmv_w_x    1111000  00000 ..... 000 ..... 1010011 @r2
196
197# *** RV32D Standard Extension ***
198fld        ............   ..... 011 ..... 0000111 @i
199fsd        ....... .....  ..... 011 ..... 0100111 @s
200fmadd_d    ..... 01 ..... ..... ... ..... 1000011 @r4_rm
201fmsub_d    ..... 01 ..... ..... ... ..... 1000111 @r4_rm
202fnmsub_d   ..... 01 ..... ..... ... ..... 1001011 @r4_rm
203fnmadd_d   ..... 01 ..... ..... ... ..... 1001111 @r4_rm
204fadd_d     0000001  ..... ..... ... ..... 1010011 @r_rm
205fsub_d     0000101  ..... ..... ... ..... 1010011 @r_rm
206fmul_d     0001001  ..... ..... ... ..... 1010011 @r_rm
207fdiv_d     0001101  ..... ..... ... ..... 1010011 @r_rm
208fsqrt_d    0101101  00000 ..... ... ..... 1010011 @r2_rm
209fsgnj_d    0010001  ..... ..... 000 ..... 1010011 @r
210fsgnjn_d   0010001  ..... ..... 001 ..... 1010011 @r
211fsgnjx_d   0010001  ..... ..... 010 ..... 1010011 @r
212fmin_d     0010101  ..... ..... 000 ..... 1010011 @r
213fmax_d     0010101  ..... ..... 001 ..... 1010011 @r
214fcvt_s_d   0100000  00001 ..... ... ..... 1010011 @r2_rm
215fcvt_d_s   0100001  00000 ..... ... ..... 1010011 @r2_rm
216feq_d      1010001  ..... ..... 010 ..... 1010011 @r
217flt_d      1010001  ..... ..... 001 ..... 1010011 @r
218fle_d      1010001  ..... ..... 000 ..... 1010011 @r
219fclass_d   1110001  00000 ..... 001 ..... 1010011 @r2
220fcvt_w_d   1100001  00000 ..... ... ..... 1010011 @r2_rm
221fcvt_wu_d  1100001  00001 ..... ... ..... 1010011 @r2_rm
222fcvt_d_w   1101001  00000 ..... ... ..... 1010011 @r2_rm
223fcvt_d_wu  1101001  00001 ..... ... ..... 1010011 @r2_rm
224
225# *** RV32H Base Instruction Set ***
226hfence_gvma 0110001  .....  ..... 000 00000 1110011 @hfence_gvma
227hfence_vvma 0010001  .....  ..... 000 00000 1110011 @hfence_vvma
228
229# *** RV32V Extension ***
230
231# *** Vector loads and stores are encoded within LOADFP/STORE-FP ***
232vlb_v      ... 100 . 00000 ..... 000 ..... 0000111 @r2_nfvm
233vlh_v      ... 100 . 00000 ..... 101 ..... 0000111 @r2_nfvm
234vlw_v      ... 100 . 00000 ..... 110 ..... 0000111 @r2_nfvm
235vle_v      ... 000 . 00000 ..... 111 ..... 0000111 @r2_nfvm
236vlbu_v     ... 000 . 00000 ..... 000 ..... 0000111 @r2_nfvm
237vlhu_v     ... 000 . 00000 ..... 101 ..... 0000111 @r2_nfvm
238vlwu_v     ... 000 . 00000 ..... 110 ..... 0000111 @r2_nfvm
239vlbff_v    ... 100 . 10000 ..... 000 ..... 0000111 @r2_nfvm
240vlhff_v    ... 100 . 10000 ..... 101 ..... 0000111 @r2_nfvm
241vlwff_v    ... 100 . 10000 ..... 110 ..... 0000111 @r2_nfvm
242vleff_v    ... 000 . 10000 ..... 111 ..... 0000111 @r2_nfvm
243vlbuff_v   ... 000 . 10000 ..... 000 ..... 0000111 @r2_nfvm
244vlhuff_v   ... 000 . 10000 ..... 101 ..... 0000111 @r2_nfvm
245vlwuff_v   ... 000 . 10000 ..... 110 ..... 0000111 @r2_nfvm
246vsb_v      ... 000 . 00000 ..... 000 ..... 0100111 @r2_nfvm
247vsh_v      ... 000 . 00000 ..... 101 ..... 0100111 @r2_nfvm
248vsw_v      ... 000 . 00000 ..... 110 ..... 0100111 @r2_nfvm
249vse_v      ... 000 . 00000 ..... 111 ..... 0100111 @r2_nfvm
250
251vlsb_v     ... 110 . ..... ..... 000 ..... 0000111 @r_nfvm
252vlsh_v     ... 110 . ..... ..... 101 ..... 0000111 @r_nfvm
253vlsw_v     ... 110 . ..... ..... 110 ..... 0000111 @r_nfvm
254vlse_v     ... 010 . ..... ..... 111 ..... 0000111 @r_nfvm
255vlsbu_v    ... 010 . ..... ..... 000 ..... 0000111 @r_nfvm
256vlshu_v    ... 010 . ..... ..... 101 ..... 0000111 @r_nfvm
257vlswu_v    ... 010 . ..... ..... 110 ..... 0000111 @r_nfvm
258vssb_v     ... 010 . ..... ..... 000 ..... 0100111 @r_nfvm
259vssh_v     ... 010 . ..... ..... 101 ..... 0100111 @r_nfvm
260vssw_v     ... 010 . ..... ..... 110 ..... 0100111 @r_nfvm
261vsse_v     ... 010 . ..... ..... 111 ..... 0100111 @r_nfvm
262
263vlxb_v     ... 111 . ..... ..... 000 ..... 0000111 @r_nfvm
264vlxh_v     ... 111 . ..... ..... 101 ..... 0000111 @r_nfvm
265vlxw_v     ... 111 . ..... ..... 110 ..... 0000111 @r_nfvm
266vlxe_v     ... 011 . ..... ..... 111 ..... 0000111 @r_nfvm
267vlxbu_v    ... 011 . ..... ..... 000 ..... 0000111 @r_nfvm
268vlxhu_v    ... 011 . ..... ..... 101 ..... 0000111 @r_nfvm
269vlxwu_v    ... 011 . ..... ..... 110 ..... 0000111 @r_nfvm
270# Vector ordered-indexed and unordered-indexed store insns.
271vsxb_v     ... -11 . ..... ..... 000 ..... 0100111 @r_nfvm
272vsxh_v     ... -11 . ..... ..... 101 ..... 0100111 @r_nfvm
273vsxw_v     ... -11 . ..... ..... 110 ..... 0100111 @r_nfvm
274vsxe_v     ... -11 . ..... ..... 111 ..... 0100111 @r_nfvm
275
276#*** Vector AMO operations are encoded under the standard AMO major opcode ***
277vamoswapw_v     00001 . . ..... ..... 110 ..... 0101111 @r_wdvm
278vamoaddw_v      00000 . . ..... ..... 110 ..... 0101111 @r_wdvm
279vamoxorw_v      00100 . . ..... ..... 110 ..... 0101111 @r_wdvm
280vamoandw_v      01100 . . ..... ..... 110 ..... 0101111 @r_wdvm
281vamoorw_v       01000 . . ..... ..... 110 ..... 0101111 @r_wdvm
282vamominw_v      10000 . . ..... ..... 110 ..... 0101111 @r_wdvm
283vamomaxw_v      10100 . . ..... ..... 110 ..... 0101111 @r_wdvm
284vamominuw_v     11000 . . ..... ..... 110 ..... 0101111 @r_wdvm
285vamomaxuw_v     11100 . . ..... ..... 110 ..... 0101111 @r_wdvm
286
287# *** new major opcode OP-V ***
288vadd_vv         000000 . ..... ..... 000 ..... 1010111 @r_vm
289vadd_vx         000000 . ..... ..... 100 ..... 1010111 @r_vm
290vadd_vi         000000 . ..... ..... 011 ..... 1010111 @r_vm
291vsub_vv         000010 . ..... ..... 000 ..... 1010111 @r_vm
292vsub_vx         000010 . ..... ..... 100 ..... 1010111 @r_vm
293vrsub_vx        000011 . ..... ..... 100 ..... 1010111 @r_vm
294vrsub_vi        000011 . ..... ..... 011 ..... 1010111 @r_vm
295vwaddu_vv       110000 . ..... ..... 010 ..... 1010111 @r_vm
296vwaddu_vx       110000 . ..... ..... 110 ..... 1010111 @r_vm
297vwadd_vv        110001 . ..... ..... 010 ..... 1010111 @r_vm
298vwadd_vx        110001 . ..... ..... 110 ..... 1010111 @r_vm
299vwsubu_vv       110010 . ..... ..... 010 ..... 1010111 @r_vm
300vwsubu_vx       110010 . ..... ..... 110 ..... 1010111 @r_vm
301vwsub_vv        110011 . ..... ..... 010 ..... 1010111 @r_vm
302vwsub_vx        110011 . ..... ..... 110 ..... 1010111 @r_vm
303vwaddu_wv       110100 . ..... ..... 010 ..... 1010111 @r_vm
304vwaddu_wx       110100 . ..... ..... 110 ..... 1010111 @r_vm
305vwadd_wv        110101 . ..... ..... 010 ..... 1010111 @r_vm
306vwadd_wx        110101 . ..... ..... 110 ..... 1010111 @r_vm
307vwsubu_wv       110110 . ..... ..... 010 ..... 1010111 @r_vm
308vwsubu_wx       110110 . ..... ..... 110 ..... 1010111 @r_vm
309vwsub_wv        110111 . ..... ..... 010 ..... 1010111 @r_vm
310vwsub_wx        110111 . ..... ..... 110 ..... 1010111 @r_vm
311vadc_vvm        010000 1 ..... ..... 000 ..... 1010111 @r_vm_1
312vadc_vxm        010000 1 ..... ..... 100 ..... 1010111 @r_vm_1
313vadc_vim        010000 1 ..... ..... 011 ..... 1010111 @r_vm_1
314vmadc_vvm       010001 1 ..... ..... 000 ..... 1010111 @r_vm_1
315vmadc_vxm       010001 1 ..... ..... 100 ..... 1010111 @r_vm_1
316vmadc_vim       010001 1 ..... ..... 011 ..... 1010111 @r_vm_1
317vsbc_vvm        010010 1 ..... ..... 000 ..... 1010111 @r_vm_1
318vsbc_vxm        010010 1 ..... ..... 100 ..... 1010111 @r_vm_1
319vmsbc_vvm       010011 1 ..... ..... 000 ..... 1010111 @r_vm_1
320vmsbc_vxm       010011 1 ..... ..... 100 ..... 1010111 @r_vm_1
321vand_vv         001001 . ..... ..... 000 ..... 1010111 @r_vm
322vand_vx         001001 . ..... ..... 100 ..... 1010111 @r_vm
323vand_vi         001001 . ..... ..... 011 ..... 1010111 @r_vm
324vor_vv          001010 . ..... ..... 000 ..... 1010111 @r_vm
325vor_vx          001010 . ..... ..... 100 ..... 1010111 @r_vm
326vor_vi          001010 . ..... ..... 011 ..... 1010111 @r_vm
327vxor_vv         001011 . ..... ..... 000 ..... 1010111 @r_vm
328vxor_vx         001011 . ..... ..... 100 ..... 1010111 @r_vm
329vxor_vi         001011 . ..... ..... 011 ..... 1010111 @r_vm
330vsll_vv         100101 . ..... ..... 000 ..... 1010111 @r_vm
331vsll_vx         100101 . ..... ..... 100 ..... 1010111 @r_vm
332vsll_vi         100101 . ..... ..... 011 ..... 1010111 @r_vm
333vsrl_vv         101000 . ..... ..... 000 ..... 1010111 @r_vm
334vsrl_vx         101000 . ..... ..... 100 ..... 1010111 @r_vm
335vsrl_vi         101000 . ..... ..... 011 ..... 1010111 @r_vm
336vsra_vv         101001 . ..... ..... 000 ..... 1010111 @r_vm
337vsra_vx         101001 . ..... ..... 100 ..... 1010111 @r_vm
338vsra_vi         101001 . ..... ..... 011 ..... 1010111 @r_vm
339vnsrl_vv        101100 . ..... ..... 000 ..... 1010111 @r_vm
340vnsrl_vx        101100 . ..... ..... 100 ..... 1010111 @r_vm
341vnsrl_vi        101100 . ..... ..... 011 ..... 1010111 @r_vm
342vnsra_vv        101101 . ..... ..... 000 ..... 1010111 @r_vm
343vnsra_vx        101101 . ..... ..... 100 ..... 1010111 @r_vm
344vnsra_vi        101101 . ..... ..... 011 ..... 1010111 @r_vm
345vmseq_vv        011000 . ..... ..... 000 ..... 1010111 @r_vm
346vmseq_vx        011000 . ..... ..... 100 ..... 1010111 @r_vm
347vmseq_vi        011000 . ..... ..... 011 ..... 1010111 @r_vm
348vmsne_vv        011001 . ..... ..... 000 ..... 1010111 @r_vm
349vmsne_vx        011001 . ..... ..... 100 ..... 1010111 @r_vm
350vmsne_vi        011001 . ..... ..... 011 ..... 1010111 @r_vm
351vmsltu_vv       011010 . ..... ..... 000 ..... 1010111 @r_vm
352vmsltu_vx       011010 . ..... ..... 100 ..... 1010111 @r_vm
353vmslt_vv        011011 . ..... ..... 000 ..... 1010111 @r_vm
354vmslt_vx        011011 . ..... ..... 100 ..... 1010111 @r_vm
355vmsleu_vv       011100 . ..... ..... 000 ..... 1010111 @r_vm
356vmsleu_vx       011100 . ..... ..... 100 ..... 1010111 @r_vm
357vmsleu_vi       011100 . ..... ..... 011 ..... 1010111 @r_vm
358vmsle_vv        011101 . ..... ..... 000 ..... 1010111 @r_vm
359vmsle_vx        011101 . ..... ..... 100 ..... 1010111 @r_vm
360vmsle_vi        011101 . ..... ..... 011 ..... 1010111 @r_vm
361vmsgtu_vx       011110 . ..... ..... 100 ..... 1010111 @r_vm
362vmsgtu_vi       011110 . ..... ..... 011 ..... 1010111 @r_vm
363vmsgt_vx        011111 . ..... ..... 100 ..... 1010111 @r_vm
364vmsgt_vi        011111 . ..... ..... 011 ..... 1010111 @r_vm
365vminu_vv        000100 . ..... ..... 000 ..... 1010111 @r_vm
366vminu_vx        000100 . ..... ..... 100 ..... 1010111 @r_vm
367vmin_vv         000101 . ..... ..... 000 ..... 1010111 @r_vm
368vmin_vx         000101 . ..... ..... 100 ..... 1010111 @r_vm
369vmaxu_vv        000110 . ..... ..... 000 ..... 1010111 @r_vm
370vmaxu_vx        000110 . ..... ..... 100 ..... 1010111 @r_vm
371vmax_vv         000111 . ..... ..... 000 ..... 1010111 @r_vm
372vmax_vx         000111 . ..... ..... 100 ..... 1010111 @r_vm
373vmul_vv         100101 . ..... ..... 010 ..... 1010111 @r_vm
374vmul_vx         100101 . ..... ..... 110 ..... 1010111 @r_vm
375vmulh_vv        100111 . ..... ..... 010 ..... 1010111 @r_vm
376vmulh_vx        100111 . ..... ..... 110 ..... 1010111 @r_vm
377vmulhu_vv       100100 . ..... ..... 010 ..... 1010111 @r_vm
378vmulhu_vx       100100 . ..... ..... 110 ..... 1010111 @r_vm
379vmulhsu_vv      100110 . ..... ..... 010 ..... 1010111 @r_vm
380vmulhsu_vx      100110 . ..... ..... 110 ..... 1010111 @r_vm
381vdivu_vv        100000 . ..... ..... 010 ..... 1010111 @r_vm
382vdivu_vx        100000 . ..... ..... 110 ..... 1010111 @r_vm
383vdiv_vv         100001 . ..... ..... 010 ..... 1010111 @r_vm
384vdiv_vx         100001 . ..... ..... 110 ..... 1010111 @r_vm
385vremu_vv        100010 . ..... ..... 010 ..... 1010111 @r_vm
386vremu_vx        100010 . ..... ..... 110 ..... 1010111 @r_vm
387vrem_vv         100011 . ..... ..... 010 ..... 1010111 @r_vm
388vrem_vx         100011 . ..... ..... 110 ..... 1010111 @r_vm
389vwmulu_vv       111000 . ..... ..... 010 ..... 1010111 @r_vm
390vwmulu_vx       111000 . ..... ..... 110 ..... 1010111 @r_vm
391vwmulsu_vv      111010 . ..... ..... 010 ..... 1010111 @r_vm
392vwmulsu_vx      111010 . ..... ..... 110 ..... 1010111 @r_vm
393vwmul_vv        111011 . ..... ..... 010 ..... 1010111 @r_vm
394vwmul_vx        111011 . ..... ..... 110 ..... 1010111 @r_vm
395vmacc_vv        101101 . ..... ..... 010 ..... 1010111 @r_vm
396vmacc_vx        101101 . ..... ..... 110 ..... 1010111 @r_vm
397vnmsac_vv       101111 . ..... ..... 010 ..... 1010111 @r_vm
398vnmsac_vx       101111 . ..... ..... 110 ..... 1010111 @r_vm
399vmadd_vv        101001 . ..... ..... 010 ..... 1010111 @r_vm
400vmadd_vx        101001 . ..... ..... 110 ..... 1010111 @r_vm
401vnmsub_vv       101011 . ..... ..... 010 ..... 1010111 @r_vm
402vnmsub_vx       101011 . ..... ..... 110 ..... 1010111 @r_vm
403vwmaccu_vv      111100 . ..... ..... 010 ..... 1010111 @r_vm
404vwmaccu_vx      111100 . ..... ..... 110 ..... 1010111 @r_vm
405vwmacc_vv       111101 . ..... ..... 010 ..... 1010111 @r_vm
406vwmacc_vx       111101 . ..... ..... 110 ..... 1010111 @r_vm
407vwmaccsu_vv     111110 . ..... ..... 010 ..... 1010111 @r_vm
408vwmaccsu_vx     111110 . ..... ..... 110 ..... 1010111 @r_vm
409vwmaccus_vx     111111 . ..... ..... 110 ..... 1010111 @r_vm
410vmv_v_v         010111 1 00000 ..... 000 ..... 1010111 @r2
411vmv_v_x         010111 1 00000 ..... 100 ..... 1010111 @r2
412vmv_v_i         010111 1 00000 ..... 011 ..... 1010111 @r2
413vmerge_vvm      010111 0 ..... ..... 000 ..... 1010111 @r_vm_0
414vmerge_vxm      010111 0 ..... ..... 100 ..... 1010111 @r_vm_0
415vmerge_vim      010111 0 ..... ..... 011 ..... 1010111 @r_vm_0
416vsaddu_vv       100000 . ..... ..... 000 ..... 1010111 @r_vm
417vsaddu_vx       100000 . ..... ..... 100 ..... 1010111 @r_vm
418vsaddu_vi       100000 . ..... ..... 011 ..... 1010111 @r_vm
419vsadd_vv        100001 . ..... ..... 000 ..... 1010111 @r_vm
420vsadd_vx        100001 . ..... ..... 100 ..... 1010111 @r_vm
421vsadd_vi        100001 . ..... ..... 011 ..... 1010111 @r_vm
422vssubu_vv       100010 . ..... ..... 000 ..... 1010111 @r_vm
423vssubu_vx       100010 . ..... ..... 100 ..... 1010111 @r_vm
424vssub_vv        100011 . ..... ..... 000 ..... 1010111 @r_vm
425vssub_vx        100011 . ..... ..... 100 ..... 1010111 @r_vm
426vaadd_vv        100100 . ..... ..... 000 ..... 1010111 @r_vm
427vaadd_vx        100100 . ..... ..... 100 ..... 1010111 @r_vm
428vaadd_vi        100100 . ..... ..... 011 ..... 1010111 @r_vm
429vasub_vv        100110 . ..... ..... 000 ..... 1010111 @r_vm
430vasub_vx        100110 . ..... ..... 100 ..... 1010111 @r_vm
431vsmul_vv        100111 . ..... ..... 000 ..... 1010111 @r_vm
432vsmul_vx        100111 . ..... ..... 100 ..... 1010111 @r_vm
433vwsmaccu_vv     111100 . ..... ..... 000 ..... 1010111 @r_vm
434vwsmaccu_vx     111100 . ..... ..... 100 ..... 1010111 @r_vm
435vwsmacc_vv      111101 . ..... ..... 000 ..... 1010111 @r_vm
436vwsmacc_vx      111101 . ..... ..... 100 ..... 1010111 @r_vm
437vwsmaccsu_vv    111110 . ..... ..... 000 ..... 1010111 @r_vm
438vwsmaccsu_vx    111110 . ..... ..... 100 ..... 1010111 @r_vm
439vwsmaccus_vx    111111 . ..... ..... 100 ..... 1010111 @r_vm
440vssrl_vv        101010 . ..... ..... 000 ..... 1010111 @r_vm
441vssrl_vx        101010 . ..... ..... 100 ..... 1010111 @r_vm
442vssrl_vi        101010 . ..... ..... 011 ..... 1010111 @r_vm
443vssra_vv        101011 . ..... ..... 000 ..... 1010111 @r_vm
444vssra_vx        101011 . ..... ..... 100 ..... 1010111 @r_vm
445vssra_vi        101011 . ..... ..... 011 ..... 1010111 @r_vm
446vnclipu_vv      101110 . ..... ..... 000 ..... 1010111 @r_vm
447vnclipu_vx      101110 . ..... ..... 100 ..... 1010111 @r_vm
448vnclipu_vi      101110 . ..... ..... 011 ..... 1010111 @r_vm
449vnclip_vv       101111 . ..... ..... 000 ..... 1010111 @r_vm
450vnclip_vx       101111 . ..... ..... 100 ..... 1010111 @r_vm
451vnclip_vi       101111 . ..... ..... 011 ..... 1010111 @r_vm
452vfadd_vv        000000 . ..... ..... 001 ..... 1010111 @r_vm
453vfadd_vf        000000 . ..... ..... 101 ..... 1010111 @r_vm
454vfsub_vv        000010 . ..... ..... 001 ..... 1010111 @r_vm
455vfsub_vf        000010 . ..... ..... 101 ..... 1010111 @r_vm
456vfrsub_vf       100111 . ..... ..... 101 ..... 1010111 @r_vm
457vfwadd_vv       110000 . ..... ..... 001 ..... 1010111 @r_vm
458vfwadd_vf       110000 . ..... ..... 101 ..... 1010111 @r_vm
459vfwadd_wv       110100 . ..... ..... 001 ..... 1010111 @r_vm
460vfwadd_wf       110100 . ..... ..... 101 ..... 1010111 @r_vm
461vfwsub_vv       110010 . ..... ..... 001 ..... 1010111 @r_vm
462vfwsub_vf       110010 . ..... ..... 101 ..... 1010111 @r_vm
463vfwsub_wv       110110 . ..... ..... 001 ..... 1010111 @r_vm
464vfwsub_wf       110110 . ..... ..... 101 ..... 1010111 @r_vm
465vfmul_vv        100100 . ..... ..... 001 ..... 1010111 @r_vm
466vfmul_vf        100100 . ..... ..... 101 ..... 1010111 @r_vm
467vfdiv_vv        100000 . ..... ..... 001 ..... 1010111 @r_vm
468vfdiv_vf        100000 . ..... ..... 101 ..... 1010111 @r_vm
469vfrdiv_vf       100001 . ..... ..... 101 ..... 1010111 @r_vm
470vfwmul_vv       111000 . ..... ..... 001 ..... 1010111 @r_vm
471vfwmul_vf       111000 . ..... ..... 101 ..... 1010111 @r_vm
472vfmacc_vv       101100 . ..... ..... 001 ..... 1010111 @r_vm
473vfnmacc_vv      101101 . ..... ..... 001 ..... 1010111 @r_vm
474vfnmacc_vf      101101 . ..... ..... 101 ..... 1010111 @r_vm
475vfmacc_vf       101100 . ..... ..... 101 ..... 1010111 @r_vm
476vfmsac_vv       101110 . ..... ..... 001 ..... 1010111 @r_vm
477vfmsac_vf       101110 . ..... ..... 101 ..... 1010111 @r_vm
478vfnmsac_vv      101111 . ..... ..... 001 ..... 1010111 @r_vm
479vfnmsac_vf      101111 . ..... ..... 101 ..... 1010111 @r_vm
480vfmadd_vv       101000 . ..... ..... 001 ..... 1010111 @r_vm
481vfmadd_vf       101000 . ..... ..... 101 ..... 1010111 @r_vm
482vfnmadd_vv      101001 . ..... ..... 001 ..... 1010111 @r_vm
483vfnmadd_vf      101001 . ..... ..... 101 ..... 1010111 @r_vm
484vfmsub_vv       101010 . ..... ..... 001 ..... 1010111 @r_vm
485vfmsub_vf       101010 . ..... ..... 101 ..... 1010111 @r_vm
486vfnmsub_vv      101011 . ..... ..... 001 ..... 1010111 @r_vm
487vfnmsub_vf      101011 . ..... ..... 101 ..... 1010111 @r_vm
488vfwmacc_vv      111100 . ..... ..... 001 ..... 1010111 @r_vm
489vfwmacc_vf      111100 . ..... ..... 101 ..... 1010111 @r_vm
490vfwnmacc_vv     111101 . ..... ..... 001 ..... 1010111 @r_vm
491vfwnmacc_vf     111101 . ..... ..... 101 ..... 1010111 @r_vm
492vfwmsac_vv      111110 . ..... ..... 001 ..... 1010111 @r_vm
493vfwmsac_vf      111110 . ..... ..... 101 ..... 1010111 @r_vm
494vfwnmsac_vv     111111 . ..... ..... 001 ..... 1010111 @r_vm
495vfwnmsac_vf     111111 . ..... ..... 101 ..... 1010111 @r_vm
496vfsqrt_v        100011 . ..... 00000 001 ..... 1010111 @r2_vm
497vfmin_vv        000100 . ..... ..... 001 ..... 1010111 @r_vm
498vfmin_vf        000100 . ..... ..... 101 ..... 1010111 @r_vm
499vfmax_vv        000110 . ..... ..... 001 ..... 1010111 @r_vm
500vfmax_vf        000110 . ..... ..... 101 ..... 1010111 @r_vm
501vfsgnj_vv       001000 . ..... ..... 001 ..... 1010111 @r_vm
502vfsgnj_vf       001000 . ..... ..... 101 ..... 1010111 @r_vm
503vfsgnjn_vv      001001 . ..... ..... 001 ..... 1010111 @r_vm
504vfsgnjn_vf      001001 . ..... ..... 101 ..... 1010111 @r_vm
505vfsgnjx_vv      001010 . ..... ..... 001 ..... 1010111 @r_vm
506vfsgnjx_vf      001010 . ..... ..... 101 ..... 1010111 @r_vm
507vmfeq_vv        011000 . ..... ..... 001 ..... 1010111 @r_vm
508vmfeq_vf        011000 . ..... ..... 101 ..... 1010111 @r_vm
509vmfne_vv        011100 . ..... ..... 001 ..... 1010111 @r_vm
510vmfne_vf        011100 . ..... ..... 101 ..... 1010111 @r_vm
511vmflt_vv        011011 . ..... ..... 001 ..... 1010111 @r_vm
512vmflt_vf        011011 . ..... ..... 101 ..... 1010111 @r_vm
513vmfle_vv        011001 . ..... ..... 001 ..... 1010111 @r_vm
514vmfle_vf        011001 . ..... ..... 101 ..... 1010111 @r_vm
515vmfgt_vf        011101 . ..... ..... 101 ..... 1010111 @r_vm
516vmfge_vf        011111 . ..... ..... 101 ..... 1010111 @r_vm
517vmford_vv       011010 . ..... ..... 001 ..... 1010111 @r_vm
518vmford_vf       011010 . ..... ..... 101 ..... 1010111 @r_vm
519vfclass_v       100011 . ..... 10000 001 ..... 1010111 @r2_vm
520vfmerge_vfm     010111 0 ..... ..... 101 ..... 1010111 @r_vm_0
521vfmv_v_f        010111 1 00000 ..... 101 ..... 1010111 @r2
522vfcvt_xu_f_v    100010 . ..... 00000 001 ..... 1010111 @r2_vm
523vfcvt_x_f_v     100010 . ..... 00001 001 ..... 1010111 @r2_vm
524vfcvt_f_xu_v    100010 . ..... 00010 001 ..... 1010111 @r2_vm
525vfcvt_f_x_v     100010 . ..... 00011 001 ..... 1010111 @r2_vm
526vfwcvt_xu_f_v   100010 . ..... 01000 001 ..... 1010111 @r2_vm
527vfwcvt_x_f_v    100010 . ..... 01001 001 ..... 1010111 @r2_vm
528vfwcvt_f_xu_v   100010 . ..... 01010 001 ..... 1010111 @r2_vm
529vfwcvt_f_x_v    100010 . ..... 01011 001 ..... 1010111 @r2_vm
530vfwcvt_f_f_v    100010 . ..... 01100 001 ..... 1010111 @r2_vm
531vfncvt_xu_f_v   100010 . ..... 10000 001 ..... 1010111 @r2_vm
532vfncvt_x_f_v    100010 . ..... 10001 001 ..... 1010111 @r2_vm
533vfncvt_f_xu_v   100010 . ..... 10010 001 ..... 1010111 @r2_vm
534vfncvt_f_x_v    100010 . ..... 10011 001 ..... 1010111 @r2_vm
535vfncvt_f_f_v    100010 . ..... 10100 001 ..... 1010111 @r2_vm
536vredsum_vs      000000 . ..... ..... 010 ..... 1010111 @r_vm
537vredand_vs      000001 . ..... ..... 010 ..... 1010111 @r_vm
538vredor_vs       000010 . ..... ..... 010 ..... 1010111 @r_vm
539vredxor_vs      000011 . ..... ..... 010 ..... 1010111 @r_vm
540vredminu_vs     000100 . ..... ..... 010 ..... 1010111 @r_vm
541vredmin_vs      000101 . ..... ..... 010 ..... 1010111 @r_vm
542vredmaxu_vs     000110 . ..... ..... 010 ..... 1010111 @r_vm
543vredmax_vs      000111 . ..... ..... 010 ..... 1010111 @r_vm
544vwredsumu_vs    110000 . ..... ..... 000 ..... 1010111 @r_vm
545vwredsum_vs     110001 . ..... ..... 000 ..... 1010111 @r_vm
546# Vector ordered and unordered reduction sum
547vfredsum_vs     0000-1 . ..... ..... 001 ..... 1010111 @r_vm
548vfredmin_vs     000101 . ..... ..... 001 ..... 1010111 @r_vm
549vfredmax_vs     000111 . ..... ..... 001 ..... 1010111 @r_vm
550# Vector widening ordered and unordered float reduction sum
551vfwredsum_vs    1100-1 . ..... ..... 001 ..... 1010111 @r_vm
552vmand_mm        011001 - ..... ..... 010 ..... 1010111 @r
553vmnand_mm       011101 - ..... ..... 010 ..... 1010111 @r
554vmandnot_mm     011000 - ..... ..... 010 ..... 1010111 @r
555vmxor_mm        011011 - ..... ..... 010 ..... 1010111 @r
556vmor_mm         011010 - ..... ..... 010 ..... 1010111 @r
557vmnor_mm        011110 - ..... ..... 010 ..... 1010111 @r
558vmornot_mm      011100 - ..... ..... 010 ..... 1010111 @r
559vmxnor_mm       011111 - ..... ..... 010 ..... 1010111 @r
560vmpopc_m        010100 . ..... ----- 010 ..... 1010111 @r2_vm
561vmfirst_m       010101 . ..... ----- 010 ..... 1010111 @r2_vm
562vmsbf_m         010110 . ..... 00001 010 ..... 1010111 @r2_vm
563vmsif_m         010110 . ..... 00011 010 ..... 1010111 @r2_vm
564vmsof_m         010110 . ..... 00010 010 ..... 1010111 @r2_vm
565viota_m         010110 . ..... 10000 010 ..... 1010111 @r2_vm
566vid_v           010110 . 00000 10001 010 ..... 1010111 @r1_vm
567vext_x_v        001100 1 ..... ..... 010 ..... 1010111 @r
568vmv_s_x         001101 1 00000 ..... 110 ..... 1010111 @r2
569vfmv_f_s        001100 1 ..... 00000 001 ..... 1010111 @r2rd
570vfmv_s_f        001101 1 00000 ..... 101 ..... 1010111 @r2
571
572vsetvli         0 ........... ..... 111 ..... 1010111  @r2_zimm
573vsetvl          1000000 ..... ..... 111 ..... 1010111  @r
574