1# 2# RISC-V translation routines for the RVXI Base Integer Instruction Set. 3# 4# Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de 5# Bastian Koppelmann, kbastian@mail.uni-paderborn.de 6# 7# This program is free software; you can redistribute it and/or modify it 8# under the terms and conditions of the GNU General Public License, 9# version 2 or later, as published by the Free Software Foundation. 10# 11# This program is distributed in the hope it will be useful, but WITHOUT 12# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14# more details. 15# 16# You should have received a copy of the GNU General Public License along with 17# this program. If not, see <http://www.gnu.org/licenses/>. 18 19# Fields: 20%rs3 27:5 21%rs2 20:5 22%rs1 15:5 23%rd 7:5 24%sh5 20:5 25%sh6 20:6 26 27%sh7 20:7 28%csr 20:12 29%rm 12:3 30%nf 29:3 !function=ex_plus_1 31 32# immediates: 33%imm_i 20:s12 34%imm_s 25:s7 7:5 35%imm_b 31:s1 7:1 25:6 8:4 !function=ex_shift_1 36%imm_j 31:s1 12:8 20:1 21:10 !function=ex_shift_1 37%imm_u 12:s20 !function=ex_shift_12 38%imm_bs 30:2 !function=ex_shift_3 39%imm_rnum 20:4 40%imm_z6 26:1 15:5 41 42# Argument sets: 43&empty 44&b imm rs2 rs1 45&i imm rs1 rd 46&j imm rd 47&r rd rs1 rs2 48&r2 rd rs1 49&r2_s rs1 rs2 50&s imm rs1 rs2 51&u imm rd 52&shift shamt rs1 rd 53&atomic aq rl rs2 rs1 rd 54&rmrr vm rd rs1 rs2 55&rmr vm rd rs2 56&r2nfvm vm rd rs1 nf 57&rnfvm vm rd rs1 rs2 nf 58&k_aes shamt rs2 rs1 rd 59 60# Formats 32: 61@r ....... ..... ..... ... ..... ....... &r %rs2 %rs1 %rd 62@i ............ ..... ... ..... ....... &i imm=%imm_i %rs1 %rd 63@b ....... ..... ..... ... ..... ....... &b imm=%imm_b %rs2 %rs1 64@s ....... ..... ..... ... ..... ....... &s imm=%imm_s %rs2 %rs1 65@u .................... ..... ....... &u imm=%imm_u %rd 66@j .................... ..... ....... &j imm=%imm_j %rd 67 68@sh ...... ...... ..... ... ..... ....... &shift shamt=%sh7 %rs1 %rd 69@csr ............ ..... ... ..... ....... %csr %rs1 %rd 70 71@atom_ld ..... aq:1 rl:1 ..... ........ ..... ....... &atomic rs2=0 %rs1 %rd 72@atom_st ..... aq:1 rl:1 ..... ........ ..... ....... &atomic %rs2 %rs1 %rd 73 74@r4_rm ..... .. ..... ..... ... ..... ....... %rs3 %rs2 %rs1 %rm %rd 75@r_rm ....... ..... ..... ... ..... ....... %rs2 %rs1 %rm %rd 76@r2_rm ....... ..... ..... ... ..... ....... %rs1 %rm %rd 77@r2 ....... ..... ..... ... ..... ....... &r2 %rs1 %rd 78@r2_nfvm ... ... vm:1 ..... ..... ... ..... ....... &r2nfvm %nf %rs1 %rd 79@r2_vm ...... vm:1 ..... ..... ... ..... ....... &rmr %rs2 %rd 80@r1_vm ...... vm:1 ..... ..... ... ..... ....... %rd 81@r_nfvm ... ... vm:1 ..... ..... ... ..... ....... &rnfvm %nf %rs2 %rs1 %rd 82@r2rd ....... ..... ..... ... ..... ....... %rs2 %rd 83@r_vm ...... vm:1 ..... ..... ... ..... ....... &rmrr %rs2 %rs1 %rd 84@r_vm_1 ...... . ..... ..... ... ..... ....... &rmrr vm=1 %rs2 %rs1 %rd 85@r_vm_0 ...... . ..... ..... ... ..... ....... &rmrr vm=0 %rs2 %rs1 %rd 86@r2_zimm6 ..... . vm:1 ..... ..... ... ..... ....... &rmrr %rs2 rs1=%imm_z6 %rd 87@r2_zimm11 . zimm:11 ..... ... ..... ....... %rs1 %rd 88@r2_zimm10 .. zimm:10 ..... ... ..... ....... %rs1 %rd 89@r2_s ....... ..... ..... ... ..... ....... %rs2 %rs1 90 91@hfence_gvma ....... ..... ..... ... ..... ....... %rs2 %rs1 92@hfence_vvma ....... ..... ..... ... ..... ....... %rs2 %rs1 93 94@sfence_vma ....... ..... ..... ... ..... ....... %rs2 %rs1 95@sfence_vm ....... ..... ..... ... ..... ....... %rs1 96 97@k_aes .. ..... ..... ..... ... ..... ....... &k_aes shamt=%imm_bs %rs2 %rs1 %rd 98@i_aes .. ..... ..... ..... ... ..... ....... &i imm=%imm_rnum %rs1 %rd 99 100# Formats 64: 101@sh5 ....... ..... ..... ... ..... ....... &shift shamt=%sh5 %rs1 %rd 102 103# Formats 128: 104@sh6 ...... ...... ..... ... ..... ....... &shift shamt=%sh6 %rs1 %rd 105 106# *** Privileged Instructions *** 107ecall 000000000000 00000 000 00000 1110011 108ebreak 000000000001 00000 000 00000 1110011 109uret 0000000 00010 00000 000 00000 1110011 110sret 0001000 00010 00000 000 00000 1110011 111mret 0011000 00010 00000 000 00000 1110011 112wfi 0001000 00101 00000 000 00000 1110011 113sfence_vma 0001001 ..... ..... 000 00000 1110011 @sfence_vma 114sfence_vm 0001000 00100 ..... 000 00000 1110011 @sfence_vm 115 116# *** RV32I Base Instruction Set *** 117lui .................... ..... 0110111 @u 118auipc .................... ..... 0010111 @u 119jal .................... ..... 1101111 @j 120jalr ............ ..... 000 ..... 1100111 @i 121beq ....... ..... ..... 000 ..... 1100011 @b 122bne ....... ..... ..... 001 ..... 1100011 @b 123blt ....... ..... ..... 100 ..... 1100011 @b 124bge ....... ..... ..... 101 ..... 1100011 @b 125bltu ....... ..... ..... 110 ..... 1100011 @b 126bgeu ....... ..... ..... 111 ..... 1100011 @b 127lb ............ ..... 000 ..... 0000011 @i 128lh ............ ..... 001 ..... 0000011 @i 129lw ............ ..... 010 ..... 0000011 @i 130lbu ............ ..... 100 ..... 0000011 @i 131lhu ............ ..... 101 ..... 0000011 @i 132sb ....... ..... ..... 000 ..... 0100011 @s 133sh ....... ..... ..... 001 ..... 0100011 @s 134sw ....... ..... ..... 010 ..... 0100011 @s 135addi ............ ..... 000 ..... 0010011 @i 136slti ............ ..... 010 ..... 0010011 @i 137sltiu ............ ..... 011 ..... 0010011 @i 138xori ............ ..... 100 ..... 0010011 @i 139# cbo.prefetch_{i,r,m} instructions are ori with rd=x0 and not decoded. 140ori ............ ..... 110 ..... 0010011 @i 141andi ............ ..... 111 ..... 0010011 @i 142slli 00000. ...... ..... 001 ..... 0010011 @sh 143srli 00000. ...... ..... 101 ..... 0010011 @sh 144srai 01000. ...... ..... 101 ..... 0010011 @sh 145add 0000000 ..... ..... 000 ..... 0110011 @r 146sub 0100000 ..... ..... 000 ..... 0110011 @r 147sll 0000000 ..... ..... 001 ..... 0110011 @r 148slt 0000000 ..... ..... 010 ..... 0110011 @r 149sltu 0000000 ..... ..... 011 ..... 0110011 @r 150xor 0000000 ..... ..... 100 ..... 0110011 @r 151srl 0000000 ..... ..... 101 ..... 0110011 @r 152sra 0100000 ..... ..... 101 ..... 0110011 @r 153or 0000000 ..... ..... 110 ..... 0110011 @r 154and 0000000 ..... ..... 111 ..... 0110011 @r 155 156{ 157 pause 0000 0001 0000 00000 000 00000 0001111 158 fence ---- pred:4 succ:4 ----- 000 ----- 0001111 159} 160 161fence_i ---- ---- ---- ----- 001 ----- 0001111 162csrrw ............ ..... 001 ..... 1110011 @csr 163csrrs ............ ..... 010 ..... 1110011 @csr 164csrrc ............ ..... 011 ..... 1110011 @csr 165csrrwi ............ ..... 101 ..... 1110011 @csr 166csrrsi ............ ..... 110 ..... 1110011 @csr 167csrrci ............ ..... 111 ..... 1110011 @csr 168 169# *** RV64I Base Instruction Set (in addition to RV32I) *** 170lwu ............ ..... 110 ..... 0000011 @i 171ld ............ ..... 011 ..... 0000011 @i 172sd ....... ..... ..... 011 ..... 0100011 @s 173addiw ............ ..... 000 ..... 0011011 @i 174slliw 0000000 ..... ..... 001 ..... 0011011 @sh5 175srliw 0000000 ..... ..... 101 ..... 0011011 @sh5 176sraiw 0100000 ..... ..... 101 ..... 0011011 @sh5 177addw 0000000 ..... ..... 000 ..... 0111011 @r 178subw 0100000 ..... ..... 000 ..... 0111011 @r 179sllw 0000000 ..... ..... 001 ..... 0111011 @r 180srlw 0000000 ..... ..... 101 ..... 0111011 @r 181sraw 0100000 ..... ..... 101 ..... 0111011 @r 182 183# *** RV128I Base Instruction Set (in addition to RV64I) *** 184ldu ............ ..... 111 ..... 0000011 @i 185{ 186 [ 187 # *** RV32 Zicbom Standard Extension *** 188 cbo_clean 0000000 00001 ..... 010 00000 0001111 @sfence_vm 189 cbo_flush 0000000 00010 ..... 010 00000 0001111 @sfence_vm 190 cbo_inval 0000000 00000 ..... 010 00000 0001111 @sfence_vm 191 192 # *** RV32 Zicboz Standard Extension *** 193 cbo_zero 0000000 00100 ..... 010 00000 0001111 @sfence_vm 194 ] 195 196 # *** RVI128 lq *** 197 lq ............ ..... 010 ..... 0001111 @i 198} 199sq ............ ..... 100 ..... 0100011 @s 200addid ............ ..... 000 ..... 1011011 @i 201sllid 000000 ...... ..... 001 ..... 1011011 @sh6 202srlid 000000 ...... ..... 101 ..... 1011011 @sh6 203sraid 010000 ...... ..... 101 ..... 1011011 @sh6 204addd 0000000 ..... ..... 000 ..... 1111011 @r 205subd 0100000 ..... ..... 000 ..... 1111011 @r 206slld 0000000 ..... ..... 001 ..... 1111011 @r 207srld 0000000 ..... ..... 101 ..... 1111011 @r 208srad 0100000 ..... ..... 101 ..... 1111011 @r 209 210# *** RV32M Standard Extension *** 211mul 0000001 ..... ..... 000 ..... 0110011 @r 212mulh 0000001 ..... ..... 001 ..... 0110011 @r 213mulhsu 0000001 ..... ..... 010 ..... 0110011 @r 214mulhu 0000001 ..... ..... 011 ..... 0110011 @r 215div 0000001 ..... ..... 100 ..... 0110011 @r 216divu 0000001 ..... ..... 101 ..... 0110011 @r 217rem 0000001 ..... ..... 110 ..... 0110011 @r 218remu 0000001 ..... ..... 111 ..... 0110011 @r 219 220# *** RV64M Standard Extension (in addition to RV32M) *** 221mulw 0000001 ..... ..... 000 ..... 0111011 @r 222divw 0000001 ..... ..... 100 ..... 0111011 @r 223divuw 0000001 ..... ..... 101 ..... 0111011 @r 224remw 0000001 ..... ..... 110 ..... 0111011 @r 225remuw 0000001 ..... ..... 111 ..... 0111011 @r 226 227# *** RV128M Standard Extension (in addition to RV64M) *** 228muld 0000001 ..... ..... 000 ..... 1111011 @r 229divd 0000001 ..... ..... 100 ..... 1111011 @r 230divud 0000001 ..... ..... 101 ..... 1111011 @r 231remd 0000001 ..... ..... 110 ..... 1111011 @r 232remud 0000001 ..... ..... 111 ..... 1111011 @r 233 234# *** RV32A Standard Extension *** 235lr_w 00010 . . 00000 ..... 010 ..... 0101111 @atom_ld 236sc_w 00011 . . ..... ..... 010 ..... 0101111 @atom_st 237amoswap_w 00001 . . ..... ..... 010 ..... 0101111 @atom_st 238amoadd_w 00000 . . ..... ..... 010 ..... 0101111 @atom_st 239amoxor_w 00100 . . ..... ..... 010 ..... 0101111 @atom_st 240amoand_w 01100 . . ..... ..... 010 ..... 0101111 @atom_st 241amoor_w 01000 . . ..... ..... 010 ..... 0101111 @atom_st 242amomin_w 10000 . . ..... ..... 010 ..... 0101111 @atom_st 243amomax_w 10100 . . ..... ..... 010 ..... 0101111 @atom_st 244amominu_w 11000 . . ..... ..... 010 ..... 0101111 @atom_st 245amomaxu_w 11100 . . ..... ..... 010 ..... 0101111 @atom_st 246 247# *** RV64A Standard Extension (in addition to RV32A) *** 248lr_d 00010 . . 00000 ..... 011 ..... 0101111 @atom_ld 249sc_d 00011 . . ..... ..... 011 ..... 0101111 @atom_st 250amoswap_d 00001 . . ..... ..... 011 ..... 0101111 @atom_st 251amoadd_d 00000 . . ..... ..... 011 ..... 0101111 @atom_st 252amoxor_d 00100 . . ..... ..... 011 ..... 0101111 @atom_st 253amoand_d 01100 . . ..... ..... 011 ..... 0101111 @atom_st 254amoor_d 01000 . . ..... ..... 011 ..... 0101111 @atom_st 255amomin_d 10000 . . ..... ..... 011 ..... 0101111 @atom_st 256amomax_d 10100 . . ..... ..... 011 ..... 0101111 @atom_st 257amominu_d 11000 . . ..... ..... 011 ..... 0101111 @atom_st 258amomaxu_d 11100 . . ..... ..... 011 ..... 0101111 @atom_st 259 260# *** RV32F Standard Extension *** 261flw ............ ..... 010 ..... 0000111 @i 262fsw ....... ..... ..... 010 ..... 0100111 @s 263fmadd_s ..... 00 ..... ..... ... ..... 1000011 @r4_rm 264fmsub_s ..... 00 ..... ..... ... ..... 1000111 @r4_rm 265fnmsub_s ..... 00 ..... ..... ... ..... 1001011 @r4_rm 266fnmadd_s ..... 00 ..... ..... ... ..... 1001111 @r4_rm 267fadd_s 0000000 ..... ..... ... ..... 1010011 @r_rm 268fsub_s 0000100 ..... ..... ... ..... 1010011 @r_rm 269fmul_s 0001000 ..... ..... ... ..... 1010011 @r_rm 270fdiv_s 0001100 ..... ..... ... ..... 1010011 @r_rm 271fsqrt_s 0101100 00000 ..... ... ..... 1010011 @r2_rm 272fsgnj_s 0010000 ..... ..... 000 ..... 1010011 @r 273fsgnjn_s 0010000 ..... ..... 001 ..... 1010011 @r 274fsgnjx_s 0010000 ..... ..... 010 ..... 1010011 @r 275fmin_s 0010100 ..... ..... 000 ..... 1010011 @r 276fmax_s 0010100 ..... ..... 001 ..... 1010011 @r 277fcvt_w_s 1100000 00000 ..... ... ..... 1010011 @r2_rm 278fcvt_wu_s 1100000 00001 ..... ... ..... 1010011 @r2_rm 279fmv_x_w 1110000 00000 ..... 000 ..... 1010011 @r2 280feq_s 1010000 ..... ..... 010 ..... 1010011 @r 281flt_s 1010000 ..... ..... 001 ..... 1010011 @r 282fle_s 1010000 ..... ..... 000 ..... 1010011 @r 283fclass_s 1110000 00000 ..... 001 ..... 1010011 @r2 284fcvt_s_w 1101000 00000 ..... ... ..... 1010011 @r2_rm 285fcvt_s_wu 1101000 00001 ..... ... ..... 1010011 @r2_rm 286fmv_w_x 1111000 00000 ..... 000 ..... 1010011 @r2 287 288# *** RV64F Standard Extension (in addition to RV32F) *** 289fcvt_l_s 1100000 00010 ..... ... ..... 1010011 @r2_rm 290fcvt_lu_s 1100000 00011 ..... ... ..... 1010011 @r2_rm 291fcvt_s_l 1101000 00010 ..... ... ..... 1010011 @r2_rm 292fcvt_s_lu 1101000 00011 ..... ... ..... 1010011 @r2_rm 293 294# *** RV32D Standard Extension *** 295fld ............ ..... 011 ..... 0000111 @i 296fsd ....... ..... ..... 011 ..... 0100111 @s 297fmadd_d ..... 01 ..... ..... ... ..... 1000011 @r4_rm 298fmsub_d ..... 01 ..... ..... ... ..... 1000111 @r4_rm 299fnmsub_d ..... 01 ..... ..... ... ..... 1001011 @r4_rm 300fnmadd_d ..... 01 ..... ..... ... ..... 1001111 @r4_rm 301fadd_d 0000001 ..... ..... ... ..... 1010011 @r_rm 302fsub_d 0000101 ..... ..... ... ..... 1010011 @r_rm 303fmul_d 0001001 ..... ..... ... ..... 1010011 @r_rm 304fdiv_d 0001101 ..... ..... ... ..... 1010011 @r_rm 305fsqrt_d 0101101 00000 ..... ... ..... 1010011 @r2_rm 306fsgnj_d 0010001 ..... ..... 000 ..... 1010011 @r 307fsgnjn_d 0010001 ..... ..... 001 ..... 1010011 @r 308fsgnjx_d 0010001 ..... ..... 010 ..... 1010011 @r 309fmin_d 0010101 ..... ..... 000 ..... 1010011 @r 310fmax_d 0010101 ..... ..... 001 ..... 1010011 @r 311fcvt_s_d 0100000 00001 ..... ... ..... 1010011 @r2_rm 312fcvt_d_s 0100001 00000 ..... ... ..... 1010011 @r2_rm 313feq_d 1010001 ..... ..... 010 ..... 1010011 @r 314flt_d 1010001 ..... ..... 001 ..... 1010011 @r 315fle_d 1010001 ..... ..... 000 ..... 1010011 @r 316fclass_d 1110001 00000 ..... 001 ..... 1010011 @r2 317fcvt_w_d 1100001 00000 ..... ... ..... 1010011 @r2_rm 318fcvt_wu_d 1100001 00001 ..... ... ..... 1010011 @r2_rm 319fcvt_d_w 1101001 00000 ..... ... ..... 1010011 @r2_rm 320fcvt_d_wu 1101001 00001 ..... ... ..... 1010011 @r2_rm 321 322# *** RV64D Standard Extension (in addition to RV32D) *** 323fcvt_l_d 1100001 00010 ..... ... ..... 1010011 @r2_rm 324fcvt_lu_d 1100001 00011 ..... ... ..... 1010011 @r2_rm 325fmv_x_d 1110001 00000 ..... 000 ..... 1010011 @r2 326fcvt_d_l 1101001 00010 ..... ... ..... 1010011 @r2_rm 327fcvt_d_lu 1101001 00011 ..... ... ..... 1010011 @r2_rm 328fmv_d_x 1111001 00000 ..... 000 ..... 1010011 @r2 329 330# *** RV32H Base Instruction Set *** 331hlv_b 0110000 00000 ..... 100 ..... 1110011 @r2 332hlv_bu 0110000 00001 ..... 100 ..... 1110011 @r2 333hlv_h 0110010 00000 ..... 100 ..... 1110011 @r2 334hlv_hu 0110010 00001 ..... 100 ..... 1110011 @r2 335hlvx_hu 0110010 00011 ..... 100 ..... 1110011 @r2 336hlv_w 0110100 00000 ..... 100 ..... 1110011 @r2 337hlvx_wu 0110100 00011 ..... 100 ..... 1110011 @r2 338hsv_b 0110001 ..... ..... 100 00000 1110011 @r2_s 339hsv_h 0110011 ..... ..... 100 00000 1110011 @r2_s 340hsv_w 0110101 ..... ..... 100 00000 1110011 @r2_s 341hfence_gvma 0110001 ..... ..... 000 00000 1110011 @hfence_gvma 342hfence_vvma 0010001 ..... ..... 000 00000 1110011 @hfence_vvma 343 344# *** RV64H Base Instruction Set *** 345hlv_wu 0110100 00001 ..... 100 ..... 1110011 @r2 346hlv_d 0110110 00000 ..... 100 ..... 1110011 @r2 347hsv_d 0110111 ..... ..... 100 00000 1110011 @r2_s 348 349# *** Vector loads and stores are encoded within LOADFP/STORE-FP *** 350# Vector unit-stride load/store insns. 351vle8_v ... 000 . 00000 ..... 000 ..... 0000111 @r2_nfvm 352vle16_v ... 000 . 00000 ..... 101 ..... 0000111 @r2_nfvm 353vle32_v ... 000 . 00000 ..... 110 ..... 0000111 @r2_nfvm 354vle64_v ... 000 . 00000 ..... 111 ..... 0000111 @r2_nfvm 355vse8_v ... 000 . 00000 ..... 000 ..... 0100111 @r2_nfvm 356vse16_v ... 000 . 00000 ..... 101 ..... 0100111 @r2_nfvm 357vse32_v ... 000 . 00000 ..... 110 ..... 0100111 @r2_nfvm 358vse64_v ... 000 . 00000 ..... 111 ..... 0100111 @r2_nfvm 359 360# Vector unit-stride mask load/store insns. 361vlm_v 000 000 1 01011 ..... 000 ..... 0000111 @r2 362vsm_v 000 000 1 01011 ..... 000 ..... 0100111 @r2 363 364# Vector strided insns. 365vlse8_v ... 010 . ..... ..... 000 ..... 0000111 @r_nfvm 366vlse16_v ... 010 . ..... ..... 101 ..... 0000111 @r_nfvm 367vlse32_v ... 010 . ..... ..... 110 ..... 0000111 @r_nfvm 368vlse64_v ... 010 . ..... ..... 111 ..... 0000111 @r_nfvm 369vsse8_v ... 010 . ..... ..... 000 ..... 0100111 @r_nfvm 370vsse16_v ... 010 . ..... ..... 101 ..... 0100111 @r_nfvm 371vsse32_v ... 010 . ..... ..... 110 ..... 0100111 @r_nfvm 372vsse64_v ... 010 . ..... ..... 111 ..... 0100111 @r_nfvm 373 374# Vector ordered-indexed and unordered-indexed load insns. 375vlxei8_v ... 0-1 . ..... ..... 000 ..... 0000111 @r_nfvm 376vlxei16_v ... 0-1 . ..... ..... 101 ..... 0000111 @r_nfvm 377vlxei32_v ... 0-1 . ..... ..... 110 ..... 0000111 @r_nfvm 378vlxei64_v ... 0-1 . ..... ..... 111 ..... 0000111 @r_nfvm 379 380# Vector ordered-indexed and unordered-indexed store insns. 381vsxei8_v ... 0-1 . ..... ..... 000 ..... 0100111 @r_nfvm 382vsxei16_v ... 0-1 . ..... ..... 101 ..... 0100111 @r_nfvm 383vsxei32_v ... 0-1 . ..... ..... 110 ..... 0100111 @r_nfvm 384vsxei64_v ... 0-1 . ..... ..... 111 ..... 0100111 @r_nfvm 385 386# Vector unit-stride fault-only-first load insns. 387vle8ff_v ... 000 . 10000 ..... 000 ..... 0000111 @r2_nfvm 388vle16ff_v ... 000 . 10000 ..... 101 ..... 0000111 @r2_nfvm 389vle32ff_v ... 000 . 10000 ..... 110 ..... 0000111 @r2_nfvm 390vle64ff_v ... 000 . 10000 ..... 111 ..... 0000111 @r2_nfvm 391 392# Vector whole register insns 393vl1re8_v 000 000 1 01000 ..... 000 ..... 0000111 @r2 394vl1re16_v 000 000 1 01000 ..... 101 ..... 0000111 @r2 395vl1re32_v 000 000 1 01000 ..... 110 ..... 0000111 @r2 396vl1re64_v 000 000 1 01000 ..... 111 ..... 0000111 @r2 397vl2re8_v 001 000 1 01000 ..... 000 ..... 0000111 @r2 398vl2re16_v 001 000 1 01000 ..... 101 ..... 0000111 @r2 399vl2re32_v 001 000 1 01000 ..... 110 ..... 0000111 @r2 400vl2re64_v 001 000 1 01000 ..... 111 ..... 0000111 @r2 401vl4re8_v 011 000 1 01000 ..... 000 ..... 0000111 @r2 402vl4re16_v 011 000 1 01000 ..... 101 ..... 0000111 @r2 403vl4re32_v 011 000 1 01000 ..... 110 ..... 0000111 @r2 404vl4re64_v 011 000 1 01000 ..... 111 ..... 0000111 @r2 405vl8re8_v 111 000 1 01000 ..... 000 ..... 0000111 @r2 406vl8re16_v 111 000 1 01000 ..... 101 ..... 0000111 @r2 407vl8re32_v 111 000 1 01000 ..... 110 ..... 0000111 @r2 408vl8re64_v 111 000 1 01000 ..... 111 ..... 0000111 @r2 409vs1r_v 000 000 1 01000 ..... 000 ..... 0100111 @r2 410vs2r_v 001 000 1 01000 ..... 000 ..... 0100111 @r2 411vs4r_v 011 000 1 01000 ..... 000 ..... 0100111 @r2 412vs8r_v 111 000 1 01000 ..... 000 ..... 0100111 @r2 413 414# *** new major opcode OP-V *** 415vadd_vv 000000 . ..... ..... 000 ..... 1010111 @r_vm 416vadd_vx 000000 . ..... ..... 100 ..... 1010111 @r_vm 417vadd_vi 000000 . ..... ..... 011 ..... 1010111 @r_vm 418vsub_vv 000010 . ..... ..... 000 ..... 1010111 @r_vm 419vsub_vx 000010 . ..... ..... 100 ..... 1010111 @r_vm 420vrsub_vx 000011 . ..... ..... 100 ..... 1010111 @r_vm 421vrsub_vi 000011 . ..... ..... 011 ..... 1010111 @r_vm 422vwaddu_vv 110000 . ..... ..... 010 ..... 1010111 @r_vm 423vwaddu_vx 110000 . ..... ..... 110 ..... 1010111 @r_vm 424vwadd_vv 110001 . ..... ..... 010 ..... 1010111 @r_vm 425vwadd_vx 110001 . ..... ..... 110 ..... 1010111 @r_vm 426vwsubu_vv 110010 . ..... ..... 010 ..... 1010111 @r_vm 427vwsubu_vx 110010 . ..... ..... 110 ..... 1010111 @r_vm 428vwsub_vv 110011 . ..... ..... 010 ..... 1010111 @r_vm 429vwsub_vx 110011 . ..... ..... 110 ..... 1010111 @r_vm 430vwaddu_wv 110100 . ..... ..... 010 ..... 1010111 @r_vm 431vwaddu_wx 110100 . ..... ..... 110 ..... 1010111 @r_vm 432vwadd_wv 110101 . ..... ..... 010 ..... 1010111 @r_vm 433vwadd_wx 110101 . ..... ..... 110 ..... 1010111 @r_vm 434vwsubu_wv 110110 . ..... ..... 010 ..... 1010111 @r_vm 435vwsubu_wx 110110 . ..... ..... 110 ..... 1010111 @r_vm 436vwsub_wv 110111 . ..... ..... 010 ..... 1010111 @r_vm 437vwsub_wx 110111 . ..... ..... 110 ..... 1010111 @r_vm 438vadc_vvm 010000 0 ..... ..... 000 ..... 1010111 @r_vm_1 439vadc_vxm 010000 0 ..... ..... 100 ..... 1010111 @r_vm_1 440vadc_vim 010000 0 ..... ..... 011 ..... 1010111 @r_vm_1 441vmadc_vvm 010001 . ..... ..... 000 ..... 1010111 @r_vm 442vmadc_vxm 010001 . ..... ..... 100 ..... 1010111 @r_vm 443vmadc_vim 010001 . ..... ..... 011 ..... 1010111 @r_vm 444vsbc_vvm 010010 0 ..... ..... 000 ..... 1010111 @r_vm_1 445vsbc_vxm 010010 0 ..... ..... 100 ..... 1010111 @r_vm_1 446vmsbc_vvm 010011 . ..... ..... 000 ..... 1010111 @r_vm 447vmsbc_vxm 010011 . ..... ..... 100 ..... 1010111 @r_vm 448vand_vv 001001 . ..... ..... 000 ..... 1010111 @r_vm 449vand_vx 001001 . ..... ..... 100 ..... 1010111 @r_vm 450vand_vi 001001 . ..... ..... 011 ..... 1010111 @r_vm 451vor_vv 001010 . ..... ..... 000 ..... 1010111 @r_vm 452vor_vx 001010 . ..... ..... 100 ..... 1010111 @r_vm 453vor_vi 001010 . ..... ..... 011 ..... 1010111 @r_vm 454vxor_vv 001011 . ..... ..... 000 ..... 1010111 @r_vm 455vxor_vx 001011 . ..... ..... 100 ..... 1010111 @r_vm 456vxor_vi 001011 . ..... ..... 011 ..... 1010111 @r_vm 457vsll_vv 100101 . ..... ..... 000 ..... 1010111 @r_vm 458vsll_vx 100101 . ..... ..... 100 ..... 1010111 @r_vm 459vsll_vi 100101 . ..... ..... 011 ..... 1010111 @r_vm 460vsrl_vv 101000 . ..... ..... 000 ..... 1010111 @r_vm 461vsrl_vx 101000 . ..... ..... 100 ..... 1010111 @r_vm 462vsrl_vi 101000 . ..... ..... 011 ..... 1010111 @r_vm 463vsra_vv 101001 . ..... ..... 000 ..... 1010111 @r_vm 464vsra_vx 101001 . ..... ..... 100 ..... 1010111 @r_vm 465vsra_vi 101001 . ..... ..... 011 ..... 1010111 @r_vm 466vnsrl_wv 101100 . ..... ..... 000 ..... 1010111 @r_vm 467vnsrl_wx 101100 . ..... ..... 100 ..... 1010111 @r_vm 468vnsrl_wi 101100 . ..... ..... 011 ..... 1010111 @r_vm 469vnsra_wv 101101 . ..... ..... 000 ..... 1010111 @r_vm 470vnsra_wx 101101 . ..... ..... 100 ..... 1010111 @r_vm 471vnsra_wi 101101 . ..... ..... 011 ..... 1010111 @r_vm 472vmseq_vv 011000 . ..... ..... 000 ..... 1010111 @r_vm 473vmseq_vx 011000 . ..... ..... 100 ..... 1010111 @r_vm 474vmseq_vi 011000 . ..... ..... 011 ..... 1010111 @r_vm 475vmsne_vv 011001 . ..... ..... 000 ..... 1010111 @r_vm 476vmsne_vx 011001 . ..... ..... 100 ..... 1010111 @r_vm 477vmsne_vi 011001 . ..... ..... 011 ..... 1010111 @r_vm 478vmsltu_vv 011010 . ..... ..... 000 ..... 1010111 @r_vm 479vmsltu_vx 011010 . ..... ..... 100 ..... 1010111 @r_vm 480vmslt_vv 011011 . ..... ..... 000 ..... 1010111 @r_vm 481vmslt_vx 011011 . ..... ..... 100 ..... 1010111 @r_vm 482vmsleu_vv 011100 . ..... ..... 000 ..... 1010111 @r_vm 483vmsleu_vx 011100 . ..... ..... 100 ..... 1010111 @r_vm 484vmsleu_vi 011100 . ..... ..... 011 ..... 1010111 @r_vm 485vmsle_vv 011101 . ..... ..... 000 ..... 1010111 @r_vm 486vmsle_vx 011101 . ..... ..... 100 ..... 1010111 @r_vm 487vmsle_vi 011101 . ..... ..... 011 ..... 1010111 @r_vm 488vmsgtu_vx 011110 . ..... ..... 100 ..... 1010111 @r_vm 489vmsgtu_vi 011110 . ..... ..... 011 ..... 1010111 @r_vm 490vmsgt_vx 011111 . ..... ..... 100 ..... 1010111 @r_vm 491vmsgt_vi 011111 . ..... ..... 011 ..... 1010111 @r_vm 492vminu_vv 000100 . ..... ..... 000 ..... 1010111 @r_vm 493vminu_vx 000100 . ..... ..... 100 ..... 1010111 @r_vm 494vmin_vv 000101 . ..... ..... 000 ..... 1010111 @r_vm 495vmin_vx 000101 . ..... ..... 100 ..... 1010111 @r_vm 496vmaxu_vv 000110 . ..... ..... 000 ..... 1010111 @r_vm 497vmaxu_vx 000110 . ..... ..... 100 ..... 1010111 @r_vm 498vmax_vv 000111 . ..... ..... 000 ..... 1010111 @r_vm 499vmax_vx 000111 . ..... ..... 100 ..... 1010111 @r_vm 500vmul_vv 100101 . ..... ..... 010 ..... 1010111 @r_vm 501vmul_vx 100101 . ..... ..... 110 ..... 1010111 @r_vm 502vmulh_vv 100111 . ..... ..... 010 ..... 1010111 @r_vm 503vmulh_vx 100111 . ..... ..... 110 ..... 1010111 @r_vm 504vmulhu_vv 100100 . ..... ..... 010 ..... 1010111 @r_vm 505vmulhu_vx 100100 . ..... ..... 110 ..... 1010111 @r_vm 506vmulhsu_vv 100110 . ..... ..... 010 ..... 1010111 @r_vm 507vmulhsu_vx 100110 . ..... ..... 110 ..... 1010111 @r_vm 508vdivu_vv 100000 . ..... ..... 010 ..... 1010111 @r_vm 509vdivu_vx 100000 . ..... ..... 110 ..... 1010111 @r_vm 510vdiv_vv 100001 . ..... ..... 010 ..... 1010111 @r_vm 511vdiv_vx 100001 . ..... ..... 110 ..... 1010111 @r_vm 512vremu_vv 100010 . ..... ..... 010 ..... 1010111 @r_vm 513vremu_vx 100010 . ..... ..... 110 ..... 1010111 @r_vm 514vrem_vv 100011 . ..... ..... 010 ..... 1010111 @r_vm 515vrem_vx 100011 . ..... ..... 110 ..... 1010111 @r_vm 516vwmulu_vv 111000 . ..... ..... 010 ..... 1010111 @r_vm 517vwmulu_vx 111000 . ..... ..... 110 ..... 1010111 @r_vm 518vwmulsu_vv 111010 . ..... ..... 010 ..... 1010111 @r_vm 519vwmulsu_vx 111010 . ..... ..... 110 ..... 1010111 @r_vm 520vwmul_vv 111011 . ..... ..... 010 ..... 1010111 @r_vm 521vwmul_vx 111011 . ..... ..... 110 ..... 1010111 @r_vm 522vmacc_vv 101101 . ..... ..... 010 ..... 1010111 @r_vm 523vmacc_vx 101101 . ..... ..... 110 ..... 1010111 @r_vm 524vnmsac_vv 101111 . ..... ..... 010 ..... 1010111 @r_vm 525vnmsac_vx 101111 . ..... ..... 110 ..... 1010111 @r_vm 526vmadd_vv 101001 . ..... ..... 010 ..... 1010111 @r_vm 527vmadd_vx 101001 . ..... ..... 110 ..... 1010111 @r_vm 528vnmsub_vv 101011 . ..... ..... 010 ..... 1010111 @r_vm 529vnmsub_vx 101011 . ..... ..... 110 ..... 1010111 @r_vm 530vwmaccu_vv 111100 . ..... ..... 010 ..... 1010111 @r_vm 531vwmaccu_vx 111100 . ..... ..... 110 ..... 1010111 @r_vm 532vwmacc_vv 111101 . ..... ..... 010 ..... 1010111 @r_vm 533vwmacc_vx 111101 . ..... ..... 110 ..... 1010111 @r_vm 534vwmaccsu_vv 111111 . ..... ..... 010 ..... 1010111 @r_vm 535vwmaccsu_vx 111111 . ..... ..... 110 ..... 1010111 @r_vm 536vwmaccus_vx 111110 . ..... ..... 110 ..... 1010111 @r_vm 537vmv_v_v 010111 1 00000 ..... 000 ..... 1010111 @r2 538vmv_v_x 010111 1 00000 ..... 100 ..... 1010111 @r2 539vmv_v_i 010111 1 00000 ..... 011 ..... 1010111 @r2 540vmerge_vvm 010111 0 ..... ..... 000 ..... 1010111 @r_vm_0 541vmerge_vxm 010111 0 ..... ..... 100 ..... 1010111 @r_vm_0 542vmerge_vim 010111 0 ..... ..... 011 ..... 1010111 @r_vm_0 543vsaddu_vv 100000 . ..... ..... 000 ..... 1010111 @r_vm 544vsaddu_vx 100000 . ..... ..... 100 ..... 1010111 @r_vm 545vsaddu_vi 100000 . ..... ..... 011 ..... 1010111 @r_vm 546vsadd_vv 100001 . ..... ..... 000 ..... 1010111 @r_vm 547vsadd_vx 100001 . ..... ..... 100 ..... 1010111 @r_vm 548vsadd_vi 100001 . ..... ..... 011 ..... 1010111 @r_vm 549vssubu_vv 100010 . ..... ..... 000 ..... 1010111 @r_vm 550vssubu_vx 100010 . ..... ..... 100 ..... 1010111 @r_vm 551vssub_vv 100011 . ..... ..... 000 ..... 1010111 @r_vm 552vssub_vx 100011 . ..... ..... 100 ..... 1010111 @r_vm 553vaadd_vv 001001 . ..... ..... 010 ..... 1010111 @r_vm 554vaadd_vx 001001 . ..... ..... 110 ..... 1010111 @r_vm 555vaaddu_vv 001000 . ..... ..... 010 ..... 1010111 @r_vm 556vaaddu_vx 001000 . ..... ..... 110 ..... 1010111 @r_vm 557vasub_vv 001011 . ..... ..... 010 ..... 1010111 @r_vm 558vasub_vx 001011 . ..... ..... 110 ..... 1010111 @r_vm 559vasubu_vv 001010 . ..... ..... 010 ..... 1010111 @r_vm 560vasubu_vx 001010 . ..... ..... 110 ..... 1010111 @r_vm 561vsmul_vv 100111 . ..... ..... 000 ..... 1010111 @r_vm 562vsmul_vx 100111 . ..... ..... 100 ..... 1010111 @r_vm 563vssrl_vv 101010 . ..... ..... 000 ..... 1010111 @r_vm 564vssrl_vx 101010 . ..... ..... 100 ..... 1010111 @r_vm 565vssrl_vi 101010 . ..... ..... 011 ..... 1010111 @r_vm 566vssra_vv 101011 . ..... ..... 000 ..... 1010111 @r_vm 567vssra_vx 101011 . ..... ..... 100 ..... 1010111 @r_vm 568vssra_vi 101011 . ..... ..... 011 ..... 1010111 @r_vm 569vnclipu_wv 101110 . ..... ..... 000 ..... 1010111 @r_vm 570vnclipu_wx 101110 . ..... ..... 100 ..... 1010111 @r_vm 571vnclipu_wi 101110 . ..... ..... 011 ..... 1010111 @r_vm 572vnclip_wv 101111 . ..... ..... 000 ..... 1010111 @r_vm 573vnclip_wx 101111 . ..... ..... 100 ..... 1010111 @r_vm 574vnclip_wi 101111 . ..... ..... 011 ..... 1010111 @r_vm 575vfadd_vv 000000 . ..... ..... 001 ..... 1010111 @r_vm 576vfadd_vf 000000 . ..... ..... 101 ..... 1010111 @r_vm 577vfsub_vv 000010 . ..... ..... 001 ..... 1010111 @r_vm 578vfsub_vf 000010 . ..... ..... 101 ..... 1010111 @r_vm 579vfrsub_vf 100111 . ..... ..... 101 ..... 1010111 @r_vm 580vfwadd_vv 110000 . ..... ..... 001 ..... 1010111 @r_vm 581vfwadd_vf 110000 . ..... ..... 101 ..... 1010111 @r_vm 582vfwadd_wv 110100 . ..... ..... 001 ..... 1010111 @r_vm 583vfwadd_wf 110100 . ..... ..... 101 ..... 1010111 @r_vm 584vfwsub_vv 110010 . ..... ..... 001 ..... 1010111 @r_vm 585vfwsub_vf 110010 . ..... ..... 101 ..... 1010111 @r_vm 586vfwsub_wv 110110 . ..... ..... 001 ..... 1010111 @r_vm 587vfwsub_wf 110110 . ..... ..... 101 ..... 1010111 @r_vm 588vfmul_vv 100100 . ..... ..... 001 ..... 1010111 @r_vm 589vfmul_vf 100100 . ..... ..... 101 ..... 1010111 @r_vm 590vfdiv_vv 100000 . ..... ..... 001 ..... 1010111 @r_vm 591vfdiv_vf 100000 . ..... ..... 101 ..... 1010111 @r_vm 592vfrdiv_vf 100001 . ..... ..... 101 ..... 1010111 @r_vm 593vfwmul_vv 111000 . ..... ..... 001 ..... 1010111 @r_vm 594vfwmul_vf 111000 . ..... ..... 101 ..... 1010111 @r_vm 595vfmacc_vv 101100 . ..... ..... 001 ..... 1010111 @r_vm 596vfnmacc_vv 101101 . ..... ..... 001 ..... 1010111 @r_vm 597vfnmacc_vf 101101 . ..... ..... 101 ..... 1010111 @r_vm 598vfmacc_vf 101100 . ..... ..... 101 ..... 1010111 @r_vm 599vfmsac_vv 101110 . ..... ..... 001 ..... 1010111 @r_vm 600vfmsac_vf 101110 . ..... ..... 101 ..... 1010111 @r_vm 601vfnmsac_vv 101111 . ..... ..... 001 ..... 1010111 @r_vm 602vfnmsac_vf 101111 . ..... ..... 101 ..... 1010111 @r_vm 603vfmadd_vv 101000 . ..... ..... 001 ..... 1010111 @r_vm 604vfmadd_vf 101000 . ..... ..... 101 ..... 1010111 @r_vm 605vfnmadd_vv 101001 . ..... ..... 001 ..... 1010111 @r_vm 606vfnmadd_vf 101001 . ..... ..... 101 ..... 1010111 @r_vm 607vfmsub_vv 101010 . ..... ..... 001 ..... 1010111 @r_vm 608vfmsub_vf 101010 . ..... ..... 101 ..... 1010111 @r_vm 609vfnmsub_vv 101011 . ..... ..... 001 ..... 1010111 @r_vm 610vfnmsub_vf 101011 . ..... ..... 101 ..... 1010111 @r_vm 611vfwmacc_vv 111100 . ..... ..... 001 ..... 1010111 @r_vm 612vfwmacc_vf 111100 . ..... ..... 101 ..... 1010111 @r_vm 613vfwnmacc_vv 111101 . ..... ..... 001 ..... 1010111 @r_vm 614vfwnmacc_vf 111101 . ..... ..... 101 ..... 1010111 @r_vm 615vfwmsac_vv 111110 . ..... ..... 001 ..... 1010111 @r_vm 616vfwmsac_vf 111110 . ..... ..... 101 ..... 1010111 @r_vm 617vfwnmsac_vv 111111 . ..... ..... 001 ..... 1010111 @r_vm 618vfwnmsac_vf 111111 . ..... ..... 101 ..... 1010111 @r_vm 619vfsqrt_v 010011 . ..... 00000 001 ..... 1010111 @r2_vm 620vfrsqrt7_v 010011 . ..... 00100 001 ..... 1010111 @r2_vm 621vfrec7_v 010011 . ..... 00101 001 ..... 1010111 @r2_vm 622vfmin_vv 000100 . ..... ..... 001 ..... 1010111 @r_vm 623vfmin_vf 000100 . ..... ..... 101 ..... 1010111 @r_vm 624vfmax_vv 000110 . ..... ..... 001 ..... 1010111 @r_vm 625vfmax_vf 000110 . ..... ..... 101 ..... 1010111 @r_vm 626vfsgnj_vv 001000 . ..... ..... 001 ..... 1010111 @r_vm 627vfsgnj_vf 001000 . ..... ..... 101 ..... 1010111 @r_vm 628vfsgnjn_vv 001001 . ..... ..... 001 ..... 1010111 @r_vm 629vfsgnjn_vf 001001 . ..... ..... 101 ..... 1010111 @r_vm 630vfsgnjx_vv 001010 . ..... ..... 001 ..... 1010111 @r_vm 631vfsgnjx_vf 001010 . ..... ..... 101 ..... 1010111 @r_vm 632vfslide1up_vf 001110 . ..... ..... 101 ..... 1010111 @r_vm 633vfslide1down_vf 001111 . ..... ..... 101 ..... 1010111 @r_vm 634vmfeq_vv 011000 . ..... ..... 001 ..... 1010111 @r_vm 635vmfeq_vf 011000 . ..... ..... 101 ..... 1010111 @r_vm 636vmfne_vv 011100 . ..... ..... 001 ..... 1010111 @r_vm 637vmfne_vf 011100 . ..... ..... 101 ..... 1010111 @r_vm 638vmflt_vv 011011 . ..... ..... 001 ..... 1010111 @r_vm 639vmflt_vf 011011 . ..... ..... 101 ..... 1010111 @r_vm 640vmfle_vv 011001 . ..... ..... 001 ..... 1010111 @r_vm 641vmfle_vf 011001 . ..... ..... 101 ..... 1010111 @r_vm 642vmfgt_vf 011101 . ..... ..... 101 ..... 1010111 @r_vm 643vmfge_vf 011111 . ..... ..... 101 ..... 1010111 @r_vm 644vfclass_v 010011 . ..... 10000 001 ..... 1010111 @r2_vm 645vfmerge_vfm 010111 0 ..... ..... 101 ..... 1010111 @r_vm_0 646vfmv_v_f 010111 1 00000 ..... 101 ..... 1010111 @r2 647 648vfcvt_xu_f_v 010010 . ..... 00000 001 ..... 1010111 @r2_vm 649vfcvt_x_f_v 010010 . ..... 00001 001 ..... 1010111 @r2_vm 650vfcvt_f_xu_v 010010 . ..... 00010 001 ..... 1010111 @r2_vm 651vfcvt_f_x_v 010010 . ..... 00011 001 ..... 1010111 @r2_vm 652vfcvt_rtz_xu_f_v 010010 . ..... 00110 001 ..... 1010111 @r2_vm 653vfcvt_rtz_x_f_v 010010 . ..... 00111 001 ..... 1010111 @r2_vm 654 655vfwcvt_xu_f_v 010010 . ..... 01000 001 ..... 1010111 @r2_vm 656vfwcvt_x_f_v 010010 . ..... 01001 001 ..... 1010111 @r2_vm 657vfwcvt_f_xu_v 010010 . ..... 01010 001 ..... 1010111 @r2_vm 658vfwcvt_f_x_v 010010 . ..... 01011 001 ..... 1010111 @r2_vm 659vfwcvt_f_f_v 010010 . ..... 01100 001 ..... 1010111 @r2_vm 660vfwcvt_rtz_xu_f_v 010010 . ..... 01110 001 ..... 1010111 @r2_vm 661vfwcvt_rtz_x_f_v 010010 . ..... 01111 001 ..... 1010111 @r2_vm 662 663vfncvt_xu_f_w 010010 . ..... 10000 001 ..... 1010111 @r2_vm 664vfncvt_x_f_w 010010 . ..... 10001 001 ..... 1010111 @r2_vm 665vfncvt_f_xu_w 010010 . ..... 10010 001 ..... 1010111 @r2_vm 666vfncvt_f_x_w 010010 . ..... 10011 001 ..... 1010111 @r2_vm 667vfncvt_f_f_w 010010 . ..... 10100 001 ..... 1010111 @r2_vm 668vfncvt_rod_f_f_w 010010 . ..... 10101 001 ..... 1010111 @r2_vm 669vfncvt_rtz_xu_f_w 010010 . ..... 10110 001 ..... 1010111 @r2_vm 670vfncvt_rtz_x_f_w 010010 . ..... 10111 001 ..... 1010111 @r2_vm 671 672vredsum_vs 000000 . ..... ..... 010 ..... 1010111 @r_vm 673vredand_vs 000001 . ..... ..... 010 ..... 1010111 @r_vm 674vredor_vs 000010 . ..... ..... 010 ..... 1010111 @r_vm 675vredxor_vs 000011 . ..... ..... 010 ..... 1010111 @r_vm 676vredminu_vs 000100 . ..... ..... 010 ..... 1010111 @r_vm 677vredmin_vs 000101 . ..... ..... 010 ..... 1010111 @r_vm 678vredmaxu_vs 000110 . ..... ..... 010 ..... 1010111 @r_vm 679vredmax_vs 000111 . ..... ..... 010 ..... 1010111 @r_vm 680vwredsumu_vs 110000 . ..... ..... 000 ..... 1010111 @r_vm 681vwredsum_vs 110001 . ..... ..... 000 ..... 1010111 @r_vm 682# Vector ordered and unordered reduction sum 683vfredusum_vs 000001 . ..... ..... 001 ..... 1010111 @r_vm 684vfredosum_vs 000011 . ..... ..... 001 ..... 1010111 @r_vm 685vfredmin_vs 000101 . ..... ..... 001 ..... 1010111 @r_vm 686vfredmax_vs 000111 . ..... ..... 001 ..... 1010111 @r_vm 687# Vector widening ordered and unordered float reduction sum 688vfwredusum_vs 110001 . ..... ..... 001 ..... 1010111 @r_vm 689vfwredosum_vs 110011 . ..... ..... 001 ..... 1010111 @r_vm 690vmand_mm 011001 - ..... ..... 010 ..... 1010111 @r 691vmnand_mm 011101 - ..... ..... 010 ..... 1010111 @r 692vmandn_mm 011000 - ..... ..... 010 ..... 1010111 @r 693vmxor_mm 011011 - ..... ..... 010 ..... 1010111 @r 694vmor_mm 011010 - ..... ..... 010 ..... 1010111 @r 695vmnor_mm 011110 - ..... ..... 010 ..... 1010111 @r 696vmorn_mm 011100 - ..... ..... 010 ..... 1010111 @r 697vmxnor_mm 011111 - ..... ..... 010 ..... 1010111 @r 698vcpop_m 010000 . ..... 10000 010 ..... 1010111 @r2_vm 699vfirst_m 010000 . ..... 10001 010 ..... 1010111 @r2_vm 700vmsbf_m 010100 . ..... 00001 010 ..... 1010111 @r2_vm 701vmsif_m 010100 . ..... 00011 010 ..... 1010111 @r2_vm 702vmsof_m 010100 . ..... 00010 010 ..... 1010111 @r2_vm 703viota_m 010100 . ..... 10000 010 ..... 1010111 @r2_vm 704vid_v 010100 . 00000 10001 010 ..... 1010111 @r1_vm 705vmv_x_s 010000 1 ..... 00000 010 ..... 1010111 @r2rd 706vmv_s_x 010000 1 00000 ..... 110 ..... 1010111 @r2 707vfmv_f_s 010000 1 ..... 00000 001 ..... 1010111 @r2rd 708vfmv_s_f 010000 1 00000 ..... 101 ..... 1010111 @r2 709vslideup_vx 001110 . ..... ..... 100 ..... 1010111 @r_vm 710vslideup_vi 001110 . ..... ..... 011 ..... 1010111 @r_vm 711vslide1up_vx 001110 . ..... ..... 110 ..... 1010111 @r_vm 712vslidedown_vx 001111 . ..... ..... 100 ..... 1010111 @r_vm 713vslidedown_vi 001111 . ..... ..... 011 ..... 1010111 @r_vm 714vslide1down_vx 001111 . ..... ..... 110 ..... 1010111 @r_vm 715vrgather_vv 001100 . ..... ..... 000 ..... 1010111 @r_vm 716vrgatherei16_vv 001110 . ..... ..... 000 ..... 1010111 @r_vm 717vrgather_vx 001100 . ..... ..... 100 ..... 1010111 @r_vm 718vrgather_vi 001100 . ..... ..... 011 ..... 1010111 @r_vm 719vcompress_vm 010111 - ..... ..... 010 ..... 1010111 @r 720vmv1r_v 100111 1 ..... 00000 011 ..... 1010111 @r2rd 721vmv2r_v 100111 1 ..... 00001 011 ..... 1010111 @r2rd 722vmv4r_v 100111 1 ..... 00011 011 ..... 1010111 @r2rd 723vmv8r_v 100111 1 ..... 00111 011 ..... 1010111 @r2rd 724 725# Vector Integer Extension 726vzext_vf2 010010 . ..... 00110 010 ..... 1010111 @r2_vm 727vzext_vf4 010010 . ..... 00100 010 ..... 1010111 @r2_vm 728vzext_vf8 010010 . ..... 00010 010 ..... 1010111 @r2_vm 729vsext_vf2 010010 . ..... 00111 010 ..... 1010111 @r2_vm 730vsext_vf4 010010 . ..... 00101 010 ..... 1010111 @r2_vm 731vsext_vf8 010010 . ..... 00011 010 ..... 1010111 @r2_vm 732 733vsetvli 0 ........... ..... 111 ..... 1010111 @r2_zimm11 734vsetivli 11 .......... ..... 111 ..... 1010111 @r2_zimm10 735vsetvl 1000000 ..... ..... 111 ..... 1010111 @r 736 737# *** Zawrs Standard Extension *** 738wrs_nto 000000001101 00000 000 00000 1110011 739wrs_sto 000000011101 00000 000 00000 1110011 740 741# *** RV32 Zba Standard Extension *** 742sh1add 0010000 .......... 010 ..... 0110011 @r 743sh2add 0010000 .......... 100 ..... 0110011 @r 744sh3add 0010000 .......... 110 ..... 0110011 @r 745 746# *** RV64 Zba Standard Extension (in addition to RV32 Zba) *** 747add_uw 0000100 .......... 000 ..... 0111011 @r 748sh1add_uw 0010000 .......... 010 ..... 0111011 @r 749sh2add_uw 0010000 .......... 100 ..... 0111011 @r 750sh3add_uw 0010000 .......... 110 ..... 0111011 @r 751slli_uw 00001 ............ 001 ..... 0011011 @sh 752 753# *** RV32 Zbb/Zbkb Standard Extension *** 754andn 0100000 .......... 111 ..... 0110011 @r 755rol 0110000 .......... 001 ..... 0110011 @r 756ror 0110000 .......... 101 ..... 0110011 @r 757rori 01100 ............ 101 ..... 0010011 @sh 758# The encoding for rev8 differs between RV32 and RV64. 759# rev8_32 denotes the RV32 variant. 760rev8_32 011010 011000 ..... 101 ..... 0010011 @r2 761# The encoding for zext.h differs between RV32 and RV64. 762# zext_h_32 denotes the RV32 variant. 763{ 764 zext_h_32 0000100 00000 ..... 100 ..... 0110011 @r2 765 pack 0000100 ..... ..... 100 ..... 0110011 @r 766} 767xnor 0100000 .......... 100 ..... 0110011 @r 768# *** RV32 extra Zbb Standard Extension *** 769clz 011000 000000 ..... 001 ..... 0010011 @r2 770cpop 011000 000010 ..... 001 ..... 0010011 @r2 771ctz 011000 000001 ..... 001 ..... 0010011 @r2 772max 0000101 .......... 110 ..... 0110011 @r 773maxu 0000101 .......... 111 ..... 0110011 @r 774min 0000101 .......... 100 ..... 0110011 @r 775minu 0000101 .......... 101 ..... 0110011 @r 776orc_b 001010 000111 ..... 101 ..... 0010011 @r2 777orn 0100000 .......... 110 ..... 0110011 @r 778sext_b 011000 000100 ..... 001 ..... 0010011 @r2 779sext_h 011000 000101 ..... 001 ..... 0010011 @r2 780# *** RV32 extra Zbkb Standard Extension *** 781brev8 0110100 00111 ..... 101 ..... 0010011 @r2 #grevi 782packh 0000100 .......... 111 ..... 0110011 @r 783unzip 0000100 01111 ..... 101 ..... 0010011 @r2 #unshfl 784zip 0000100 01111 ..... 001 ..... 0010011 @r2 #shfl 785 786# *** RV64 Zbb/Zbkb Standard Extension (in addition to RV32 Zbb/Zbkb) *** 787# The encoding for rev8 differs between RV32 and RV64. 788# When executing on RV64, the encoding used in RV32 is an illegal 789# instruction, so we use different handler functions to differentiate. 790rev8_64 011010 111000 ..... 101 ..... 0010011 @r2 791rolw 0110000 .......... 001 ..... 0111011 @r 792roriw 0110000 .......... 101 ..... 0011011 @sh5 793rorw 0110000 .......... 101 ..... 0111011 @r 794# The encoding for zext.h differs between RV32 and RV64. 795# When executing on RV64, the encoding used in RV32 is an illegal 796# instruction, so we use different handler functions to differentiate. 797{ 798 zext_h_64 0000100 00000 ..... 100 ..... 0111011 @r2 799 packw 0000100 ..... ..... 100 ..... 0111011 @r 800} 801# *** RV64 extra Zbb Standard Extension (in addition to RV32 Zbb) *** 802clzw 0110000 00000 ..... 001 ..... 0011011 @r2 803ctzw 0110000 00001 ..... 001 ..... 0011011 @r2 804cpopw 0110000 00010 ..... 001 ..... 0011011 @r2 805 806# *** RV32 Zbc/Zbkc Standard Extension *** 807clmul 0000101 .......... 001 ..... 0110011 @r 808clmulh 0000101 .......... 011 ..... 0110011 @r 809# *** RV32 extra Zbc Standard Extension *** 810clmulr 0000101 .......... 010 ..... 0110011 @r 811 812# *** RV32 Zbkx Standard Extension *** 813xperm4 0010100 .......... 010 ..... 0110011 @r 814xperm8 0010100 .......... 100 ..... 0110011 @r 815 816# *** RV32 Zbs Standard Extension *** 817bclr 0100100 .......... 001 ..... 0110011 @r 818bclri 01001. ........... 001 ..... 0010011 @sh 819bext 0100100 .......... 101 ..... 0110011 @r 820bexti 01001. ........... 101 ..... 0010011 @sh 821binv 0110100 .......... 001 ..... 0110011 @r 822binvi 01101. ........... 001 ..... 0010011 @sh 823bset 0010100 .......... 001 ..... 0110011 @r 824bseti 00101. ........... 001 ..... 0010011 @sh 825 826# *** Zfa Standard Extension *** 827fli_s 1111000 00001 ..... 000 ..... 1010011 @r2 828fli_d 1111001 00001 ..... 000 ..... 1010011 @r2 829fli_h 1111010 00001 ..... 000 ..... 1010011 @r2 830fminm_s 0010100 ..... ..... 010 ..... 1010011 @r 831fmaxm_s 0010100 ..... ..... 011 ..... 1010011 @r 832fminm_d 0010101 ..... ..... 010 ..... 1010011 @r 833fmaxm_d 0010101 ..... ..... 011 ..... 1010011 @r 834fminm_h 0010110 ..... ..... 010 ..... 1010011 @r 835fmaxm_h 0010110 ..... ..... 011 ..... 1010011 @r 836fround_s 0100000 00100 ..... ... ..... 1010011 @r2_rm 837froundnx_s 0100000 00101 ..... ... ..... 1010011 @r2_rm 838fround_d 0100001 00100 ..... ... ..... 1010011 @r2_rm 839froundnx_d 0100001 00101 ..... ... ..... 1010011 @r2_rm 840fround_h 0100010 00100 ..... ... ..... 1010011 @r2_rm 841froundnx_h 0100010 00101 ..... ... ..... 1010011 @r2_rm 842fcvtmod_w_d 1100001 01000 ..... 001 ..... 1010011 @r2 843fmvh_x_d 1110001 00001 ..... 000 ..... 1010011 @r2 844fmvp_d_x 1011001 ..... ..... 000 ..... 1010011 @r 845fleq_s 1010000 ..... ..... 100 ..... 1010011 @r 846fltq_s 1010000 ..... ..... 101 ..... 1010011 @r 847fleq_d 1010001 ..... ..... 100 ..... 1010011 @r 848fltq_d 1010001 ..... ..... 101 ..... 1010011 @r 849fleq_h 1010010 ..... ..... 100 ..... 1010011 @r 850fltq_h 1010010 ..... ..... 101 ..... 1010011 @r 851 852# *** RV32 Zfh Extension *** 853flh ............ ..... 001 ..... 0000111 @i 854fsh ....... ..... ..... 001 ..... 0100111 @s 855fmadd_h ..... 10 ..... ..... ... ..... 1000011 @r4_rm 856fmsub_h ..... 10 ..... ..... ... ..... 1000111 @r4_rm 857fnmsub_h ..... 10 ..... ..... ... ..... 1001011 @r4_rm 858fnmadd_h ..... 10 ..... ..... ... ..... 1001111 @r4_rm 859fadd_h 0000010 ..... ..... ... ..... 1010011 @r_rm 860fsub_h 0000110 ..... ..... ... ..... 1010011 @r_rm 861fmul_h 0001010 ..... ..... ... ..... 1010011 @r_rm 862fdiv_h 0001110 ..... ..... ... ..... 1010011 @r_rm 863fsqrt_h 0101110 00000 ..... ... ..... 1010011 @r2_rm 864fsgnj_h 0010010 ..... ..... 000 ..... 1010011 @r 865fsgnjn_h 0010010 ..... ..... 001 ..... 1010011 @r 866fsgnjx_h 0010010 ..... ..... 010 ..... 1010011 @r 867fmin_h 0010110 ..... ..... 000 ..... 1010011 @r 868fmax_h 0010110 ..... ..... 001 ..... 1010011 @r 869fcvt_h_s 0100010 00000 ..... ... ..... 1010011 @r2_rm 870fcvt_s_h 0100000 00010 ..... ... ..... 1010011 @r2_rm 871fcvt_h_d 0100010 00001 ..... ... ..... 1010011 @r2_rm 872fcvt_d_h 0100001 00010 ..... ... ..... 1010011 @r2_rm 873fcvt_w_h 1100010 00000 ..... ... ..... 1010011 @r2_rm 874fcvt_wu_h 1100010 00001 ..... ... ..... 1010011 @r2_rm 875fmv_x_h 1110010 00000 ..... 000 ..... 1010011 @r2 876feq_h 1010010 ..... ..... 010 ..... 1010011 @r 877flt_h 1010010 ..... ..... 001 ..... 1010011 @r 878fle_h 1010010 ..... ..... 000 ..... 1010011 @r 879fclass_h 1110010 00000 ..... 001 ..... 1010011 @r2 880fcvt_h_w 1101010 00000 ..... ... ..... 1010011 @r2_rm 881fcvt_h_wu 1101010 00001 ..... ... ..... 1010011 @r2_rm 882fmv_h_x 1111010 00000 ..... 000 ..... 1010011 @r2 883 884# *** RV64 Zfh Extension (in addition to RV32 Zfh) *** 885fcvt_l_h 1100010 00010 ..... ... ..... 1010011 @r2_rm 886fcvt_lu_h 1100010 00011 ..... ... ..... 1010011 @r2_rm 887fcvt_h_l 1101010 00010 ..... ... ..... 1010011 @r2_rm 888fcvt_h_lu 1101010 00011 ..... ... ..... 1010011 @r2_rm 889 890# *** Svinval Standard Extension *** 891sinval_vma 0001011 ..... ..... 000 00000 1110011 @sfence_vma 892sfence_w_inval 0001100 00000 00000 000 00000 1110011 893sfence_inval_ir 0001100 00001 00000 000 00000 1110011 894hinval_vvma 0010011 ..... ..... 000 00000 1110011 @hfence_vvma 895hinval_gvma 0110011 ..... ..... 000 00000 1110011 @hfence_gvma 896 897# *** RV32 Zknd Standard Extension *** 898aes32dsmi .. 10111 ..... ..... 000 ..... 0110011 @k_aes 899aes32dsi .. 10101 ..... ..... 000 ..... 0110011 @k_aes 900# *** RV64 Zknd Standard Extension *** 901aes64dsm 00 11111 ..... ..... 000 ..... 0110011 @r 902aes64ds 00 11101 ..... ..... 000 ..... 0110011 @r 903aes64im 00 11000 00000 ..... 001 ..... 0010011 @r2 904# *** RV32 Zkne Standard Extension *** 905aes32esmi .. 10011 ..... ..... 000 ..... 0110011 @k_aes 906aes32esi .. 10001 ..... ..... 000 ..... 0110011 @k_aes 907# *** RV64 Zkne Standard Extension *** 908aes64es 00 11001 ..... ..... 000 ..... 0110011 @r 909aes64esm 00 11011 ..... ..... 000 ..... 0110011 @r 910# *** RV64 Zkne/zknd Standard Extension *** 911aes64ks2 01 11111 ..... ..... 000 ..... 0110011 @r 912aes64ks1i 00 11000 1.... ..... 001 ..... 0010011 @i_aes 913# *** RV32 Zknh Standard Extension *** 914sha256sig0 00 01000 00010 ..... 001 ..... 0010011 @r2 915sha256sig1 00 01000 00011 ..... 001 ..... 0010011 @r2 916sha256sum0 00 01000 00000 ..... 001 ..... 0010011 @r2 917sha256sum1 00 01000 00001 ..... 001 ..... 0010011 @r2 918sha512sum0r 01 01000 ..... ..... 000 ..... 0110011 @r 919sha512sum1r 01 01001 ..... ..... 000 ..... 0110011 @r 920sha512sig0l 01 01010 ..... ..... 000 ..... 0110011 @r 921sha512sig0h 01 01110 ..... ..... 000 ..... 0110011 @r 922sha512sig1l 01 01011 ..... ..... 000 ..... 0110011 @r 923sha512sig1h 01 01111 ..... ..... 000 ..... 0110011 @r 924# *** RV64 Zknh Standard Extension *** 925sha512sig0 00 01000 00110 ..... 001 ..... 0010011 @r2 926sha512sig1 00 01000 00111 ..... 001 ..... 0010011 @r2 927sha512sum0 00 01000 00100 ..... 001 ..... 0010011 @r2 928sha512sum1 00 01000 00101 ..... 001 ..... 0010011 @r2 929# *** RV32 Zksh Standard Extension *** 930sm3p0 00 01000 01000 ..... 001 ..... 0010011 @r2 931sm3p1 00 01000 01001 ..... 001 ..... 0010011 @r2 932# *** RV32 Zksed Standard Extension *** 933sm4ed .. 11000 ..... ..... 000 ..... 0110011 @k_aes 934sm4ks .. 11010 ..... ..... 000 ..... 0110011 @k_aes 935 936# *** RV32 Zicond Standard Extension *** 937czero_eqz 0000111 ..... ..... 101 ..... 0110011 @r 938czero_nez 0000111 ..... ..... 111 ..... 0110011 @r 939 940# *** Zfbfmin Standard Extension *** 941fcvt_bf16_s 0100010 01000 ..... ... ..... 1010011 @r2_rm 942fcvt_s_bf16 0100000 00110 ..... ... ..... 1010011 @r2_rm 943 944# *** Zvfbfmin Standard Extension *** 945vfncvtbf16_f_f_w 010010 . ..... 11101 001 ..... 1010111 @r2_vm 946vfwcvtbf16_f_f_v 010010 . ..... 01101 001 ..... 1010111 @r2_vm 947 948# *** Zvfbfwma Standard Extension *** 949vfwmaccbf16_vv 111011 . ..... ..... 001 ..... 1010111 @r_vm 950vfwmaccbf16_vf 111011 . ..... ..... 101 ..... 1010111 @r_vm 951 952# *** Zvbc vector crypto extension *** 953vclmul_vv 001100 . ..... ..... 010 ..... 1010111 @r_vm 954vclmul_vx 001100 . ..... ..... 110 ..... 1010111 @r_vm 955vclmulh_vv 001101 . ..... ..... 010 ..... 1010111 @r_vm 956vclmulh_vx 001101 . ..... ..... 110 ..... 1010111 @r_vm 957 958# *** Zvbb vector crypto extension *** 959vrol_vv 010101 . ..... ..... 000 ..... 1010111 @r_vm 960vrol_vx 010101 . ..... ..... 100 ..... 1010111 @r_vm 961vror_vv 010100 . ..... ..... 000 ..... 1010111 @r_vm 962vror_vx 010100 . ..... ..... 100 ..... 1010111 @r_vm 963vror_vi 01010. . ..... ..... 011 ..... 1010111 @r2_zimm6 964vbrev8_v 010010 . ..... 01000 010 ..... 1010111 @r2_vm 965vrev8_v 010010 . ..... 01001 010 ..... 1010111 @r2_vm 966vandn_vv 000001 . ..... ..... 000 ..... 1010111 @r_vm 967vandn_vx 000001 . ..... ..... 100 ..... 1010111 @r_vm 968vbrev_v 010010 . ..... 01010 010 ..... 1010111 @r2_vm 969vclz_v 010010 . ..... 01100 010 ..... 1010111 @r2_vm 970vctz_v 010010 . ..... 01101 010 ..... 1010111 @r2_vm 971vcpop_v 010010 . ..... 01110 010 ..... 1010111 @r2_vm 972vwsll_vv 110101 . ..... ..... 000 ..... 1010111 @r_vm 973vwsll_vx 110101 . ..... ..... 100 ..... 1010111 @r_vm 974vwsll_vi 110101 . ..... ..... 011 ..... 1010111 @r_vm 975