xref: /openbmc/qemu/target/riscv/cpu_cfg.h (revision 9c255cb5)
1 /*
2  * QEMU RISC-V CPU CFG
3  *
4  * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu
5  * Copyright (c) 2017-2018 SiFive, Inc.
6  * Copyright (c) 2021-2023 PLCT Lab
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms and conditions of the GNU General Public License,
10  * version 2 or later, as published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along with
18  * this program.  If not, see <http://www.gnu.org/licenses/>.
19  */
20 
21 #ifndef RISCV_CPU_CFG_H
22 #define RISCV_CPU_CFG_H
23 
24 /*
25  * map is a 16-bit bitmap: the most significant set bit in map is the maximum
26  * satp mode that is supported. It may be chosen by the user and must respect
27  * what qemu implements (valid_1_10_32/64) and what the hw is capable of
28  * (supported bitmap below).
29  *
30  * init is a 16-bit bitmap used to make sure the user selected a correct
31  * configuration as per the specification.
32  *
33  * supported is a 16-bit bitmap used to reflect the hw capabilities.
34  */
35 typedef struct {
36     uint16_t map, init, supported;
37 } RISCVSATPMap;
38 
39 struct RISCVCPUConfig {
40     bool ext_zba;
41     bool ext_zbb;
42     bool ext_zbc;
43     bool ext_zbkb;
44     bool ext_zbkc;
45     bool ext_zbkx;
46     bool ext_zbs;
47     bool ext_zca;
48     bool ext_zcb;
49     bool ext_zcd;
50     bool ext_zce;
51     bool ext_zcf;
52     bool ext_zcmp;
53     bool ext_zcmt;
54     bool ext_zk;
55     bool ext_zkn;
56     bool ext_zknd;
57     bool ext_zkne;
58     bool ext_zknh;
59     bool ext_zkr;
60     bool ext_zks;
61     bool ext_zksed;
62     bool ext_zksh;
63     bool ext_zkt;
64     bool ext_ifencei;
65     bool ext_icsr;
66     bool ext_icbom;
67     bool ext_icboz;
68     bool ext_zicond;
69     bool ext_zihintpause;
70     bool ext_smstateen;
71     bool ext_sstc;
72     bool ext_svadu;
73     bool ext_svinval;
74     bool ext_svnapot;
75     bool ext_svpbmt;
76     bool ext_zdinx;
77     bool ext_zawrs;
78     bool ext_zfa;
79     bool ext_zfbfmin;
80     bool ext_zfh;
81     bool ext_zfhmin;
82     bool ext_zfinx;
83     bool ext_zhinx;
84     bool ext_zhinxmin;
85     bool ext_zve32f;
86     bool ext_zve64f;
87     bool ext_zve64d;
88     bool ext_zmmul;
89     bool ext_zvfbfmin;
90     bool ext_zvfbfwma;
91     bool ext_zvfh;
92     bool ext_zvfhmin;
93     bool ext_smaia;
94     bool ext_ssaia;
95     bool ext_sscofpmf;
96     bool rvv_ta_all_1s;
97     bool rvv_ma_all_1s;
98 
99     uint32_t mvendorid;
100     uint64_t marchid;
101     uint64_t mimpid;
102 
103     /* Vendor-specific custom extensions */
104     bool ext_xtheadba;
105     bool ext_xtheadbb;
106     bool ext_xtheadbs;
107     bool ext_xtheadcmo;
108     bool ext_xtheadcondmov;
109     bool ext_xtheadfmemidx;
110     bool ext_xtheadfmv;
111     bool ext_xtheadmac;
112     bool ext_xtheadmemidx;
113     bool ext_xtheadmempair;
114     bool ext_xtheadsync;
115     bool ext_XVentanaCondOps;
116 
117     uint8_t pmu_num;
118     char *priv_spec;
119     char *user_spec;
120     char *bext_spec;
121     char *vext_spec;
122     uint16_t vlen;
123     uint16_t elen;
124     uint16_t cbom_blocksize;
125     uint16_t cboz_blocksize;
126     bool mmu;
127     bool pmp;
128     bool epmp;
129     bool debug;
130     bool misa_w;
131 
132     bool short_isa_string;
133 
134 #ifndef CONFIG_USER_ONLY
135     RISCVSATPMap satp_mode;
136 #endif
137 };
138 
139 typedef struct RISCVCPUConfig RISCVCPUConfig;
140 
141 /* Helper functions to test for extensions.  */
142 
143 static inline bool always_true_p(const RISCVCPUConfig *cfg __attribute__((__unused__)))
144 {
145     return true;
146 }
147 
148 static inline bool has_xthead_p(const RISCVCPUConfig *cfg)
149 {
150     return cfg->ext_xtheadba || cfg->ext_xtheadbb ||
151            cfg->ext_xtheadbs || cfg->ext_xtheadcmo ||
152            cfg->ext_xtheadcondmov ||
153            cfg->ext_xtheadfmemidx || cfg->ext_xtheadfmv ||
154            cfg->ext_xtheadmac || cfg->ext_xtheadmemidx ||
155            cfg->ext_xtheadmempair || cfg->ext_xtheadsync;
156 }
157 
158 #define MATERIALISE_EXT_PREDICATE(ext) \
159     static inline bool has_ ## ext ## _p(const RISCVCPUConfig *cfg) \
160     { \
161         return cfg->ext_ ## ext ; \
162     }
163 
164 MATERIALISE_EXT_PREDICATE(xtheadba)
165 MATERIALISE_EXT_PREDICATE(xtheadbb)
166 MATERIALISE_EXT_PREDICATE(xtheadbs)
167 MATERIALISE_EXT_PREDICATE(xtheadcmo)
168 MATERIALISE_EXT_PREDICATE(xtheadcondmov)
169 MATERIALISE_EXT_PREDICATE(xtheadfmemidx)
170 MATERIALISE_EXT_PREDICATE(xtheadfmv)
171 MATERIALISE_EXT_PREDICATE(xtheadmac)
172 MATERIALISE_EXT_PREDICATE(xtheadmemidx)
173 MATERIALISE_EXT_PREDICATE(xtheadmempair)
174 MATERIALISE_EXT_PREDICATE(xtheadsync)
175 MATERIALISE_EXT_PREDICATE(XVentanaCondOps)
176 
177 #endif
178