1 /* RISC-V ISA constants */ 2 3 #define get_field(reg, mask) (((reg) & \ 4 (target_ulong)(mask)) / ((mask) & ~((mask) << 1))) 5 #define set_field(reg, mask, val) (((reg) & ~(target_ulong)(mask)) | \ 6 (((target_ulong)(val) * ((mask) & ~((mask) << 1))) & \ 7 (target_ulong)(mask))) 8 9 #define PGSHIFT 12 10 11 #define FSR_RD_SHIFT 5 12 #define FSR_RD (0x7 << FSR_RD_SHIFT) 13 14 #define FPEXC_NX 0x01 15 #define FPEXC_UF 0x02 16 #define FPEXC_OF 0x04 17 #define FPEXC_DZ 0x08 18 #define FPEXC_NV 0x10 19 20 #define FSR_AEXC_SHIFT 0 21 #define FSR_NVA (FPEXC_NV << FSR_AEXC_SHIFT) 22 #define FSR_OFA (FPEXC_OF << FSR_AEXC_SHIFT) 23 #define FSR_UFA (FPEXC_UF << FSR_AEXC_SHIFT) 24 #define FSR_DZA (FPEXC_DZ << FSR_AEXC_SHIFT) 25 #define FSR_NXA (FPEXC_NX << FSR_AEXC_SHIFT) 26 #define FSR_AEXC (FSR_NVA | FSR_OFA | FSR_UFA | FSR_DZA | FSR_NXA) 27 28 /* CSR numbers */ 29 #define CSR_FFLAGS 0x1 30 #define CSR_FRM 0x2 31 #define CSR_FCSR 0x3 32 #define CSR_CYCLE 0xc00 33 #define CSR_TIME 0xc01 34 #define CSR_INSTRET 0xc02 35 #define CSR_HPMCOUNTER3 0xc03 36 #define CSR_HPMCOUNTER4 0xc04 37 #define CSR_HPMCOUNTER5 0xc05 38 #define CSR_HPMCOUNTER6 0xc06 39 #define CSR_HPMCOUNTER7 0xc07 40 #define CSR_HPMCOUNTER8 0xc08 41 #define CSR_HPMCOUNTER9 0xc09 42 #define CSR_HPMCOUNTER10 0xc0a 43 #define CSR_HPMCOUNTER11 0xc0b 44 #define CSR_HPMCOUNTER12 0xc0c 45 #define CSR_HPMCOUNTER13 0xc0d 46 #define CSR_HPMCOUNTER14 0xc0e 47 #define CSR_HPMCOUNTER15 0xc0f 48 #define CSR_HPMCOUNTER16 0xc10 49 #define CSR_HPMCOUNTER17 0xc11 50 #define CSR_HPMCOUNTER18 0xc12 51 #define CSR_HPMCOUNTER19 0xc13 52 #define CSR_HPMCOUNTER20 0xc14 53 #define CSR_HPMCOUNTER21 0xc15 54 #define CSR_HPMCOUNTER22 0xc16 55 #define CSR_HPMCOUNTER23 0xc17 56 #define CSR_HPMCOUNTER24 0xc18 57 #define CSR_HPMCOUNTER25 0xc19 58 #define CSR_HPMCOUNTER26 0xc1a 59 #define CSR_HPMCOUNTER27 0xc1b 60 #define CSR_HPMCOUNTER28 0xc1c 61 #define CSR_HPMCOUNTER29 0xc1d 62 #define CSR_HPMCOUNTER30 0xc1e 63 #define CSR_HPMCOUNTER31 0xc1f 64 #define CSR_SSTATUS 0x100 65 #define CSR_SIE 0x104 66 #define CSR_STVEC 0x105 67 #define CSR_SCOUNTEREN 0x106 68 #define CSR_SSCRATCH 0x140 69 #define CSR_SEPC 0x141 70 #define CSR_SCAUSE 0x142 71 #define CSR_SBADADDR 0x143 72 #define CSR_SIP 0x144 73 #define CSR_SPTBR 0x180 74 #define CSR_SATP 0x180 75 #define CSR_MSTATUS 0x300 76 #define CSR_MISA 0x301 77 #define CSR_MEDELEG 0x302 78 #define CSR_MIDELEG 0x303 79 #define CSR_MIE 0x304 80 #define CSR_MTVEC 0x305 81 #define CSR_MCOUNTEREN 0x306 82 #define CSR_MSCRATCH 0x340 83 #define CSR_MEPC 0x341 84 #define CSR_MCAUSE 0x342 85 #define CSR_MBADADDR 0x343 86 #define CSR_MIP 0x344 87 #define CSR_PMPCFG0 0x3a0 88 #define CSR_PMPCFG1 0x3a1 89 #define CSR_PMPCFG2 0x3a2 90 #define CSR_PMPCFG3 0x3a3 91 #define CSR_PMPADDR0 0x3b0 92 #define CSR_PMPADDR1 0x3b1 93 #define CSR_PMPADDR2 0x3b2 94 #define CSR_PMPADDR3 0x3b3 95 #define CSR_PMPADDR4 0x3b4 96 #define CSR_PMPADDR5 0x3b5 97 #define CSR_PMPADDR6 0x3b6 98 #define CSR_PMPADDR7 0x3b7 99 #define CSR_PMPADDR8 0x3b8 100 #define CSR_PMPADDR9 0x3b9 101 #define CSR_PMPADDR10 0x3ba 102 #define CSR_PMPADDR11 0x3bb 103 #define CSR_PMPADDR12 0x3bc 104 #define CSR_PMPADDR13 0x3bd 105 #define CSR_PMPADDR14 0x3be 106 #define CSR_PMPADDR15 0x3bf 107 #define CSR_TSELECT 0x7a0 108 #define CSR_TDATA1 0x7a1 109 #define CSR_TDATA2 0x7a2 110 #define CSR_TDATA3 0x7a3 111 #define CSR_DCSR 0x7b0 112 #define CSR_DPC 0x7b1 113 #define CSR_DSCRATCH 0x7b2 114 #define CSR_MCYCLE 0xb00 115 #define CSR_MINSTRET 0xb02 116 #define CSR_MHPMCOUNTER3 0xb03 117 #define CSR_MHPMCOUNTER4 0xb04 118 #define CSR_MHPMCOUNTER5 0xb05 119 #define CSR_MHPMCOUNTER6 0xb06 120 #define CSR_MHPMCOUNTER7 0xb07 121 #define CSR_MHPMCOUNTER8 0xb08 122 #define CSR_MHPMCOUNTER9 0xb09 123 #define CSR_MHPMCOUNTER10 0xb0a 124 #define CSR_MHPMCOUNTER11 0xb0b 125 #define CSR_MHPMCOUNTER12 0xb0c 126 #define CSR_MHPMCOUNTER13 0xb0d 127 #define CSR_MHPMCOUNTER14 0xb0e 128 #define CSR_MHPMCOUNTER15 0xb0f 129 #define CSR_MHPMCOUNTER16 0xb10 130 #define CSR_MHPMCOUNTER17 0xb11 131 #define CSR_MHPMCOUNTER18 0xb12 132 #define CSR_MHPMCOUNTER19 0xb13 133 #define CSR_MHPMCOUNTER20 0xb14 134 #define CSR_MHPMCOUNTER21 0xb15 135 #define CSR_MHPMCOUNTER22 0xb16 136 #define CSR_MHPMCOUNTER23 0xb17 137 #define CSR_MHPMCOUNTER24 0xb18 138 #define CSR_MHPMCOUNTER25 0xb19 139 #define CSR_MHPMCOUNTER26 0xb1a 140 #define CSR_MHPMCOUNTER27 0xb1b 141 #define CSR_MHPMCOUNTER28 0xb1c 142 #define CSR_MHPMCOUNTER29 0xb1d 143 #define CSR_MHPMCOUNTER30 0xb1e 144 #define CSR_MHPMCOUNTER31 0xb1f 145 #define CSR_MUCOUNTEREN 0x320 146 #define CSR_MSCOUNTEREN 0x321 147 #define CSR_MHPMEVENT3 0x323 148 #define CSR_MHPMEVENT4 0x324 149 #define CSR_MHPMEVENT5 0x325 150 #define CSR_MHPMEVENT6 0x326 151 #define CSR_MHPMEVENT7 0x327 152 #define CSR_MHPMEVENT8 0x328 153 #define CSR_MHPMEVENT9 0x329 154 #define CSR_MHPMEVENT10 0x32a 155 #define CSR_MHPMEVENT11 0x32b 156 #define CSR_MHPMEVENT12 0x32c 157 #define CSR_MHPMEVENT13 0x32d 158 #define CSR_MHPMEVENT14 0x32e 159 #define CSR_MHPMEVENT15 0x32f 160 #define CSR_MHPMEVENT16 0x330 161 #define CSR_MHPMEVENT17 0x331 162 #define CSR_MHPMEVENT18 0x332 163 #define CSR_MHPMEVENT19 0x333 164 #define CSR_MHPMEVENT20 0x334 165 #define CSR_MHPMEVENT21 0x335 166 #define CSR_MHPMEVENT22 0x336 167 #define CSR_MHPMEVENT23 0x337 168 #define CSR_MHPMEVENT24 0x338 169 #define CSR_MHPMEVENT25 0x339 170 #define CSR_MHPMEVENT26 0x33a 171 #define CSR_MHPMEVENT27 0x33b 172 #define CSR_MHPMEVENT28 0x33c 173 #define CSR_MHPMEVENT29 0x33d 174 #define CSR_MHPMEVENT30 0x33e 175 #define CSR_MHPMEVENT31 0x33f 176 #define CSR_MVENDORID 0xf11 177 #define CSR_MARCHID 0xf12 178 #define CSR_MIMPID 0xf13 179 #define CSR_MHARTID 0xf14 180 #define CSR_CYCLEH 0xc80 181 #define CSR_TIMEH 0xc81 182 #define CSR_INSTRETH 0xc82 183 #define CSR_HPMCOUNTER3H 0xc83 184 #define CSR_HPMCOUNTER4H 0xc84 185 #define CSR_HPMCOUNTER5H 0xc85 186 #define CSR_HPMCOUNTER6H 0xc86 187 #define CSR_HPMCOUNTER7H 0xc87 188 #define CSR_HPMCOUNTER8H 0xc88 189 #define CSR_HPMCOUNTER9H 0xc89 190 #define CSR_HPMCOUNTER10H 0xc8a 191 #define CSR_HPMCOUNTER11H 0xc8b 192 #define CSR_HPMCOUNTER12H 0xc8c 193 #define CSR_HPMCOUNTER13H 0xc8d 194 #define CSR_HPMCOUNTER14H 0xc8e 195 #define CSR_HPMCOUNTER15H 0xc8f 196 #define CSR_HPMCOUNTER16H 0xc90 197 #define CSR_HPMCOUNTER17H 0xc91 198 #define CSR_HPMCOUNTER18H 0xc92 199 #define CSR_HPMCOUNTER19H 0xc93 200 #define CSR_HPMCOUNTER20H 0xc94 201 #define CSR_HPMCOUNTER21H 0xc95 202 #define CSR_HPMCOUNTER22H 0xc96 203 #define CSR_HPMCOUNTER23H 0xc97 204 #define CSR_HPMCOUNTER24H 0xc98 205 #define CSR_HPMCOUNTER25H 0xc99 206 #define CSR_HPMCOUNTER26H 0xc9a 207 #define CSR_HPMCOUNTER27H 0xc9b 208 #define CSR_HPMCOUNTER28H 0xc9c 209 #define CSR_HPMCOUNTER29H 0xc9d 210 #define CSR_HPMCOUNTER30H 0xc9e 211 #define CSR_HPMCOUNTER31H 0xc9f 212 #define CSR_MCYCLEH 0xb80 213 #define CSR_MINSTRETH 0xb82 214 #define CSR_MHPMCOUNTER3H 0xb83 215 #define CSR_MHPMCOUNTER4H 0xb84 216 #define CSR_MHPMCOUNTER5H 0xb85 217 #define CSR_MHPMCOUNTER6H 0xb86 218 #define CSR_MHPMCOUNTER7H 0xb87 219 #define CSR_MHPMCOUNTER8H 0xb88 220 #define CSR_MHPMCOUNTER9H 0xb89 221 #define CSR_MHPMCOUNTER10H 0xb8a 222 #define CSR_MHPMCOUNTER11H 0xb8b 223 #define CSR_MHPMCOUNTER12H 0xb8c 224 #define CSR_MHPMCOUNTER13H 0xb8d 225 #define CSR_MHPMCOUNTER14H 0xb8e 226 #define CSR_MHPMCOUNTER15H 0xb8f 227 #define CSR_MHPMCOUNTER16H 0xb90 228 #define CSR_MHPMCOUNTER17H 0xb91 229 #define CSR_MHPMCOUNTER18H 0xb92 230 #define CSR_MHPMCOUNTER19H 0xb93 231 #define CSR_MHPMCOUNTER20H 0xb94 232 #define CSR_MHPMCOUNTER21H 0xb95 233 #define CSR_MHPMCOUNTER22H 0xb96 234 #define CSR_MHPMCOUNTER23H 0xb97 235 #define CSR_MHPMCOUNTER24H 0xb98 236 #define CSR_MHPMCOUNTER25H 0xb99 237 #define CSR_MHPMCOUNTER26H 0xb9a 238 #define CSR_MHPMCOUNTER27H 0xb9b 239 #define CSR_MHPMCOUNTER28H 0xb9c 240 #define CSR_MHPMCOUNTER29H 0xb9d 241 #define CSR_MHPMCOUNTER30H 0xb9e 242 #define CSR_MHPMCOUNTER31H 0xb9f 243 244 /* mstatus bits */ 245 #define MSTATUS_UIE 0x00000001 246 #define MSTATUS_SIE 0x00000002 247 #define MSTATUS_HIE 0x00000004 248 #define MSTATUS_MIE 0x00000008 249 #define MSTATUS_UPIE 0x00000010 250 #define MSTATUS_SPIE 0x00000020 251 #define MSTATUS_HPIE 0x00000040 252 #define MSTATUS_MPIE 0x00000080 253 #define MSTATUS_SPP 0x00000100 254 #define MSTATUS_HPP 0x00000600 255 #define MSTATUS_MPP 0x00001800 256 #define MSTATUS_FS 0x00006000 257 #define MSTATUS_XS 0x00018000 258 #define MSTATUS_MPRV 0x00020000 259 #define MSTATUS_PUM 0x00040000 /* until: priv-1.9.1 */ 260 #define MSTATUS_SUM 0x00040000 /* since: priv-1.10 */ 261 #define MSTATUS_MXR 0x00080000 262 #define MSTATUS_VM 0x1F000000 /* until: priv-1.9.1 */ 263 #define MSTATUS_TVM 0x00100000 /* since: priv-1.10 */ 264 #define MSTATUS_TW 0x20000000 /* since: priv-1.10 */ 265 #define MSTATUS_TSR 0x40000000 /* since: priv-1.10 */ 266 267 #define MSTATUS64_UXL 0x0000000300000000ULL 268 #define MSTATUS64_SXL 0x0000000C00000000ULL 269 270 #define MSTATUS32_SD 0x80000000 271 #define MSTATUS64_SD 0x8000000000000000ULL 272 273 #if defined(TARGET_RISCV32) 274 #define MSTATUS_SD MSTATUS32_SD 275 #elif defined(TARGET_RISCV64) 276 #define MSTATUS_SD MSTATUS64_SD 277 #endif 278 279 /* sstatus bits */ 280 #define SSTATUS_UIE 0x00000001 281 #define SSTATUS_SIE 0x00000002 282 #define SSTATUS_UPIE 0x00000010 283 #define SSTATUS_SPIE 0x00000020 284 #define SSTATUS_SPP 0x00000100 285 #define SSTATUS_FS 0x00006000 286 #define SSTATUS_XS 0x00018000 287 #define SSTATUS_PUM 0x00040000 /* until: priv-1.9.1 */ 288 #define SSTATUS_SUM 0x00040000 /* since: priv-1.10 */ 289 #define SSTATUS_MXR 0x00080000 290 291 #define SSTATUS32_SD 0x80000000 292 #define SSTATUS64_SD 0x8000000000000000ULL 293 294 #if defined(TARGET_RISCV32) 295 #define SSTATUS_SD SSTATUS32_SD 296 #elif defined(TARGET_RISCV64) 297 #define SSTATUS_SD SSTATUS64_SD 298 #endif 299 300 /* irqs */ 301 #define MIP_SSIP (1 << IRQ_S_SOFT) 302 #define MIP_HSIP (1 << IRQ_H_SOFT) 303 #define MIP_MSIP (1 << IRQ_M_SOFT) 304 #define MIP_STIP (1 << IRQ_S_TIMER) 305 #define MIP_HTIP (1 << IRQ_H_TIMER) 306 #define MIP_MTIP (1 << IRQ_M_TIMER) 307 #define MIP_SEIP (1 << IRQ_S_EXT) 308 #define MIP_HEIP (1 << IRQ_H_EXT) 309 #define MIP_MEIP (1 << IRQ_M_EXT) 310 311 #define SIP_SSIP MIP_SSIP 312 #define SIP_STIP MIP_STIP 313 #define SIP_SEIP MIP_SEIP 314 315 #define PRV_U 0 316 #define PRV_S 1 317 #define PRV_H 2 318 #define PRV_M 3 319 320 /* privileged ISA 1.9.1 VM modes (mstatus.vm) */ 321 #define VM_1_09_MBARE 0 322 #define VM_1_09_MBB 1 323 #define VM_1_09_MBBID 2 324 #define VM_1_09_SV32 8 325 #define VM_1_09_SV39 9 326 #define VM_1_09_SV48 10 327 328 /* privileged ISA 1.10.0 VM modes (satp.mode) */ 329 #define VM_1_10_MBARE 0 330 #define VM_1_10_SV32 1 331 #define VM_1_10_SV39 8 332 #define VM_1_10_SV48 9 333 #define VM_1_10_SV57 10 334 #define VM_1_10_SV64 11 335 336 /* privileged ISA interrupt causes */ 337 #define IRQ_U_SOFT 0 /* since: priv-1.10 */ 338 #define IRQ_S_SOFT 1 339 #define IRQ_H_SOFT 2 /* until: priv-1.9.1 */ 340 #define IRQ_M_SOFT 3 /* until: priv-1.9.1 */ 341 #define IRQ_U_TIMER 4 /* since: priv-1.10 */ 342 #define IRQ_S_TIMER 5 343 #define IRQ_H_TIMER 6 /* until: priv-1.9.1 */ 344 #define IRQ_M_TIMER 7 /* until: priv-1.9.1 */ 345 #define IRQ_U_EXT 8 /* since: priv-1.10 */ 346 #define IRQ_S_EXT 9 347 #define IRQ_H_EXT 10 /* until: priv-1.9.1 */ 348 #define IRQ_M_EXT 11 /* until: priv-1.9.1 */ 349 #define IRQ_X_COP 12 /* non-standard */ 350 351 /* Default addresses */ 352 #define DEFAULT_RSTVEC 0x00001000 353 354 /* RV32 satp field masks */ 355 #define SATP32_MODE 0x80000000 356 #define SATP32_ASID 0x7fc00000 357 #define SATP32_PPN 0x003fffff 358 359 /* RV64 satp field masks */ 360 #define SATP64_MODE 0xF000000000000000ULL 361 #define SATP64_ASID 0x0FFFF00000000000ULL 362 #define SATP64_PPN 0x00000FFFFFFFFFFFULL 363 364 #if defined(TARGET_RISCV32) 365 #define SATP_MODE SATP32_MODE 366 #define SATP_ASID SATP32_ASID 367 #define SATP_PPN SATP32_PPN 368 #endif 369 #if defined(TARGET_RISCV64) 370 #define SATP_MODE SATP64_MODE 371 #define SATP_ASID SATP64_ASID 372 #define SATP_PPN SATP64_PPN 373 #endif 374 375 /* RISCV Exception Codes */ 376 #define EXCP_NONE -1 /* not a real RISCV exception code */ 377 #define RISCV_EXCP_INST_ADDR_MIS 0x0 378 #define RISCV_EXCP_INST_ACCESS_FAULT 0x1 379 #define RISCV_EXCP_ILLEGAL_INST 0x2 380 #define RISCV_EXCP_BREAKPOINT 0x3 381 #define RISCV_EXCP_LOAD_ADDR_MIS 0x4 382 #define RISCV_EXCP_LOAD_ACCESS_FAULT 0x5 383 #define RISCV_EXCP_STORE_AMO_ADDR_MIS 0x6 384 #define RISCV_EXCP_STORE_AMO_ACCESS_FAULT 0x7 385 #define RISCV_EXCP_U_ECALL 0x8 /* for convenience, report all 386 ECALLs as this, handler 387 fixes */ 388 #define RISCV_EXCP_S_ECALL 0x9 389 #define RISCV_EXCP_H_ECALL 0xa 390 #define RISCV_EXCP_M_ECALL 0xb 391 #define RISCV_EXCP_INST_PAGE_FAULT 0xc /* since: priv-1.10.0 */ 392 #define RISCV_EXCP_LOAD_PAGE_FAULT 0xd /* since: priv-1.10.0 */ 393 #define RISCV_EXCP_STORE_PAGE_FAULT 0xf /* since: priv-1.10.0 */ 394 395 #define RISCV_EXCP_INT_FLAG 0x80000000 396 #define RISCV_EXCP_INT_MASK 0x7fffffff 397 398 /* page table entry (PTE) fields */ 399 #define PTE_V 0x001 /* Valid */ 400 #define PTE_R 0x002 /* Read */ 401 #define PTE_W 0x004 /* Write */ 402 #define PTE_X 0x008 /* Execute */ 403 #define PTE_U 0x010 /* User */ 404 #define PTE_G 0x020 /* Global */ 405 #define PTE_A 0x040 /* Accessed */ 406 #define PTE_D 0x080 /* Dirty */ 407 #define PTE_SOFT 0x300 /* Reserved for Software */ 408 409 #define PTE_PPN_SHIFT 10 410 411 #define PTE_TABLE(PTE) (((PTE) & (PTE_V | PTE_R | PTE_W | PTE_X)) == PTE_V) 412