1#
2# RISC-V translation routines for the XVentanaCondOps extension
3#
4# Copyright (c) 2022 Dr. Philipp Tomsich, philipp.tomsich@vrull.eu
5#
6# SPDX-License-Identifier: LGPL-2.1-or-later
7#
8# Reference: VTx-family custom instructions
9#            Custom ISA extensions for Ventana Micro Systems RISC-V cores
10#            (https://github.com/ventanamicro/ventana-custom-extensions/releases/download/v1.0.0/ventana-custom-extensions-v1.0.0.pdf)
11
12# Fields
13%rs2  20:5
14%rs1  15:5
15%rd    7:5
16
17# Argument sets
18&r    rd rs1 rs2  !extern
19
20# Formats
21@r         .......  ..... ..... ... ..... ....... &r                %rs2 %rs1 %rd
22
23# *** RV64 Custom-3 Extension ***
24vt_maskc   0000000  ..... ..... 110 ..... 1111011 @r
25vt_maskcn  0000000  ..... ..... 111 ..... 1111011 @r
26