xref: /openbmc/qemu/target/ppc/timebase_helper.c (revision 53422040)
1 /*
2  *  PowerPC emulation helpers for QEMU.
3  *
4  *  Copyright (c) 2003-2007 Jocelyn Mayer
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2 of the License, or (at your option) any later version.
10  *
11  * This library is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18  */
19 #include "qemu/osdep.h"
20 #include "cpu.h"
21 #include "exec/helper-proto.h"
22 #include "exec/exec-all.h"
23 #include "qemu/log.h"
24 
25 /*****************************************************************************/
26 /* SPR accesses */
27 
28 target_ulong helper_load_tbl(CPUPPCState *env)
29 {
30     return (target_ulong)cpu_ppc_load_tbl(env);
31 }
32 
33 target_ulong helper_load_tbu(CPUPPCState *env)
34 {
35     return cpu_ppc_load_tbu(env);
36 }
37 
38 target_ulong helper_load_atbl(CPUPPCState *env)
39 {
40     return (target_ulong)cpu_ppc_load_atbl(env);
41 }
42 
43 target_ulong helper_load_atbu(CPUPPCState *env)
44 {
45     return cpu_ppc_load_atbu(env);
46 }
47 
48 target_ulong helper_load_vtb(CPUPPCState *env)
49 {
50     return cpu_ppc_load_vtb(env);
51 }
52 
53 #if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY)
54 target_ulong helper_load_purr(CPUPPCState *env)
55 {
56     return (target_ulong)cpu_ppc_load_purr(env);
57 }
58 
59 void helper_store_purr(CPUPPCState *env, target_ulong val)
60 {
61     cpu_ppc_store_purr(env, val);
62 }
63 #endif
64 
65 target_ulong helper_load_601_rtcl(CPUPPCState *env)
66 {
67     return cpu_ppc601_load_rtcl(env);
68 }
69 
70 target_ulong helper_load_601_rtcu(CPUPPCState *env)
71 {
72     return cpu_ppc601_load_rtcu(env);
73 }
74 
75 #if !defined(CONFIG_USER_ONLY)
76 void helper_store_tbl(CPUPPCState *env, target_ulong val)
77 {
78     cpu_ppc_store_tbl(env, val);
79 }
80 
81 void helper_store_tbu(CPUPPCState *env, target_ulong val)
82 {
83     cpu_ppc_store_tbu(env, val);
84 }
85 
86 void helper_store_atbl(CPUPPCState *env, target_ulong val)
87 {
88     cpu_ppc_store_atbl(env, val);
89 }
90 
91 void helper_store_atbu(CPUPPCState *env, target_ulong val)
92 {
93     cpu_ppc_store_atbu(env, val);
94 }
95 
96 void helper_store_601_rtcl(CPUPPCState *env, target_ulong val)
97 {
98     cpu_ppc601_store_rtcl(env, val);
99 }
100 
101 void helper_store_601_rtcu(CPUPPCState *env, target_ulong val)
102 {
103     cpu_ppc601_store_rtcu(env, val);
104 }
105 
106 target_ulong helper_load_decr(CPUPPCState *env)
107 {
108     return cpu_ppc_load_decr(env);
109 }
110 
111 void helper_store_decr(CPUPPCState *env, target_ulong val)
112 {
113     cpu_ppc_store_decr(env, val);
114 }
115 
116 target_ulong helper_load_hdecr(CPUPPCState *env)
117 {
118     return cpu_ppc_load_hdecr(env);
119 }
120 
121 void helper_store_hdecr(CPUPPCState *env, target_ulong val)
122 {
123     cpu_ppc_store_hdecr(env, val);
124 }
125 
126 void helper_store_vtb(CPUPPCState *env, target_ulong val)
127 {
128     cpu_ppc_store_vtb(env, val);
129 }
130 
131 void helper_store_tbu40(CPUPPCState *env, target_ulong val)
132 {
133     cpu_ppc_store_tbu40(env, val);
134 }
135 
136 target_ulong helper_load_40x_pit(CPUPPCState *env)
137 {
138     return load_40x_pit(env);
139 }
140 
141 void helper_store_40x_pit(CPUPPCState *env, target_ulong val)
142 {
143     store_40x_pit(env, val);
144 }
145 
146 void helper_store_booke_tcr(CPUPPCState *env, target_ulong val)
147 {
148     store_booke_tcr(env, val);
149 }
150 
151 void helper_store_booke_tsr(CPUPPCState *env, target_ulong val)
152 {
153     store_booke_tsr(env, val);
154 }
155 #endif
156 
157 /*****************************************************************************/
158 /* Embedded PowerPC specific helpers */
159 
160 /* XXX: to be improved to check access rights when in user-mode */
161 target_ulong helper_load_dcr(CPUPPCState *env, target_ulong dcrn)
162 {
163     uint32_t val = 0;
164 
165     if (unlikely(env->dcr_env == NULL)) {
166         qemu_log_mask(LOG_GUEST_ERROR, "No DCR environment\n");
167         raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM,
168                                POWERPC_EXCP_INVAL |
169                                POWERPC_EXCP_INVAL_INVAL, GETPC());
170     } else if (unlikely(ppc_dcr_read(env->dcr_env,
171                                      (uint32_t)dcrn, &val) != 0)) {
172         qemu_log_mask(LOG_GUEST_ERROR, "DCR read error %d %03x\n",
173                       (uint32_t)dcrn, (uint32_t)dcrn);
174         raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM,
175                                POWERPC_EXCP_INVAL |
176                                POWERPC_EXCP_PRIV_REG, GETPC());
177     }
178     return val;
179 }
180 
181 void helper_store_dcr(CPUPPCState *env, target_ulong dcrn, target_ulong val)
182 {
183     if (unlikely(env->dcr_env == NULL)) {
184         qemu_log_mask(LOG_GUEST_ERROR, "No DCR environment\n");
185         raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM,
186                                POWERPC_EXCP_INVAL |
187                                POWERPC_EXCP_INVAL_INVAL, GETPC());
188     } else if (unlikely(ppc_dcr_write(env->dcr_env, (uint32_t)dcrn,
189                                       (uint32_t)val) != 0)) {
190         qemu_log_mask(LOG_GUEST_ERROR, "DCR write error %d %03x\n",
191                       (uint32_t)dcrn, (uint32_t)dcrn);
192         raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM,
193                                POWERPC_EXCP_INVAL |
194                                POWERPC_EXCP_PRIV_REG, GETPC());
195     }
196 }
197