xref: /openbmc/qemu/target/ppc/mmu-book3s-v3.c (revision 87e012f2)
1 /*
2  *  PowerPC ISAV3 BookS emulation generic mmu helpers for qemu.
3  *
4  *  Copyright (c) 2017 Suraj Jitindar Singh, IBM Corporation
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2.1 of the License, or (at your option) any later version.
10  *
11  * This library is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #include "qemu/osdep.h"
21 #include "cpu.h"
22 #include "mmu-hash64.h"
23 #include "mmu-book3s-v3.h"
24 
25 bool ppc64_v3_get_pate(PowerPCCPU *cpu, target_ulong lpid, ppc_v3_pate_t *entry)
26 {
27     uint64_t patb = cpu->env.spr[SPR_PTCR] & PTCR_PATB;
28     uint64_t pats = cpu->env.spr[SPR_PTCR] & PTCR_PATS;
29 
30     /* Check if partition table is properly aligned */
31     if (patb & MAKE_64BIT_MASK(0, pats + 12)) {
32         return false;
33     }
34 
35     /* Calculate number of entries */
36     pats = 1ull << (pats + 12 - 4);
37     if (pats <= lpid) {
38         return false;
39     }
40 
41     /* Grab entry */
42     patb += 16 * lpid;
43     entry->dw0 = ldq_phys(CPU(cpu)->as, patb);
44     entry->dw1 = ldq_phys(CPU(cpu)->as, patb + 8);
45     return true;
46 }
47