1# 2# Power ISA decode for 64-bit prefixed insns (opcode space 0 and 1) 3# 4# Copyright (c) 2021 Instituto de Pesquisas Eldorado (eldorado.org.br) 5# 6# This library is free software; you can redistribute it and/or 7# modify it under the terms of the GNU Lesser General Public 8# License as published by the Free Software Foundation; either 9# version 2.1 of the License, or (at your option) any later version. 10# 11# This library is distributed in the hope that it will be useful, 12# but WITHOUT ANY WARRANTY; without even the implied warranty of 13# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14# Lesser General Public License for more details. 15# 16# You should have received a copy of the GNU Lesser General Public 17# License along with this library; if not, see <http://www.gnu.org/licenses/>. 18# 19 20# Format MLS:D and 8LS:D 21&PLS_D rt ra si:int64_t r:bool 22%pls_si 32:s18 0:16 23@PLS_D ...... .. ... r:1 .. .................. \ 24 ...... rt:5 ra:5 ................ \ 25 &PLS_D si=%pls_si 26@8LS_D_TSX ...... .. . .. r:1 .. .................. \ 27 ..... rt:6 ra:5 ................ \ 28 &PLS_D si=%pls_si 29 30%rt_tsxp 21:1 22:4 !function=times_2 31@8LS_D_TSXP ...... .. . .. r:1 .. .................. \ 32 ...... ..... ra:5 ................ \ 33 &PLS_D si=%pls_si rt=%rt_tsxp 34 35@8LS_D ...... .. . .. r:1 .. .................. \ 36 ...... rt:5 ra:5 ................ \ 37 &PLS_D si=%pls_si 38 39# Format 8RR:D 40%8rr_si 32:s16 0:16 41%8rr_xt 16:1 21:5 42&8RR_D_IX xt ix si 43@8RR_D_IX ...... .. .... .. .. ................ \ 44 ...... ..... ... ix:1 . ................ \ 45 &8RR_D_IX si=%8rr_si xt=%8rr_xt 46&8RR_D xt si:int32_t 47@8RR_D ...... .. .... .. .. ................ \ 48 ...... ..... .... . ................ \ 49 &8RR_D si=%8rr_si xt=%8rr_xt 50 51# Format 8RR:XX4 52%8rr_xx_xt 0:1 21:5 53%8rr_xx_xa 2:1 16:5 54%8rr_xx_xb 1:1 11:5 55%8rr_xx_xc 3:1 6:5 56&8RR_XX4 xt xa xb xc 57@8RR_XX4 ........ ........ ........ ........ \ 58 ...... ..... ..... ..... ..... .. .... \ 59 &8RR_XX4 xt=%8rr_xx_xt xa=%8rr_xx_xa xb=%8rr_xx_xb xc=%8rr_xx_xc 60 61&8RR_XX4_imm xt xa xb xc imm 62@8RR_XX4_imm ........ ........ ........ imm:8 \ 63 ...... ..... ..... ..... ..... .. .... \ 64 &8RR_XX4_imm xt=%8rr_xx_xt xa=%8rr_xx_xa xb=%8rr_xx_xb xc=%8rr_xx_xc 65 66&8RR_XX4_uim3 xt xa xb xc uim3 67@8RR_XX4_uim3 ...... .. .... .. ............... uim3:3 \ 68 ...... ..... ..... ..... ..... .. .... \ 69 &8RR_XX4_uim3 xt=%8rr_xx_xt xa=%8rr_xx_xa xb=%8rr_xx_xb xc=%8rr_xx_xc 70 71### Fixed-Point Load Instructions 72 73PLBZ 000001 10 0--.-- .................. \ 74 100010 ..... ..... ................ @PLS_D 75PLHZ 000001 10 0--.-- .................. \ 76 101000 ..... ..... ................ @PLS_D 77PLHA 000001 10 0--.-- .................. \ 78 101010 ..... ..... ................ @PLS_D 79PLWZ 000001 10 0--.-- .................. \ 80 100000 ..... ..... ................ @PLS_D 81PLWA 000001 00 0--.-- .................. \ 82 101001 ..... ..... ................ @PLS_D 83PLD 000001 00 0--.-- .................. \ 84 111001 ..... ..... ................ @PLS_D 85PLQ 000001 00 0--.-- .................. \ 86 111000 ..... ..... ................ @PLS_D 87 88### Fixed-Point Store Instructions 89 90PSTW 000001 10 0--.-- .................. \ 91 100100 ..... ..... ................ @PLS_D 92PSTB 000001 10 0--.-- .................. \ 93 100110 ..... ..... ................ @PLS_D 94PSTH 000001 10 0--.-- .................. \ 95 101100 ..... ..... ................ @PLS_D 96 97PSTD 000001 00 0--.-- .................. \ 98 111101 ..... ..... ................ @PLS_D 99PSTQ 000001 00 0--.-- .................. \ 100 111100 ..... ..... ................ @PLS_D 101 102### Fixed-Point Arithmetic Instructions 103 104PADDI 000001 10 0--.-- .................. \ 105 001110 ..... ..... ................ @PLS_D 106 107### Float-Point Load and Store Instructions 108 109PLFS 000001 10 0--.-- .................. \ 110 110000 ..... ..... ................ @PLS_D 111PLFD 000001 10 0--.-- .................. \ 112 110010 ..... ..... ................ @PLS_D 113PSTFS 000001 10 0--.-- .................. \ 114 110100 ..... ..... ................ @PLS_D 115PSTFD 000001 10 0--.-- .................. \ 116 110110 ..... ..... ................ @PLS_D 117 118### Prefixed No-operation Instruction 119 120@PNOP 000001 11 0000-- 000000000000000000 \ 121 ................................ 122 123{ 124 [ 125 ## Invalid suffixes: Branch instruction 126 # bc[l][a] 127 INVALID ................................ \ 128 010000-------------------------- @PNOP 129 # b[l][a] 130 INVALID ................................ \ 131 010010-------------------------- @PNOP 132 # bclr[l] 133 INVALID ................................ \ 134 010011---------------0000010000- @PNOP 135 # bcctr[l] 136 INVALID ................................ \ 137 010011---------------1000010000- @PNOP 138 # bctar[l] 139 INVALID ................................ \ 140 010011---------------1000110000- @PNOP 141 142 ## Invalid suffixes: rfebb 143 INVALID ................................ \ 144 010011---------------0010010010- @PNOP 145 146 ## Invalid suffixes: context synchronizing other than isync 147 # sc 148 INVALID ................................ \ 149 010001------------------------1- @PNOP 150 # scv 151 INVALID ................................ \ 152 010001------------------------01 @PNOP 153 # rfscv 154 INVALID ................................ \ 155 010011---------------0001010010- @PNOP 156 # rfid 157 INVALID ................................ \ 158 010011---------------0000010010- @PNOP 159 # hrfid 160 INVALID ................................ \ 161 010011---------------0100010010- @PNOP 162 # urfid 163 INVALID ................................ \ 164 010011---------------0100110010- @PNOP 165 # stop 166 INVALID ................................ \ 167 010011---------------0101110010- @PNOP 168 # mtmsr w/ L=0 169 INVALID ................................ \ 170 011111---------0-----0010010010- @PNOP 171 # mtmsrd w/ L=0 172 INVALID ................................ \ 173 011111---------0-----0010110010- @PNOP 174 175 ## Invalid suffixes: Service Processor Attention 176 INVALID ................................ \ 177 000000----------------100000000- @PNOP 178 ] 179 180 ## Valid suffixes 181 PNOP ................................ \ 182 -------------------------------- @PNOP 183} 184 185### VSX instructions 186 187PLXSD 000001 00 0--.-- .................. \ 188 101010 ..... ..... ................ @8LS_D 189 190PSTXSD 000001 00 0--.-- .................. \ 191 101110 ..... ..... ................ @8LS_D 192 193PLXSSP 000001 00 0--.-- .................. \ 194 101011 ..... ..... ................ @8LS_D 195 196PSTXSSP 000001 00 0--.-- .................. \ 197 101111 ..... ..... ................ @8LS_D 198 199PLXV 000001 00 0--.-- .................. \ 200 11001 ...... ..... ................ @8LS_D_TSX 201PSTXV 000001 00 0--.-- .................. \ 202 11011 ...... ..... ................ @8LS_D_TSX 203PLXVP 000001 00 0--.-- .................. \ 204 111010 ..... ..... ................ @8LS_D_TSXP 205PSTXVP 000001 00 0--.-- .................. \ 206 111110 ..... ..... ................ @8LS_D_TSXP 207 208XXEVAL 000001 01 0000 -- ---------- ........ \ 209 100010 ..... ..... ..... ..... 01 .... @8RR_XX4_imm 210 211XXSPLTIDP 000001 01 0000 -- -- ................ \ 212 100000 ..... 0010 . ................ @8RR_D 213XXSPLTIW 000001 01 0000 -- -- ................ \ 214 100000 ..... 0011 . ................ @8RR_D 215XXSPLTI32DX 000001 01 0000 -- -- ................ \ 216 100000 ..... 000 .. ................ @8RR_D_IX 217 218XXBLENDVD 000001 01 0000 -- ------------------ \ 219 100001 ..... ..... ..... ..... 11 .... @8RR_XX4 220XXBLENDVW 000001 01 0000 -- ------------------ \ 221 100001 ..... ..... ..... ..... 10 .... @8RR_XX4 222XXBLENDVH 000001 01 0000 -- ------------------ \ 223 100001 ..... ..... ..... ..... 01 .... @8RR_XX4 224XXBLENDVB 000001 01 0000 -- ------------------ \ 225 100001 ..... ..... ..... ..... 00 .... @8RR_XX4 226 227XXPERMX 000001 01 0000 -- --------------- ... \ 228 100010 ..... ..... ..... ..... 00 .... @8RR_XX4_uim3 229