1# 2# Power ISA decode for 64-bit prefixed insns (opcode space 0 and 1) 3# 4# Copyright (c) 2021 Instituto de Pesquisas Eldorado (eldorado.org.br) 5# 6# This library is free software; you can redistribute it and/or 7# modify it under the terms of the GNU Lesser General Public 8# License as published by the Free Software Foundation; either 9# version 2.1 of the License, or (at your option) any later version. 10# 11# This library is distributed in the hope that it will be useful, 12# but WITHOUT ANY WARRANTY; without even the implied warranty of 13# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14# Lesser General Public License for more details. 15# 16# You should have received a copy of the GNU Lesser General Public 17# License along with this library; if not, see <http://www.gnu.org/licenses/>. 18# 19 20# Format MLS:D and 8LS:D 21&PLS_D rt ra si:int64_t r:bool 22%pls_si 32:s18 0:16 23@PLS_D ...... .. ... r:1 .. .................. \ 24 ...... rt:5 ra:5 ................ \ 25 &PLS_D si=%pls_si 26@8LS_D_TSX ...... .. . .. r:1 .. .................. \ 27 ..... rt:6 ra:5 ................ \ 28 &PLS_D si=%pls_si 29 30%rt_tsxp 21:1 22:4 !function=times_2 31@8LS_D_TSXP ...... .. . .. r:1 .. .................. \ 32 ...... ..... ra:5 ................ \ 33 &PLS_D si=%pls_si rt=%rt_tsxp 34 35# Format 8RR:D 36%8rr_si 32:s16 0:16 37%8rr_xt 16:1 21:5 38&8RR_D_IX xt ix si 39@8RR_D_IX ...... .. .... .. .. ................ \ 40 ...... ..... ... ix:1 . ................ \ 41 &8RR_D_IX si=%8rr_si xt=%8rr_xt 42&8RR_D xt si:int32_t 43@8RR_D ...... .. .... .. .. ................ \ 44 ...... ..... .... . ................ \ 45 &8RR_D si=%8rr_si xt=%8rr_xt 46 47# Format XX4 48&XX4 xt xa xb xc 49%xx4_xt 0:1 21:5 50%xx4_xa 2:1 16:5 51%xx4_xb 1:1 11:5 52%xx4_xc 3:1 6:5 53@XX4 ........ ........ ........ ........ \ 54 ...... ..... ..... ..... ..... .. .... \ 55 &XX4 xt=%xx4_xt xa=%xx4_xa xb=%xx4_xb xc=%xx4_xc 56 57### Fixed-Point Load Instructions 58 59PLBZ 000001 10 0--.-- .................. \ 60 100010 ..... ..... ................ @PLS_D 61PLHZ 000001 10 0--.-- .................. \ 62 101000 ..... ..... ................ @PLS_D 63PLHA 000001 10 0--.-- .................. \ 64 101010 ..... ..... ................ @PLS_D 65PLWZ 000001 10 0--.-- .................. \ 66 100000 ..... ..... ................ @PLS_D 67PLWA 000001 00 0--.-- .................. \ 68 101001 ..... ..... ................ @PLS_D 69PLD 000001 00 0--.-- .................. \ 70 111001 ..... ..... ................ @PLS_D 71PLQ 000001 00 0--.-- .................. \ 72 111000 ..... ..... ................ @PLS_D 73 74### Fixed-Point Store Instructions 75 76PSTW 000001 10 0--.-- .................. \ 77 100100 ..... ..... ................ @PLS_D 78PSTB 000001 10 0--.-- .................. \ 79 100110 ..... ..... ................ @PLS_D 80PSTH 000001 10 0--.-- .................. \ 81 101100 ..... ..... ................ @PLS_D 82 83PSTD 000001 00 0--.-- .................. \ 84 111101 ..... ..... ................ @PLS_D 85PSTQ 000001 00 0--.-- .................. \ 86 111100 ..... ..... ................ @PLS_D 87 88### Fixed-Point Arithmetic Instructions 89 90PADDI 000001 10 0--.-- .................. \ 91 001110 ..... ..... ................ @PLS_D 92 93### Float-Point Load and Store Instructions 94 95PLFS 000001 10 0--.-- .................. \ 96 110000 ..... ..... ................ @PLS_D 97PLFD 000001 10 0--.-- .................. \ 98 110010 ..... ..... ................ @PLS_D 99PSTFS 000001 10 0--.-- .................. \ 100 110100 ..... ..... ................ @PLS_D 101PSTFD 000001 10 0--.-- .................. \ 102 110110 ..... ..... ................ @PLS_D 103 104### Prefixed No-operation Instruction 105 106@PNOP 000001 11 0000-- 000000000000000000 \ 107 ................................ 108 109{ 110 [ 111 ## Invalid suffixes: Branch instruction 112 # bc[l][a] 113 INVALID ................................ \ 114 010000-------------------------- @PNOP 115 # b[l][a] 116 INVALID ................................ \ 117 010010-------------------------- @PNOP 118 # bclr[l] 119 INVALID ................................ \ 120 010011---------------0000010000- @PNOP 121 # bcctr[l] 122 INVALID ................................ \ 123 010011---------------1000010000- @PNOP 124 # bctar[l] 125 INVALID ................................ \ 126 010011---------------1000110000- @PNOP 127 128 ## Invalid suffixes: rfebb 129 INVALID ................................ \ 130 010011---------------0010010010- @PNOP 131 132 ## Invalid suffixes: context synchronizing other than isync 133 # sc 134 INVALID ................................ \ 135 010001------------------------1- @PNOP 136 # scv 137 INVALID ................................ \ 138 010001------------------------01 @PNOP 139 # rfscv 140 INVALID ................................ \ 141 010011---------------0001010010- @PNOP 142 # rfid 143 INVALID ................................ \ 144 010011---------------0000010010- @PNOP 145 # hrfid 146 INVALID ................................ \ 147 010011---------------0100010010- @PNOP 148 # urfid 149 INVALID ................................ \ 150 010011---------------0100110010- @PNOP 151 # stop 152 INVALID ................................ \ 153 010011---------------0101110010- @PNOP 154 # mtmsr w/ L=0 155 INVALID ................................ \ 156 011111---------0-----0010010010- @PNOP 157 # mtmsrd w/ L=0 158 INVALID ................................ \ 159 011111---------0-----0010110010- @PNOP 160 161 ## Invalid suffixes: Service Processor Attention 162 INVALID ................................ \ 163 000000----------------100000000- @PNOP 164 ] 165 166 ## Valid suffixes 167 PNOP ................................ \ 168 -------------------------------- @PNOP 169} 170 171### VSX instructions 172 173PLXV 000001 00 0--.-- .................. \ 174 11001 ...... ..... ................ @8LS_D_TSX 175PSTXV 000001 00 0--.-- .................. \ 176 11011 ...... ..... ................ @8LS_D_TSX 177PLXVP 000001 00 0--.-- .................. \ 178 111010 ..... ..... ................ @8LS_D_TSXP 179PSTXVP 000001 00 0--.-- .................. \ 180 111110 ..... ..... ................ @8LS_D_TSXP 181 182XXSPLTIDP 000001 01 0000 -- -- ................ \ 183 100000 ..... 0010 . ................ @8RR_D 184XXSPLTIW 000001 01 0000 -- -- ................ \ 185 100000 ..... 0011 . ................ @8RR_D 186XXSPLTI32DX 000001 01 0000 -- -- ................ \ 187 100000 ..... 000 .. ................ @8RR_D_IX 188 189XXBLENDVD 000001 01 0000 -- ------------------ \ 190 100001 ..... ..... ..... ..... 11 .... @XX4 191XXBLENDVW 000001 01 0000 -- ------------------ \ 192 100001 ..... ..... ..... ..... 10 .... @XX4 193XXBLENDVH 000001 01 0000 -- ------------------ \ 194 100001 ..... ..... ..... ..... 01 .... @XX4 195XXBLENDVB 000001 01 0000 -- ------------------ \ 196 100001 ..... ..... ..... ..... 00 .... @XX4 197