1# 2# Power ISA decode for 32-bit insns (opcode space 0) 3# 4# Copyright (c) 2021 Instituto de Pesquisas Eldorado (eldorado.org.br) 5# 6# This library is free software; you can redistribute it and/or 7# modify it under the terms of the GNU Lesser General Public 8# License as published by the Free Software Foundation; either 9# version 2.1 of the License, or (at your option) any later version. 10# 11# This library is distributed in the hope that it will be useful, 12# but WITHOUT ANY WARRANTY; without even the implied warranty of 13# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14# Lesser General Public License for more details. 15# 16# You should have received a copy of the GNU Lesser General Public 17# License along with this library; if not, see <http://www.gnu.org/licenses/>. 18# 19 20&D rt ra si:int64_t 21@D ...... rt:5 ra:5 si:s16 &D 22 23&D_bf bf l:bool ra imm 24@D_bfs ...... bf:3 - l:1 ra:5 imm:s16 &D_bf 25@D_bfu ...... bf:3 - l:1 ra:5 imm:16 &D_bf 26 27%ds_si 2:s14 !function=times_4 28@DS ...... rt:5 ra:5 .............. .. &D si=%ds_si 29 30&DX rt d 31%dx_d 6:s10 16:5 0:1 32@DX ...... rt:5 ..... .......... ..... . &DX d=%dx_d 33 34&VX vrt vra vrb 35@VX ...... vrt:5 vra:5 vrb:5 .......... . &VX 36 37&X rt ra rb 38@X ...... rt:5 ra:5 rb:5 .......... . &X 39 40&X_bi rt bi 41@X_bi ...... rt:5 bi:5 ----- .......... - &X_bi 42 43&X_bfl bf l:bool ra rb 44@X_bfl ...... bf:3 - l:1 ra:5 rb:5 ..........- &X_bfl 45 46### Fixed-Point Load Instructions 47 48LBZ 100010 ..... ..... ................ @D 49LBZU 100011 ..... ..... ................ @D 50LBZX 011111 ..... ..... ..... 0001010111 - @X 51LBZUX 011111 ..... ..... ..... 0001110111 - @X 52 53LHZ 101000 ..... ..... ................ @D 54LHZU 101001 ..... ..... ................ @D 55LHZX 011111 ..... ..... ..... 0100010111 - @X 56LHZUX 011111 ..... ..... ..... 0100110111 - @X 57 58LHA 101010 ..... ..... ................ @D 59LHAU 101011 ..... ..... ................ @D 60LHAX 011111 ..... ..... ..... 0101010111 - @X 61LHAXU 011111 ..... ..... ..... 0101110111 - @X 62 63LWZ 100000 ..... ..... ................ @D 64LWZU 100001 ..... ..... ................ @D 65LWZX 011111 ..... ..... ..... 0000010111 - @X 66LWZUX 011111 ..... ..... ..... 0000110111 - @X 67 68LWA 111010 ..... ..... ..............10 @DS 69LWAX 011111 ..... ..... ..... 0101010101 - @X 70LWAUX 011111 ..... ..... ..... 0101110101 - @X 71 72LD 111010 ..... ..... ..............00 @DS 73LDU 111010 ..... ..... ..............01 @DS 74LDX 011111 ..... ..... ..... 0000010101 - @X 75LDUX 011111 ..... ..... ..... 0000110101 - @X 76 77### Fixed-Point Store Instructions 78 79STB 100110 ..... ..... ................ @D 80STBU 100111 ..... ..... ................ @D 81STBX 011111 ..... ..... ..... 0011010111 - @X 82STBUX 011111 ..... ..... ..... 0011110111 - @X 83 84STH 101100 ..... ..... ................ @D 85STHU 101101 ..... ..... ................ @D 86STHX 011111 ..... ..... ..... 0110010111 - @X 87STHUX 011111 ..... ..... ..... 0110110111 - @X 88 89STW 100100 ..... ..... ................ @D 90STWU 100101 ..... ..... ................ @D 91STWX 011111 ..... ..... ..... 0010010111 - @X 92STWUX 011111 ..... ..... ..... 0010110111 - @X 93 94STD 111110 ..... ..... ..............00 @DS 95STDU 111110 ..... ..... ..............01 @DS 96STDX 011111 ..... ..... ..... 0010010101 - @X 97STDUX 011111 ..... ..... ..... 0010110101 - @X 98 99### Fixed-Point Compare Instructions 100 101CMP 011111 ... - . ..... ..... 0000000000 - @X_bfl 102CMPL 011111 ... - . ..... ..... 0000100000 - @X_bfl 103CMPI 001011 ... - . ..... ................ @D_bfs 104CMPLI 001010 ... - . ..... ................ @D_bfu 105 106### Fixed-Point Arithmetic Instructions 107 108ADDI 001110 ..... ..... ................ @D 109ADDIS 001111 ..... ..... ................ @D 110 111ADDPCIS 010011 ..... ..... .......... 00010 . @DX 112 113## Fixed-Point Logical Instructions 114 115CFUGED 011111 ..... ..... ..... 0011011100 - @X 116 117### Move To/From System Register Instructions 118 119SETBC 011111 ..... ..... ----- 0110000000 - @X_bi 120SETBCR 011111 ..... ..... ----- 0110100000 - @X_bi 121SETNBC 011111 ..... ..... ----- 0111000000 - @X_bi 122SETNBCR 011111 ..... ..... ----- 0111100000 - @X_bi 123 124## Vector Bit Manipulation Instruction 125 126VCFUGED 000100 ..... ..... ..... 10101001101 @VX 127