1 /* 2 * PowerPC CPU routines for qemu. 3 * 4 * Copyright (c) 2017 Nikunj A Dadhania, IBM Corporation. 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2.1 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include "qemu/osdep.h" 21 #include "cpu.h" 22 #include "cpu-models.h" 23 #include "cpu-qom.h" 24 #include "exec/log.h" 25 #include "fpu/softfloat-helpers.h" 26 #include "mmu-hash64.h" 27 28 target_ulong cpu_read_xer(CPUPPCState *env) 29 { 30 if (is_isa300(env)) { 31 return env->xer | (env->so << XER_SO) | 32 (env->ov << XER_OV) | (env->ca << XER_CA) | 33 (env->ov32 << XER_OV32) | (env->ca32 << XER_CA32); 34 } 35 36 return env->xer | (env->so << XER_SO) | (env->ov << XER_OV) | 37 (env->ca << XER_CA); 38 } 39 40 void cpu_write_xer(CPUPPCState *env, target_ulong xer) 41 { 42 env->so = (xer >> XER_SO) & 1; 43 env->ov = (xer >> XER_OV) & 1; 44 env->ca = (xer >> XER_CA) & 1; 45 /* write all the flags, while reading back check of isa300 */ 46 env->ov32 = (xer >> XER_OV32) & 1; 47 env->ca32 = (xer >> XER_CA32) & 1; 48 env->xer = xer & ~((1ul << XER_SO) | 49 (1ul << XER_OV) | (1ul << XER_CA) | 50 (1ul << XER_OV32) | (1ul << XER_CA32)); 51 } 52 53 void ppc_store_vscr(CPUPPCState *env, uint32_t vscr) 54 { 55 env->vscr = vscr & ~(1u << VSCR_SAT); 56 /* Which bit we set is completely arbitrary, but clear the rest. */ 57 env->vscr_sat.u64[0] = vscr & (1u << VSCR_SAT); 58 env->vscr_sat.u64[1] = 0; 59 set_flush_to_zero((vscr >> VSCR_NJ) & 1, &env->vec_status); 60 } 61 62 uint32_t ppc_get_vscr(CPUPPCState *env) 63 { 64 uint32_t sat = (env->vscr_sat.u64[0] | env->vscr_sat.u64[1]) != 0; 65 return env->vscr | (sat << VSCR_SAT); 66 } 67 68 #ifdef CONFIG_SOFTMMU 69 void ppc_store_sdr1(CPUPPCState *env, target_ulong value) 70 { 71 PowerPCCPU *cpu = env_archcpu(env); 72 qemu_log_mask(CPU_LOG_MMU, "%s: " TARGET_FMT_lx "\n", __func__, value); 73 assert(!cpu->vhyp); 74 #if defined(TARGET_PPC64) 75 if (mmu_is_64bit(env->mmu_model)) { 76 target_ulong sdr_mask = SDR_64_HTABORG | SDR_64_HTABSIZE; 77 target_ulong htabsize = value & SDR_64_HTABSIZE; 78 79 if (value & ~sdr_mask) { 80 error_report("Invalid bits 0x"TARGET_FMT_lx" set in SDR1", 81 value & ~sdr_mask); 82 value &= sdr_mask; 83 } 84 if (htabsize > 28) { 85 error_report("Invalid HTABSIZE 0x" TARGET_FMT_lx" stored in SDR1", 86 htabsize); 87 return; 88 } 89 } 90 #endif /* defined(TARGET_PPC64) */ 91 /* FIXME: Should check for valid HTABMASK values in 32-bit case */ 92 env->spr[SPR_SDR1] = value; 93 } 94 #endif /* CONFIG_SOFTMMU */ 95