1 /*
2  * VR5432 extensions translation routines
3  *
4  * Reference: VR5432 Microprocessor User’s Manual
5  *            (Document Number U13751EU5V0UM00)
6  *
7  *  Copyright (c) 2021 Philippe Mathieu-Daudé
8  *
9  * SPDX-License-Identifier: GPL-2.0-or-later
10  */
11 
12 #include "qemu/osdep.h"
13 #include "tcg/tcg-op.h"
14 #include "exec/helper-gen.h"
15 #include "translate.h"
16 #include "internal.h"
17 
18 /* Include the auto-generated decoder. */
19 #include "decode-vr54xx.c.inc"
20 
21 /*
22  * Integer Multiply-Accumulate Instructions
23  *
24  * MACC         Multiply, accumulate, and move LO
25  * MACCHI       Multiply, accumulate, and move HI
26  * MACCHIU      Unsigned multiply, accumulate, and move HI
27  * MACCU        Unsigned multiply, accumulate, and move LO
28  * MSAC         Multiply, negate, accumulate, and move LO
29  * MSACHI       Multiply, negate, accumulate, and move HI
30  * MSACHIU      Unsigned multiply, negate, accumulate, and move HI
31  * MSACU        Unsigned multiply, negate, accumulate, and move LO
32  * MULHI        Multiply and move HI
33  * MULHIU       Unsigned multiply and move HI
34  * MULS         Multiply, negate, and move LO
35  * MULSHI       Multiply, negate, and move HI
36  * MULSHIU      Unsigned multiply, negate, and move HI
37  * MULSU        Unsigned multiply, negate, and move LO
38  */
39 
40 static bool trans_mult_acc(DisasContext *ctx, arg_r *a,
41                            void (*gen_helper_mult_acc)(TCGv, TCGv_ptr, TCGv, TCGv))
42 {
43     TCGv t0 = tcg_temp_new();
44     TCGv t1 = tcg_temp_new();
45 
46     gen_load_gpr(t0, a->rs);
47     gen_load_gpr(t1, a->rt);
48 
49     gen_helper_mult_acc(t0, cpu_env, t0, t1);
50 
51     gen_store_gpr(t0, a->rd);
52 
53     tcg_temp_free(t0);
54     tcg_temp_free(t1);
55 
56     return true;
57 }
58 
59 TRANS(MACC,     trans_mult_acc, gen_helper_macc);
60 TRANS(MACCHI,   trans_mult_acc, gen_helper_macchi);
61 TRANS(MACCHIU,  trans_mult_acc, gen_helper_macchiu);
62 TRANS(MACCU,    trans_mult_acc, gen_helper_maccu);
63 TRANS(MSAC,     trans_mult_acc, gen_helper_msac);
64 TRANS(MSACHI,   trans_mult_acc, gen_helper_msachi);
65 TRANS(MSACHIU,  trans_mult_acc, gen_helper_msachiu);
66 TRANS(MSACU,    trans_mult_acc, gen_helper_msacu);
67 TRANS(MULHI,    trans_mult_acc, gen_helper_mulhi);
68 TRANS(MULHIU,   trans_mult_acc, gen_helper_mulhiu);
69 TRANS(MULS,     trans_mult_acc, gen_helper_muls);
70 TRANS(MULSHI,   trans_mult_acc, gen_helper_mulshi);
71 TRANS(MULSHIU,  trans_mult_acc, gen_helper_mulshiu);
72 TRANS(MULSU,    trans_mult_acc, gen_helper_mulsu);
73