xref: /openbmc/qemu/target/mips/tcg/vr54xx.decode (revision a5e29320)
19d005392SPhilippe Mathieu-Daudé# MIPS VR5432 instruction set extensions
29d005392SPhilippe Mathieu-Daudé#
39d005392SPhilippe Mathieu-Daudé# Copyright (C) 2021  Philippe Mathieu-Daudé
49d005392SPhilippe Mathieu-Daudé#
59d005392SPhilippe Mathieu-Daudé# SPDX-License-Identifier: LGPL-2.1-or-later
69d005392SPhilippe Mathieu-Daudé#
79d005392SPhilippe Mathieu-Daudé# Reference: VR5432 Microprocessor User’s Manual
89d005392SPhilippe Mathieu-Daudé#            (Document Number U13751EU5V0UM00)
95fa38eedSPhilippe Mathieu-Daudé
105fa38eedSPhilippe Mathieu-Daudé&r              rs rt rd
115fa38eedSPhilippe Mathieu-Daudé
125fa38eedSPhilippe Mathieu-Daudé@rs_rt_rd       ...... rs:5  rt:5  rd:5  ..... ......   &r
135fa38eedSPhilippe Mathieu-Daudé
14*a5e29320SPhilippe Mathieu-DaudéMULS            000000 ..... ..... ..... 00011011000    @rs_rt_rd
15*a5e29320SPhilippe Mathieu-DaudéMULSU           000000 ..... ..... ..... 00011011001    @rs_rt_rd
165fa38eedSPhilippe Mathieu-DaudéMACC            000000 ..... ..... ..... 00101011000    @rs_rt_rd
175fa38eedSPhilippe Mathieu-DaudéMACCU           000000 ..... ..... ..... 00101011001    @rs_rt_rd
18*a5e29320SPhilippe Mathieu-DaudéMULHI           000000 ..... ..... ..... 01001011000    @rs_rt_rd
19*a5e29320SPhilippe Mathieu-DaudéMULHIU          000000 ..... ..... ..... 01001011001    @rs_rt_rd
20*a5e29320SPhilippe Mathieu-DaudéMULSHI          000000 ..... ..... ..... 01011011000    @rs_rt_rd
21*a5e29320SPhilippe Mathieu-DaudéMULSHIU         000000 ..... ..... ..... 01011011001    @rs_rt_rd
225fa38eedSPhilippe Mathieu-DaudéMACCHI          000000 ..... ..... ..... 01101011000    @rs_rt_rd
235fa38eedSPhilippe Mathieu-DaudéMACCHIU         000000 ..... ..... ..... 01101011001    @rs_rt_rd
24