xref: /openbmc/qemu/target/mips/fpu_helper.h (revision a10b9d93)
1 /*
2  * Helpers for emulation of FPU-related MIPS instructions.
3  *
4  *  Copyright (C) 2004-2005  Jocelyn Mayer
5  *
6  * SPDX-License-Identifier: LGPL-2.1-or-later
7  */
8 #include "fpu/softfloat-helpers.h"
9 #include "cpu.h"
10 
11 extern const FloatRoundMode ieee_rm[4];
12 
13 uint32_t float_class_s(uint32_t arg, float_status *fst);
14 uint64_t float_class_d(uint64_t arg, float_status *fst);
15 
16 static inline void restore_rounding_mode(CPUMIPSState *env)
17 {
18     set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3],
19                             &env->active_fpu.fp_status);
20 }
21 
22 static inline void restore_flush_mode(CPUMIPSState *env)
23 {
24     set_flush_to_zero((env->active_fpu.fcr31 & (1 << FCR31_FS)) != 0,
25                       &env->active_fpu.fp_status);
26 }
27 
28 static inline void restore_snan_bit_mode(CPUMIPSState *env)
29 {
30     set_snan_bit_is_one((env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) == 0,
31                         &env->active_fpu.fp_status);
32 }
33 
34 static inline void restore_fp_status(CPUMIPSState *env)
35 {
36     restore_rounding_mode(env);
37     restore_flush_mode(env);
38     restore_snan_bit_mode(env);
39 }
40 
41 /* MSA */
42 
43 enum CPUMIPSMSADataFormat {
44     DF_BYTE = 0,
45     DF_HALF,
46     DF_WORD,
47     DF_DOUBLE
48 };
49 
50 static inline void restore_msa_fp_status(CPUMIPSState *env)
51 {
52     float_status *status = &env->active_tc.msa_fp_status;
53     int rounding_mode = (env->active_tc.msacsr & MSACSR_RM_MASK) >> MSACSR_RM;
54     bool flush_to_zero = (env->active_tc.msacsr & MSACSR_FS_MASK) != 0;
55 
56     set_float_rounding_mode(ieee_rm[rounding_mode], status);
57     set_flush_to_zero(flush_to_zero, status);
58     set_flush_inputs_to_zero(flush_to_zero, status);
59 }
60