xref: /openbmc/qemu/target/microblaze/cpu-param.h (revision ee48fef0)
1 /*
2  * MicroBlaze cpu parameters for qemu.
3  *
4  * Copyright (c) 2009 Edgar E. Iglesias
5  * SPDX-License-Identifier: LGPL-2.0+
6  */
7 
8 #ifndef MICROBLAZE_CPU_PARAM_H
9 #define MICROBLAZE_CPU_PARAM_H
10 
11 /*
12  * While system mode can address up to 64 bits of address space,
13  * this is done via the lea/sea instructions, which are system-only
14  * (as they also bypass the mmu).
15  *
16  * We can improve the user-only experience by only exposing 32 bits
17  * of address space.
18  */
19 #ifdef CONFIG_USER_ONLY
20 #define TARGET_LONG_BITS 32
21 #define TARGET_PHYS_ADDR_SPACE_BITS 32
22 #define TARGET_VIRT_ADDR_SPACE_BITS 32
23 #else
24 #define TARGET_LONG_BITS 64
25 #define TARGET_PHYS_ADDR_SPACE_BITS 64
26 #define TARGET_VIRT_ADDR_SPACE_BITS 64
27 #endif
28 
29 /* FIXME: MB uses variable pages down to 1K but linux only uses 4k.  */
30 #define TARGET_PAGE_BITS 12
31 
32 /* MicroBlaze is always in-order. */
33 #define TCG_GUEST_DEFAULT_MO  TCG_MO_ALL
34 
35 #endif
36