xref: /openbmc/qemu/target/m68k/gdbstub.c (revision bad5cfcd)
1 /*
2  * m68k gdb server stub
3  *
4  * Copyright (c) 2003-2005 Fabrice Bellard
5  * Copyright (c) 2013 SUSE LINUX Products GmbH
6  *
7  * This library is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * This library is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19  */
20 #include "qemu/osdep.h"
21 #include "cpu.h"
22 #include "gdbstub/helpers.h"
23 
24 int m68k_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
25 {
26     M68kCPU *cpu = M68K_CPU(cs);
27     CPUM68KState *env = &cpu->env;
28 
29     if (n < 8) {
30         /* D0-D7 */
31         return gdb_get_reg32(mem_buf, env->dregs[n]);
32     } else if (n < 16) {
33         /* A0-A7 */
34         return gdb_get_reg32(mem_buf, env->aregs[n - 8]);
35     } else {
36         switch (n) {
37         case 16:
38             /* SR is made of SR+CCR, CCR is many 1bit flags so uses helper */
39             return gdb_get_reg32(mem_buf, env->sr | cpu_m68k_get_ccr(env));
40         case 17:
41             return gdb_get_reg32(mem_buf, env->pc);
42         }
43     }
44     /*
45      * FP registers not included here because they vary between
46      * ColdFire and m68k.  Use XML bits for these.
47      */
48     return 0;
49 }
50 
51 int m68k_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
52 {
53     M68kCPU *cpu = M68K_CPU(cs);
54     CPUM68KState *env = &cpu->env;
55     uint32_t tmp;
56 
57     tmp = ldl_p(mem_buf);
58 
59     if (n < 8) {
60         /* D0-D7 */
61         env->dregs[n] = tmp;
62     } else if (n < 16) {
63         /* A0-A7 */
64         env->aregs[n - 8] = tmp;
65     } else {
66         switch (n) {
67         case 16:
68             cpu_m68k_set_sr(env, tmp);
69             break;
70         case 17:
71             env->pc = tmp;
72             break;
73         default:
74             return 0;
75         }
76     }
77     return 4;
78 }
79