1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * Copyright (c) 2021 Loongson Technology Corporation Limited
4 */
5
6static bool trans_b(DisasContext *ctx, arg_b *a)
7{
8    gen_goto_tb(ctx, 0, ctx->base.pc_next + a->offs);
9    ctx->base.is_jmp = DISAS_NORETURN;
10    return true;
11}
12
13static bool trans_bl(DisasContext *ctx, arg_bl *a)
14{
15    tcg_gen_movi_tl(cpu_gpr[1], make_address_pc(ctx, ctx->base.pc_next + 4));
16    gen_goto_tb(ctx, 0, ctx->base.pc_next + a->offs);
17    ctx->base.is_jmp = DISAS_NORETURN;
18    return true;
19}
20
21static bool trans_jirl(DisasContext *ctx, arg_jirl *a)
22{
23    TCGv dest = gpr_dst(ctx, a->rd, EXT_NONE);
24    TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE);
25
26    TCGv addr = make_address_i(ctx, src1, a->imm);
27    tcg_gen_mov_tl(cpu_pc, addr);
28    tcg_gen_movi_tl(dest, make_address_pc(ctx, ctx->base.pc_next + 4));
29    gen_set_gpr(a->rd, dest, EXT_NONE);
30    tcg_gen_lookup_and_goto_ptr();
31    ctx->base.is_jmp = DISAS_NORETURN;
32    return true;
33}
34
35static void gen_bc(DisasContext *ctx, TCGv src1, TCGv src2,
36                   target_long offs, TCGCond cond)
37{
38    TCGLabel *l = gen_new_label();
39    tcg_gen_brcond_tl(cond, src1, src2, l);
40    gen_goto_tb(ctx, 1, ctx->base.pc_next + 4);
41    gen_set_label(l);
42    gen_goto_tb(ctx, 0, ctx->base.pc_next + offs);
43    ctx->base.is_jmp = DISAS_NORETURN;
44}
45
46static bool gen_rr_bc(DisasContext *ctx, arg_rr_offs *a, TCGCond cond)
47{
48    TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE);
49    TCGv src2 = gpr_src(ctx, a->rd, EXT_NONE);
50
51    gen_bc(ctx, src1, src2, a->offs, cond);
52    return true;
53}
54
55static bool gen_rz_bc(DisasContext *ctx, arg_r_offs *a, TCGCond cond)
56{
57    TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE);
58    TCGv src2 = tcg_constant_tl(0);
59
60    gen_bc(ctx, src1, src2, a->offs, cond);
61    return true;
62}
63
64static bool gen_cz_bc(DisasContext *ctx, arg_c_offs *a, TCGCond cond)
65{
66    TCGv src1 = tcg_temp_new();
67    TCGv src2 = tcg_constant_tl(0);
68
69    tcg_gen_ld8u_tl(src1, tcg_env,
70                    offsetof(CPULoongArchState, cf[a->cj]));
71    gen_bc(ctx, src1, src2, a->offs, cond);
72    return true;
73}
74
75TRANS(beq, ALL, gen_rr_bc, TCG_COND_EQ)
76TRANS(bne, ALL, gen_rr_bc, TCG_COND_NE)
77TRANS(blt, ALL, gen_rr_bc, TCG_COND_LT)
78TRANS(bge, ALL, gen_rr_bc, TCG_COND_GE)
79TRANS(bltu, ALL, gen_rr_bc, TCG_COND_LTU)
80TRANS(bgeu, ALL, gen_rr_bc, TCG_COND_GEU)
81TRANS(beqz, ALL, gen_rz_bc, TCG_COND_EQ)
82TRANS(bnez, ALL, gen_rz_bc, TCG_COND_NE)
83TRANS(bceqz, 64, gen_cz_bc, TCG_COND_EQ)
84TRANS(bcnez, 64, gen_cz_bc, TCG_COND_NE)
85