1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * QEMU LoongArch Machine State 4 * 5 * Copyright (c) 2021 Loongson Technology Corporation Limited 6 */ 7 8 #include "qemu/osdep.h" 9 #include "cpu.h" 10 #include "migration/cpu.h" 11 12 /* LoongArch CPU state */ 13 14 const VMStateDescription vmstate_loongarch_cpu = { 15 .name = "cpu", 16 .version_id = 0, 17 .minimum_version_id = 0, 18 .fields = (VMStateField[]) { 19 20 VMSTATE_UINTTL_ARRAY(env.gpr, LoongArchCPU, 32), 21 VMSTATE_UINTTL(env.pc, LoongArchCPU), 22 VMSTATE_UINT64_ARRAY(env.fpr, LoongArchCPU, 32), 23 VMSTATE_UINT32(env.fcsr0, LoongArchCPU), 24 VMSTATE_BOOL_ARRAY(env.cf, LoongArchCPU, 8), 25 26 /* Remaining CSRs */ 27 VMSTATE_UINT64(env.CSR_CRMD, LoongArchCPU), 28 VMSTATE_UINT64(env.CSR_PRMD, LoongArchCPU), 29 VMSTATE_UINT64(env.CSR_EUEN, LoongArchCPU), 30 VMSTATE_UINT64(env.CSR_MISC, LoongArchCPU), 31 VMSTATE_UINT64(env.CSR_ECFG, LoongArchCPU), 32 VMSTATE_UINT64(env.CSR_ESTAT, LoongArchCPU), 33 VMSTATE_UINT64(env.CSR_ERA, LoongArchCPU), 34 VMSTATE_UINT64(env.CSR_BADV, LoongArchCPU), 35 VMSTATE_UINT64(env.CSR_BADI, LoongArchCPU), 36 VMSTATE_UINT64(env.CSR_EENTRY, LoongArchCPU), 37 VMSTATE_UINT64(env.CSR_TLBIDX, LoongArchCPU), 38 VMSTATE_UINT64(env.CSR_TLBEHI, LoongArchCPU), 39 VMSTATE_UINT64(env.CSR_TLBELO0, LoongArchCPU), 40 VMSTATE_UINT64(env.CSR_TLBELO1, LoongArchCPU), 41 VMSTATE_UINT64(env.CSR_ASID, LoongArchCPU), 42 VMSTATE_UINT64(env.CSR_PGDL, LoongArchCPU), 43 VMSTATE_UINT64(env.CSR_PGDH, LoongArchCPU), 44 VMSTATE_UINT64(env.CSR_PGD, LoongArchCPU), 45 VMSTATE_UINT64(env.CSR_PWCL, LoongArchCPU), 46 VMSTATE_UINT64(env.CSR_PWCH, LoongArchCPU), 47 VMSTATE_UINT64(env.CSR_STLBPS, LoongArchCPU), 48 VMSTATE_UINT64(env.CSR_RVACFG, LoongArchCPU), 49 VMSTATE_UINT64(env.CSR_PRCFG1, LoongArchCPU), 50 VMSTATE_UINT64(env.CSR_PRCFG2, LoongArchCPU), 51 VMSTATE_UINT64(env.CSR_PRCFG3, LoongArchCPU), 52 VMSTATE_UINT64_ARRAY(env.CSR_SAVE, LoongArchCPU, 16), 53 VMSTATE_UINT64(env.CSR_TID, LoongArchCPU), 54 VMSTATE_UINT64(env.CSR_TCFG, LoongArchCPU), 55 VMSTATE_UINT64(env.CSR_TVAL, LoongArchCPU), 56 VMSTATE_UINT64(env.CSR_CNTC, LoongArchCPU), 57 VMSTATE_UINT64(env.CSR_TICLR, LoongArchCPU), 58 VMSTATE_UINT64(env.CSR_LLBCTL, LoongArchCPU), 59 VMSTATE_UINT64(env.CSR_IMPCTL1, LoongArchCPU), 60 VMSTATE_UINT64(env.CSR_IMPCTL2, LoongArchCPU), 61 VMSTATE_UINT64(env.CSR_TLBRENTRY, LoongArchCPU), 62 VMSTATE_UINT64(env.CSR_TLBRBADV, LoongArchCPU), 63 VMSTATE_UINT64(env.CSR_TLBRERA, LoongArchCPU), 64 VMSTATE_UINT64(env.CSR_TLBRSAVE, LoongArchCPU), 65 VMSTATE_UINT64(env.CSR_TLBRELO0, LoongArchCPU), 66 VMSTATE_UINT64(env.CSR_TLBRELO1, LoongArchCPU), 67 VMSTATE_UINT64(env.CSR_TLBREHI, LoongArchCPU), 68 VMSTATE_UINT64(env.CSR_TLBRPRMD, LoongArchCPU), 69 VMSTATE_UINT64(env.CSR_MERRCTL, LoongArchCPU), 70 VMSTATE_UINT64(env.CSR_MERRINFO1, LoongArchCPU), 71 VMSTATE_UINT64(env.CSR_MERRINFO2, LoongArchCPU), 72 VMSTATE_UINT64(env.CSR_MERRENTRY, LoongArchCPU), 73 VMSTATE_UINT64(env.CSR_MERRERA, LoongArchCPU), 74 VMSTATE_UINT64(env.CSR_MERRSAVE, LoongArchCPU), 75 VMSTATE_UINT64(env.CSR_CTAG, LoongArchCPU), 76 VMSTATE_UINT64_ARRAY(env.CSR_DMW, LoongArchCPU, 4), 77 78 /* Debug CSRs */ 79 VMSTATE_UINT64(env.CSR_DBG, LoongArchCPU), 80 VMSTATE_UINT64(env.CSR_DERA, LoongArchCPU), 81 VMSTATE_UINT64(env.CSR_DSAVE, LoongArchCPU), 82 83 VMSTATE_END_OF_LIST() 84 }, 85 }; 86