1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * QEMU LoongArch CPU -- internal functions and types 4 * 5 * Copyright (c) 2021 Loongson Technology Corporation Limited 6 */ 7 8 #ifndef LOONGARCH_INTERNALS_H 9 #define LOONGARCH_INTERNALS_H 10 11 #define FCMP_LT 0b0001 /* fp0 < fp1 */ 12 #define FCMP_EQ 0b0010 /* fp0 = fp1 */ 13 #define FCMP_UN 0b0100 /* unordered */ 14 #define FCMP_GT 0b1000 /* fp0 > fp1 */ 15 16 #define TARGET_PHYS_MASK MAKE_64BIT_MASK(0, TARGET_PHYS_ADDR_SPACE_BITS) 17 #define TARGET_VIRT_MASK MAKE_64BIT_MASK(0, TARGET_VIRT_ADDR_SPACE_BITS) 18 19 /* Global bit used for lddir/ldpte */ 20 #define LOONGARCH_PAGE_HUGE_SHIFT 6 21 /* Global bit for huge page */ 22 #define LOONGARCH_HGLOBAL_SHIFT 12 23 24 #if HOST_BIG_ENDIAN 25 #define B(x) B[15 - (x)] 26 #define H(x) H[7 - (x)] 27 #define W(x) W[3 - (x)] 28 #define D(x) D[1 - (x)] 29 #define UB(x) UB[15 - (x)] 30 #define UH(x) UH[7 - (x)] 31 #define UW(x) UW[3 - (x)] 32 #define UD(x) UD[1 -(x)] 33 #define Q(x) Q[x] 34 #else 35 #define B(x) B[x] 36 #define H(x) H[x] 37 #define W(x) W[x] 38 #define D(x) D[x] 39 #define UB(x) UB[x] 40 #define UH(x) UH[x] 41 #define UW(x) UW[x] 42 #define UD(x) UD[x] 43 #define Q(x) Q[x] 44 #endif 45 46 void loongarch_translate_init(void); 47 48 void loongarch_cpu_dump_state(CPUState *cpu, FILE *f, int flags); 49 50 void G_NORETURN do_raise_exception(CPULoongArchState *env, 51 uint32_t exception, 52 uintptr_t pc); 53 54 const char *loongarch_exception_name(int32_t exception); 55 56 int ieee_ex_to_loongarch(int xcpt); 57 void restore_fp_status(CPULoongArchState *env); 58 59 #ifndef CONFIG_USER_ONLY 60 extern const VMStateDescription vmstate_loongarch_cpu; 61 62 void loongarch_cpu_set_irq(void *opaque, int irq, int level); 63 64 void loongarch_constant_timer_cb(void *opaque); 65 uint64_t cpu_loongarch_get_constant_timer_counter(LoongArchCPU *cpu); 66 uint64_t cpu_loongarch_get_constant_timer_ticks(LoongArchCPU *cpu); 67 void cpu_loongarch_store_constant_timer_config(LoongArchCPU *cpu, 68 uint64_t value); 69 70 bool loongarch_cpu_tlb_fill(CPUState *cs, vaddr address, int size, 71 MMUAccessType access_type, int mmu_idx, 72 bool probe, uintptr_t retaddr); 73 74 hwaddr loongarch_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); 75 #endif /* !CONFIG_USER_ONLY */ 76 77 uint64_t read_fcc(CPULoongArchState *env); 78 void write_fcc(CPULoongArchState *env, uint64_t val); 79 80 int loongarch_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n); 81 int loongarch_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n); 82 void loongarch_cpu_register_gdb_regs_for_features(CPUState *cs); 83 84 #endif 85