1 /* 2 * LOONGARCH gdb server stub 3 * 4 * Copyright (c) 2021 Loongson Technology Corporation Limited 5 * 6 * SPDX-License-Identifier: LGPL-2.1+ 7 */ 8 9 #include "qemu/osdep.h" 10 #include "cpu.h" 11 #include "internals.h" 12 #include "exec/gdbstub.h" 13 #include "gdbstub/helpers.h" 14 #include "vec.h" 15 16 uint64_t read_fcc(CPULoongArchState *env) 17 { 18 uint64_t ret = 0; 19 20 for (int i = 0; i < 8; ++i) { 21 ret |= (uint64_t)env->cf[i] << (i * 8); 22 } 23 24 return ret; 25 } 26 27 void write_fcc(CPULoongArchState *env, uint64_t val) 28 { 29 for (int i = 0; i < 8; ++i) { 30 env->cf[i] = (val >> (i * 8)) & 1; 31 } 32 } 33 34 int loongarch_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) 35 { 36 LoongArchCPU *cpu = LOONGARCH_CPU(cs); 37 CPULoongArchState *env = &cpu->env; 38 uint64_t val; 39 40 if (0 <= n && n < 32) { 41 val = env->gpr[n]; 42 } else if (n == 32) { 43 /* orig_a0 */ 44 val = 0; 45 } else if (n == 33) { 46 val = env->pc; 47 } else if (n == 34) { 48 val = env->CSR_BADV; 49 } 50 51 if (0 <= n && n <= 34) { 52 if (is_la64(env)) { 53 return gdb_get_reg64(mem_buf, val); 54 } else { 55 return gdb_get_reg32(mem_buf, val); 56 } 57 } 58 return 0; 59 } 60 61 int loongarch_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) 62 { 63 LoongArchCPU *cpu = LOONGARCH_CPU(cs); 64 CPULoongArchState *env = &cpu->env; 65 target_ulong tmp; 66 int read_length; 67 int length = 0; 68 69 if (is_la64(env)) { 70 tmp = ldq_p(mem_buf); 71 read_length = 8; 72 } else { 73 tmp = ldl_p(mem_buf); 74 read_length = 4; 75 } 76 77 if (0 <= n && n < 32) { 78 env->gpr[n] = tmp; 79 length = read_length; 80 } else if (n == 33) { 81 set_pc(env, tmp); 82 length = read_length; 83 } 84 return length; 85 } 86 87 static int loongarch_gdb_get_fpu(CPULoongArchState *env, 88 GByteArray *mem_buf, int n) 89 { 90 if (0 <= n && n < 32) { 91 return gdb_get_reg64(mem_buf, env->fpr[n].vreg.D(0)); 92 } else if (32 <= n && n < 40) { 93 return gdb_get_reg8(mem_buf, env->cf[n - 32]); 94 } else if (n == 40) { 95 return gdb_get_reg32(mem_buf, env->fcsr0); 96 } 97 return 0; 98 } 99 100 static int loongarch_gdb_set_fpu(CPULoongArchState *env, 101 uint8_t *mem_buf, int n) 102 { 103 int length = 0; 104 105 if (0 <= n && n < 32) { 106 env->fpr[n].vreg.D(0) = ldq_p(mem_buf); 107 length = 8; 108 } else if (32 <= n && n < 40) { 109 env->cf[n - 32] = ldub_p(mem_buf); 110 length = 1; 111 } else if (n == 40) { 112 env->fcsr0 = ldl_p(mem_buf); 113 length = 4; 114 } 115 return length; 116 } 117 118 void loongarch_cpu_register_gdb_regs_for_features(CPUState *cs) 119 { 120 gdb_register_coprocessor(cs, loongarch_gdb_get_fpu, loongarch_gdb_set_fpu, 121 41, "loongarch-fpu.xml", 0); 122 } 123