xref: /openbmc/qemu/target/i386/tcg/user/excp_helper.c (revision 2e1cacfb)
1 /*
2  *  x86 exception helpers - user-mode specific code
3  *
4  *  Copyright (c) 2003 Fabrice Bellard
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2.1 of the License, or (at your option) any later version.
10  *
11  * This library is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #include "qemu/osdep.h"
21 #include "cpu.h"
22 #include "exec/exec-all.h"
23 #include "tcg/helper-tcg.h"
24 
25 void x86_cpu_record_sigsegv(CPUState *cs, vaddr addr,
26                             MMUAccessType access_type,
27                             bool maperr, uintptr_t ra)
28 {
29     X86CPU *cpu = X86_CPU(cs);
30     CPUX86State *env = &cpu->env;
31 
32     /*
33      * The error_code that hw reports as part of the exception frame
34      * is copied to linux sigcontext.err.  The exception_index is
35      * copied to linux sigcontext.trapno.  Short of inventing a new
36      * place to store the trapno, we cannot let our caller raise the
37      * signal and set exception_index to EXCP_INTERRUPT.
38      */
39     env->cr[2] = addr;
40     env->error_code = ((access_type == MMU_DATA_STORE) << PG_ERROR_W_BIT)
41                     | (maperr ? 0 : PG_ERROR_P_MASK)
42                     | PG_ERROR_U_MASK;
43     cs->exception_index = EXCP0E_PAGE;
44 
45     /* Disable do_interrupt_user. */
46     env->exception_is_int = 0;
47     env->exception_next_eip = -1;
48 
49     cpu_loop_exit_restore(cs, ra);
50 }
51 
52 void x86_cpu_record_sigbus(CPUState *cs, vaddr addr,
53                            MMUAccessType access_type, uintptr_t ra)
54 {
55     X86CPU *cpu = X86_CPU(cs);
56     handle_unaligned_access(&cpu->env, addr, access_type, ra);
57 }
58