xref: /openbmc/qemu/target/i386/tcg/tcg-cpu.h (revision ffe98631)
1 /*
2  * i386 TCG cpu class initialization functions
3  *
4  *  Copyright (c) 2003 Fabrice Bellard
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2 of the License, or (at your option) any later version.
10  *
11  * This library is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18  */
19 #ifndef TCG_CPU_H
20 #define TCG_CPU_H
21 
22 #define XSAVE_FCW_FSW_OFFSET    0x000
23 #define XSAVE_FTW_FOP_OFFSET    0x004
24 #define XSAVE_CWD_RIP_OFFSET    0x008
25 #define XSAVE_CWD_RDP_OFFSET    0x010
26 #define XSAVE_MXCSR_OFFSET      0x018
27 #define XSAVE_ST_SPACE_OFFSET   0x020
28 #define XSAVE_XMM_SPACE_OFFSET  0x0a0
29 #define XSAVE_XSTATE_BV_OFFSET  0x200
30 #define XSAVE_AVX_OFFSET        0x240
31 #define XSAVE_BNDREG_OFFSET     0x3c0
32 #define XSAVE_BNDCSR_OFFSET     0x400
33 #define XSAVE_OPMASK_OFFSET     0x440
34 #define XSAVE_ZMM_HI256_OFFSET  0x480
35 #define XSAVE_HI16_ZMM_OFFSET   0x680
36 #define XSAVE_PKRU_OFFSET       0xa80
37 
38 typedef struct X86XSaveArea {
39     X86LegacyXSaveArea legacy;
40     X86XSaveHeader header;
41 
42     /* Extended save areas: */
43 
44     /* AVX State: */
45     XSaveAVX avx_state;
46 
47     /* Ensure that XSaveBNDREG is properly aligned. */
48     uint8_t padding[XSAVE_BNDREG_OFFSET
49                     - sizeof(X86LegacyXSaveArea)
50                     - sizeof(X86XSaveHeader)
51                     - sizeof(XSaveAVX)];
52 
53     /* MPX State: */
54     XSaveBNDREG bndreg_state;
55     XSaveBNDCSR bndcsr_state;
56     /* AVX-512 State: */
57     XSaveOpmask opmask_state;
58     XSaveZMM_Hi256 zmm_hi256_state;
59     XSaveHi16_ZMM hi16_zmm_state;
60     /* PKRU State: */
61     XSavePKRU pkru_state;
62 } X86XSaveArea;
63 
64 QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, legacy.fcw) != XSAVE_FCW_FSW_OFFSET);
65 QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, legacy.ftw) != XSAVE_FTW_FOP_OFFSET);
66 QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, legacy.fpip) != XSAVE_CWD_RIP_OFFSET);
67 QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, legacy.fpdp) != XSAVE_CWD_RDP_OFFSET);
68 QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, legacy.mxcsr) != XSAVE_MXCSR_OFFSET);
69 QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, legacy.fpregs) != XSAVE_ST_SPACE_OFFSET);
70 QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, legacy.xmm_regs) != XSAVE_XMM_SPACE_OFFSET);
71 QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, avx_state) != XSAVE_AVX_OFFSET);
72 QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, bndreg_state) != XSAVE_BNDREG_OFFSET);
73 QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, bndcsr_state) != XSAVE_BNDCSR_OFFSET);
74 QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, opmask_state) != XSAVE_OPMASK_OFFSET);
75 QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, zmm_hi256_state) != XSAVE_ZMM_HI256_OFFSET);
76 QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, hi16_zmm_state) != XSAVE_HI16_ZMM_OFFSET);
77 QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, pkru_state) != XSAVE_PKRU_OFFSET);
78 
79 bool tcg_cpu_realizefn(CPUState *cs, Error **errp);
80 
81 #endif /* TCG_CPU_H */
82