xref: /openbmc/qemu/target/i386/tcg/helper-tcg.h (revision ca5aa28e)
1 /*
2  * TCG specific prototypes for helpers
3  *
4  *  Copyright (c) 2003 Fabrice Bellard
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2 of the License, or (at your option) any later version.
10  *
11  * This library is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #ifndef I386_HELPER_TCG_H
21 #define I386_HELPER_TCG_H
22 
23 #include "exec/exec-all.h"
24 #include "qemu/host-utils.h"
25 
26 /* Maximum instruction code size */
27 #define TARGET_MAX_INSN_SIZE 16
28 
29 #if defined(TARGET_X86_64)
30 # define TCG_PHYS_ADDR_BITS 40
31 #else
32 # define TCG_PHYS_ADDR_BITS 36
33 #endif
34 
35 QEMU_BUILD_BUG_ON(TCG_PHYS_ADDR_BITS > TARGET_PHYS_ADDR_SPACE_BITS);
36 
37 /**
38  * x86_cpu_do_interrupt:
39  * @cpu: vCPU the interrupt is to be handled by.
40  */
41 void x86_cpu_do_interrupt(CPUState *cpu);
42 #ifndef CONFIG_USER_ONLY
43 bool x86_cpu_exec_halt(CPUState *cpu);
44 bool x86_need_replay_interrupt(int interrupt_request);
45 bool x86_cpu_exec_interrupt(CPUState *cpu, int int_req);
46 #endif
47 
48 void breakpoint_handler(CPUState *cs);
49 
50 /* n must be a constant to be efficient */
51 static inline target_long lshift(target_long x, int n)
52 {
53     if (n >= 0) {
54         return x << n;
55     } else {
56         return x >> (-n);
57     }
58 }
59 
60 /* translate.c */
61 void tcg_x86_init(void);
62 
63 /* excp_helper.c */
64 G_NORETURN void raise_exception(CPUX86State *env, int exception_index);
65 G_NORETURN void raise_exception_ra(CPUX86State *env, int exception_index,
66                                    uintptr_t retaddr);
67 G_NORETURN void raise_exception_err(CPUX86State *env, int exception_index,
68                                     int error_code);
69 G_NORETURN void raise_exception_err_ra(CPUX86State *env, int exception_index,
70                                        int error_code, uintptr_t retaddr);
71 G_NORETURN void raise_interrupt(CPUX86State *nenv, int intno, int next_eip_addend);
72 G_NORETURN void handle_unaligned_access(CPUX86State *env, vaddr vaddr,
73                                         MMUAccessType access_type,
74                                         uintptr_t retaddr);
75 #ifdef CONFIG_USER_ONLY
76 void x86_cpu_record_sigsegv(CPUState *cs, vaddr addr,
77                             MMUAccessType access_type,
78                             bool maperr, uintptr_t ra);
79 void x86_cpu_record_sigbus(CPUState *cs, vaddr addr,
80                            MMUAccessType access_type, uintptr_t ra);
81 #else
82 bool x86_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
83                       MMUAccessType access_type, int mmu_idx,
84                       bool probe, uintptr_t retaddr);
85 G_NORETURN void x86_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
86                                             MMUAccessType access_type,
87                                             int mmu_idx, uintptr_t retaddr);
88 #endif
89 
90 /* cc_helper.c */
91 static inline unsigned int compute_pf(uint8_t x)
92 {
93     return !parity8(x) * CC_P;
94 }
95 
96 /* misc_helper.c */
97 void cpu_load_eflags(CPUX86State *env, int eflags, int update_mask);
98 
99 /* sysemu/svm_helper.c */
100 #ifndef CONFIG_USER_ONLY
101 G_NORETURN void cpu_vmexit(CPUX86State *nenv, uint32_t exit_code,
102                            uint64_t exit_info_1, uintptr_t retaddr);
103 void do_vmexit(CPUX86State *env);
104 #endif
105 
106 /* seg_helper.c */
107 void do_interrupt_x86_hardirq(CPUX86State *env, int intno, int is_hw);
108 void do_interrupt_all(X86CPU *cpu, int intno, int is_int,
109                       int error_code, target_ulong next_eip, int is_hw);
110 void handle_even_inj(CPUX86State *env, int intno, int is_int,
111                      int error_code, int is_hw, int rm);
112 int exception_has_error_code(int intno);
113 
114 /* smm_helper.c */
115 void do_smm_enter(X86CPU *cpu);
116 
117 /* sysemu/bpt_helper.c */
118 bool check_hw_breakpoints(CPUX86State *env, bool force_dr6_update);
119 
120 /*
121  * Do the tasks usually performed by gen_eob().  Callers of this function
122  * should also handle TF as appropriate.
123  */
124 static inline void do_end_instruction(CPUX86State *env)
125 {
126     /* needed if sti is just before */
127     env->hflags &= ~HF_INHIBIT_IRQ_MASK;
128     env->eflags &= ~HF_RF_MASK;
129 }
130 #endif /* I386_HELPER_TCG_H */
131