1 /* 2 * TCG specific prototypes for helpers 3 * 4 * Copyright (c) 2003 Fabrice Bellard 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #ifndef I386_HELPER_TCG_H 21 #define I386_HELPER_TCG_H 22 23 #include "exec/exec-all.h" 24 25 /* Maximum instruction code size */ 26 #define TARGET_MAX_INSN_SIZE 16 27 28 #if defined(TARGET_X86_64) 29 # define TCG_PHYS_ADDR_BITS 40 30 #else 31 # define TCG_PHYS_ADDR_BITS 36 32 #endif 33 34 QEMU_BUILD_BUG_ON(TCG_PHYS_ADDR_BITS > TARGET_PHYS_ADDR_SPACE_BITS); 35 36 /** 37 * x86_cpu_do_interrupt: 38 * @cpu: vCPU the interrupt is to be handled by. 39 */ 40 void x86_cpu_do_interrupt(CPUState *cpu); 41 #ifndef CONFIG_USER_ONLY 42 bool x86_cpu_exec_interrupt(CPUState *cpu, int int_req); 43 #endif 44 45 /* helper.c */ 46 #ifdef CONFIG_USER_ONLY 47 void x86_cpu_record_sigsegv(CPUState *cs, vaddr addr, 48 MMUAccessType access_type, 49 bool maperr, uintptr_t ra); 50 #else 51 bool x86_cpu_tlb_fill(CPUState *cs, vaddr address, int size, 52 MMUAccessType access_type, int mmu_idx, 53 bool probe, uintptr_t retaddr); 54 #endif 55 56 void breakpoint_handler(CPUState *cs); 57 58 /* n must be a constant to be efficient */ 59 static inline target_long lshift(target_long x, int n) 60 { 61 if (n >= 0) { 62 return x << n; 63 } else { 64 return x >> (-n); 65 } 66 } 67 68 /* translate.c */ 69 void tcg_x86_init(void); 70 71 /* excp_helper.c */ 72 void QEMU_NORETURN raise_exception(CPUX86State *env, int exception_index); 73 void QEMU_NORETURN raise_exception_ra(CPUX86State *env, int exception_index, 74 uintptr_t retaddr); 75 void QEMU_NORETURN raise_exception_err(CPUX86State *env, int exception_index, 76 int error_code); 77 void QEMU_NORETURN raise_exception_err_ra(CPUX86State *env, int exception_index, 78 int error_code, uintptr_t retaddr); 79 void QEMU_NORETURN raise_interrupt(CPUX86State *nenv, int intno, int is_int, 80 int error_code, int next_eip_addend); 81 82 /* cc_helper.c */ 83 extern const uint8_t parity_table[256]; 84 85 /* misc_helper.c */ 86 void cpu_load_eflags(CPUX86State *env, int eflags, int update_mask); 87 void do_pause(CPUX86State *env) QEMU_NORETURN; 88 89 /* sysemu/svm_helper.c */ 90 #ifndef CONFIG_USER_ONLY 91 void QEMU_NORETURN cpu_vmexit(CPUX86State *nenv, uint32_t exit_code, 92 uint64_t exit_info_1, uintptr_t retaddr); 93 void do_vmexit(CPUX86State *env); 94 #endif 95 96 /* seg_helper.c */ 97 void do_interrupt_x86_hardirq(CPUX86State *env, int intno, int is_hw); 98 void do_interrupt_all(X86CPU *cpu, int intno, int is_int, 99 int error_code, target_ulong next_eip, int is_hw); 100 void handle_even_inj(CPUX86State *env, int intno, int is_int, 101 int error_code, int is_hw, int rm); 102 int exception_has_error_code(int intno); 103 104 /* smm_helper.c */ 105 void do_smm_enter(X86CPU *cpu); 106 107 /* bpt_helper.c */ 108 bool check_hw_breakpoints(CPUX86State *env, bool force_dr6_update); 109 110 #endif /* I386_HELPER_TCG_H */ 111