1 /* 2 * MMX/3DNow!/SSE/SSE2/SSE3/SSSE3/SSE4/PNI support 3 * 4 * Copyright (c) 2005 Fabrice Bellard 5 * Copyright (c) 2008 Intel Corporation <andrew.zaborowski@intel.com> 6 * 7 * This library is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU Lesser General Public 9 * License as published by the Free Software Foundation; either 10 * version 2.1 of the License, or (at your option) any later version. 11 * 12 * This library is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * Lesser General Public License for more details. 16 * 17 * You should have received a copy of the GNU Lesser General Public 18 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 19 */ 20 21 #include "crypto/aes.h" 22 #include "crypto/aes-round.h" 23 24 #if SHIFT == 0 25 #define Reg MMXReg 26 #define XMM_ONLY(...) 27 #define B(n) MMX_B(n) 28 #define W(n) MMX_W(n) 29 #define L(n) MMX_L(n) 30 #define Q(n) MMX_Q(n) 31 #define SUFFIX _mmx 32 #else 33 #define Reg ZMMReg 34 #define XMM_ONLY(...) __VA_ARGS__ 35 #define B(n) ZMM_B(n) 36 #define W(n) ZMM_W(n) 37 #define L(n) ZMM_L(n) 38 #define Q(n) ZMM_Q(n) 39 #if SHIFT == 1 40 #define SUFFIX _xmm 41 #else 42 #define SUFFIX _ymm 43 #endif 44 #endif 45 46 #define LANE_WIDTH (SHIFT ? 16 : 8) 47 #define PACK_WIDTH (LANE_WIDTH / 2) 48 49 #if SHIFT == 0 50 #define FPSRL(x, c) ((x) >> shift) 51 #define FPSRAW(x, c) ((int16_t)(x) >> shift) 52 #define FPSRAL(x, c) ((int32_t)(x) >> shift) 53 #define FPSLL(x, c) ((x) << shift) 54 #endif 55 56 void glue(helper_psrlw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, Reg *c) 57 { 58 int shift; 59 if (c->Q(0) > 15) { 60 for (int i = 0; i < 1 << SHIFT; i++) { 61 d->Q(i) = 0; 62 } 63 } else { 64 shift = c->B(0); 65 for (int i = 0; i < 4 << SHIFT; i++) { 66 d->W(i) = FPSRL(s->W(i), shift); 67 } 68 } 69 } 70 71 void glue(helper_psllw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, Reg *c) 72 { 73 int shift; 74 if (c->Q(0) > 15) { 75 for (int i = 0; i < 1 << SHIFT; i++) { 76 d->Q(i) = 0; 77 } 78 } else { 79 shift = c->B(0); 80 for (int i = 0; i < 4 << SHIFT; i++) { 81 d->W(i) = FPSLL(s->W(i), shift); 82 } 83 } 84 } 85 86 void glue(helper_psraw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, Reg *c) 87 { 88 int shift; 89 if (c->Q(0) > 15) { 90 shift = 15; 91 } else { 92 shift = c->B(0); 93 } 94 for (int i = 0; i < 4 << SHIFT; i++) { 95 d->W(i) = FPSRAW(s->W(i), shift); 96 } 97 } 98 99 void glue(helper_psrld, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, Reg *c) 100 { 101 int shift; 102 if (c->Q(0) > 31) { 103 for (int i = 0; i < 1 << SHIFT; i++) { 104 d->Q(i) = 0; 105 } 106 } else { 107 shift = c->B(0); 108 for (int i = 0; i < 2 << SHIFT; i++) { 109 d->L(i) = FPSRL(s->L(i), shift); 110 } 111 } 112 } 113 114 void glue(helper_pslld, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, Reg *c) 115 { 116 int shift; 117 if (c->Q(0) > 31) { 118 for (int i = 0; i < 1 << SHIFT; i++) { 119 d->Q(i) = 0; 120 } 121 } else { 122 shift = c->B(0); 123 for (int i = 0; i < 2 << SHIFT; i++) { 124 d->L(i) = FPSLL(s->L(i), shift); 125 } 126 } 127 } 128 129 void glue(helper_psrad, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, Reg *c) 130 { 131 int shift; 132 if (c->Q(0) > 31) { 133 shift = 31; 134 } else { 135 shift = c->B(0); 136 } 137 for (int i = 0; i < 2 << SHIFT; i++) { 138 d->L(i) = FPSRAL(s->L(i), shift); 139 } 140 } 141 142 void glue(helper_psrlq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, Reg *c) 143 { 144 int shift; 145 if (c->Q(0) > 63) { 146 for (int i = 0; i < 1 << SHIFT; i++) { 147 d->Q(i) = 0; 148 } 149 } else { 150 shift = c->B(0); 151 for (int i = 0; i < 1 << SHIFT; i++) { 152 d->Q(i) = FPSRL(s->Q(i), shift); 153 } 154 } 155 } 156 157 void glue(helper_psllq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, Reg *c) 158 { 159 int shift; 160 if (c->Q(0) > 63) { 161 for (int i = 0; i < 1 << SHIFT; i++) { 162 d->Q(i) = 0; 163 } 164 } else { 165 shift = c->B(0); 166 for (int i = 0; i < 1 << SHIFT; i++) { 167 d->Q(i) = FPSLL(s->Q(i), shift); 168 } 169 } 170 } 171 172 #if SHIFT >= 1 173 void glue(helper_psrldq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, Reg *c) 174 { 175 int shift, i, j; 176 177 shift = c->L(0); 178 if (shift > 16) { 179 shift = 16; 180 } 181 for (j = 0; j < 8 << SHIFT; j += LANE_WIDTH) { 182 for (i = 0; i < 16 - shift; i++) { 183 d->B(j + i) = s->B(j + i + shift); 184 } 185 for (i = 16 - shift; i < 16; i++) { 186 d->B(j + i) = 0; 187 } 188 } 189 } 190 191 void glue(helper_pslldq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, Reg *c) 192 { 193 int shift, i, j; 194 195 shift = c->L(0); 196 if (shift > 16) { 197 shift = 16; 198 } 199 for (j = 0; j < 8 << SHIFT; j += LANE_WIDTH) { 200 for (i = 15; i >= shift; i--) { 201 d->B(j + i) = s->B(j + i - shift); 202 } 203 for (i = 0; i < shift; i++) { 204 d->B(j + i) = 0; 205 } 206 } 207 } 208 #endif 209 210 #define SSE_HELPER_1(name, elem, num, F) \ 211 void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) \ 212 { \ 213 int n = num; \ 214 for (int i = 0; i < n; i++) { \ 215 d->elem(i) = F(s->elem(i)); \ 216 } \ 217 } 218 219 #define SSE_HELPER_2(name, elem, num, F) \ 220 void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s) \ 221 { \ 222 int n = num; \ 223 for (int i = 0; i < n; i++) { \ 224 d->elem(i) = F(v->elem(i), s->elem(i)); \ 225 } \ 226 } 227 228 #define SSE_HELPER_B(name, F) \ 229 SSE_HELPER_2(name, B, 8 << SHIFT, F) 230 231 #define SSE_HELPER_W(name, F) \ 232 SSE_HELPER_2(name, W, 4 << SHIFT, F) 233 234 #define SSE_HELPER_L(name, F) \ 235 SSE_HELPER_2(name, L, 2 << SHIFT, F) 236 237 #define SSE_HELPER_Q(name, F) \ 238 SSE_HELPER_2(name, Q, 1 << SHIFT, F) 239 240 #if SHIFT == 0 241 static inline int satub(int x) 242 { 243 if (x < 0) { 244 return 0; 245 } else if (x > 255) { 246 return 255; 247 } else { 248 return x; 249 } 250 } 251 252 static inline int satuw(int x) 253 { 254 if (x < 0) { 255 return 0; 256 } else if (x > 65535) { 257 return 65535; 258 } else { 259 return x; 260 } 261 } 262 263 static inline int satsb(int x) 264 { 265 if (x < -128) { 266 return -128; 267 } else if (x > 127) { 268 return 127; 269 } else { 270 return x; 271 } 272 } 273 274 static inline int satsw(int x) 275 { 276 if (x < -32768) { 277 return -32768; 278 } else if (x > 32767) { 279 return 32767; 280 } else { 281 return x; 282 } 283 } 284 285 #define FADD(a, b) ((a) + (b)) 286 #define FADDUB(a, b) satub((a) + (b)) 287 #define FADDUW(a, b) satuw((a) + (b)) 288 #define FADDSB(a, b) satsb((int8_t)(a) + (int8_t)(b)) 289 #define FADDSW(a, b) satsw((int16_t)(a) + (int16_t)(b)) 290 291 #define FSUB(a, b) ((a) - (b)) 292 #define FSUBUB(a, b) satub((a) - (b)) 293 #define FSUBUW(a, b) satuw((a) - (b)) 294 #define FSUBSB(a, b) satsb((int8_t)(a) - (int8_t)(b)) 295 #define FSUBSW(a, b) satsw((int16_t)(a) - (int16_t)(b)) 296 #define FMINUB(a, b) ((a) < (b)) ? (a) : (b) 297 #define FMINSW(a, b) ((int16_t)(a) < (int16_t)(b)) ? (a) : (b) 298 #define FMAXUB(a, b) ((a) > (b)) ? (a) : (b) 299 #define FMAXSW(a, b) ((int16_t)(a) > (int16_t)(b)) ? (a) : (b) 300 301 #define FMULHRW(a, b) (((int16_t)(a) * (int16_t)(b) + 0x8000) >> 16) 302 #define FMULHUW(a, b) ((a) * (b) >> 16) 303 #define FMULHW(a, b) ((int16_t)(a) * (int16_t)(b) >> 16) 304 305 #define FAVG(a, b) (((a) + (b) + 1) >> 1) 306 #endif 307 308 SSE_HELPER_W(helper_pmulhuw, FMULHUW) 309 SSE_HELPER_W(helper_pmulhw, FMULHW) 310 311 #if SHIFT == 0 312 void glue(helper_pmulhrw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) 313 { 314 d->W(0) = FMULHRW(d->W(0), s->W(0)); 315 d->W(1) = FMULHRW(d->W(1), s->W(1)); 316 d->W(2) = FMULHRW(d->W(2), s->W(2)); 317 d->W(3) = FMULHRW(d->W(3), s->W(3)); 318 } 319 #endif 320 321 SSE_HELPER_B(helper_pavgb, FAVG) 322 SSE_HELPER_W(helper_pavgw, FAVG) 323 324 void glue(helper_pmuludq, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s) 325 { 326 int i; 327 328 for (i = 0; i < (1 << SHIFT); i++) { 329 d->Q(i) = (uint64_t)s->L(i * 2) * (uint64_t)v->L(i * 2); 330 } 331 } 332 333 void glue(helper_pmaddwd, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s) 334 { 335 int i; 336 337 for (i = 0; i < (2 << SHIFT); i++) { 338 d->L(i) = (int16_t)s->W(2 * i) * (int16_t)v->W(2 * i) + 339 (int16_t)s->W(2 * i + 1) * (int16_t)v->W(2 * i + 1); 340 } 341 } 342 343 #if SHIFT == 0 344 static inline int abs1(int a) 345 { 346 if (a < 0) { 347 return -a; 348 } else { 349 return a; 350 } 351 } 352 #endif 353 void glue(helper_psadbw, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s) 354 { 355 int i; 356 357 for (i = 0; i < (1 << SHIFT); i++) { 358 unsigned int val = 0; 359 val += abs1(v->B(8 * i + 0) - s->B(8 * i + 0)); 360 val += abs1(v->B(8 * i + 1) - s->B(8 * i + 1)); 361 val += abs1(v->B(8 * i + 2) - s->B(8 * i + 2)); 362 val += abs1(v->B(8 * i + 3) - s->B(8 * i + 3)); 363 val += abs1(v->B(8 * i + 4) - s->B(8 * i + 4)); 364 val += abs1(v->B(8 * i + 5) - s->B(8 * i + 5)); 365 val += abs1(v->B(8 * i + 6) - s->B(8 * i + 6)); 366 val += abs1(v->B(8 * i + 7) - s->B(8 * i + 7)); 367 d->Q(i) = val; 368 } 369 } 370 371 #if SHIFT < 2 372 void glue(helper_maskmov, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, 373 target_ulong a0) 374 { 375 int i; 376 377 for (i = 0; i < (8 << SHIFT); i++) { 378 if (s->B(i) & 0x80) { 379 cpu_stb_data_ra(env, a0 + i, d->B(i), GETPC()); 380 } 381 } 382 } 383 #endif 384 385 #define SHUFFLE4(F, a, b, offset) do { \ 386 r0 = a->F((order & 3) + offset); \ 387 r1 = a->F(((order >> 2) & 3) + offset); \ 388 r2 = b->F(((order >> 4) & 3) + offset); \ 389 r3 = b->F(((order >> 6) & 3) + offset); \ 390 d->F(offset) = r0; \ 391 d->F(offset + 1) = r1; \ 392 d->F(offset + 2) = r2; \ 393 d->F(offset + 3) = r3; \ 394 } while (0) 395 396 #if SHIFT == 0 397 void glue(helper_pshufw, SUFFIX)(Reg *d, Reg *s, int order) 398 { 399 uint16_t r0, r1, r2, r3; 400 401 SHUFFLE4(W, s, s, 0); 402 } 403 #else 404 void glue(helper_shufps, SUFFIX)(Reg *d, Reg *v, Reg *s, int order) 405 { 406 uint32_t r0, r1, r2, r3; 407 int i; 408 409 for (i = 0; i < 2 << SHIFT; i += 4) { 410 SHUFFLE4(L, v, s, i); 411 } 412 } 413 414 void glue(helper_shufpd, SUFFIX)(Reg *d, Reg *v, Reg *s, int order) 415 { 416 uint64_t r0, r1; 417 int i; 418 419 for (i = 0; i < 1 << SHIFT; i += 2) { 420 r0 = v->Q(((order & 1) & 1) + i); 421 r1 = s->Q(((order >> 1) & 1) + i); 422 d->Q(i) = r0; 423 d->Q(i + 1) = r1; 424 order >>= 2; 425 } 426 } 427 428 void glue(helper_pshufd, SUFFIX)(Reg *d, Reg *s, int order) 429 { 430 uint32_t r0, r1, r2, r3; 431 int i; 432 433 for (i = 0; i < 2 << SHIFT; i += 4) { 434 SHUFFLE4(L, s, s, i); 435 } 436 } 437 438 void glue(helper_pshuflw, SUFFIX)(Reg *d, Reg *s, int order) 439 { 440 uint16_t r0, r1, r2, r3; 441 int i, j; 442 443 for (i = 0, j = 1; j < 1 << SHIFT; i += 8, j += 2) { 444 SHUFFLE4(W, s, s, i); 445 d->Q(j) = s->Q(j); 446 } 447 } 448 449 void glue(helper_pshufhw, SUFFIX)(Reg *d, Reg *s, int order) 450 { 451 uint16_t r0, r1, r2, r3; 452 int i, j; 453 454 for (i = 4, j = 0; j < 1 << SHIFT; i += 8, j += 2) { 455 d->Q(j) = s->Q(j); 456 SHUFFLE4(W, s, s, i); 457 } 458 } 459 #endif 460 461 #if SHIFT >= 1 462 /* FPU ops */ 463 /* XXX: not accurate */ 464 465 #define SSE_HELPER_P(name, F) \ 466 void glue(helper_ ## name ## ps, SUFFIX)(CPUX86State *env, \ 467 Reg *d, Reg *v, Reg *s) \ 468 { \ 469 int i; \ 470 for (i = 0; i < 2 << SHIFT; i++) { \ 471 d->ZMM_S(i) = F(32, v->ZMM_S(i), s->ZMM_S(i)); \ 472 } \ 473 } \ 474 \ 475 void glue(helper_ ## name ## pd, SUFFIX)(CPUX86State *env, \ 476 Reg *d, Reg *v, Reg *s) \ 477 { \ 478 int i; \ 479 for (i = 0; i < 1 << SHIFT; i++) { \ 480 d->ZMM_D(i) = F(64, v->ZMM_D(i), s->ZMM_D(i)); \ 481 } \ 482 } 483 484 #if SHIFT == 1 485 486 #define SSE_HELPER_S(name, F) \ 487 SSE_HELPER_P(name, F) \ 488 \ 489 void helper_ ## name ## ss(CPUX86State *env, Reg *d, Reg *v, Reg *s)\ 490 { \ 491 int i; \ 492 d->ZMM_S(0) = F(32, v->ZMM_S(0), s->ZMM_S(0)); \ 493 for (i = 1; i < 2 << SHIFT; i++) { \ 494 d->ZMM_L(i) = v->ZMM_L(i); \ 495 } \ 496 } \ 497 \ 498 void helper_ ## name ## sd(CPUX86State *env, Reg *d, Reg *v, Reg *s)\ 499 { \ 500 int i; \ 501 d->ZMM_D(0) = F(64, v->ZMM_D(0), s->ZMM_D(0)); \ 502 for (i = 1; i < 1 << SHIFT; i++) { \ 503 d->ZMM_Q(i) = v->ZMM_Q(i); \ 504 } \ 505 } 506 507 #else 508 509 #define SSE_HELPER_S(name, F) SSE_HELPER_P(name, F) 510 511 #endif 512 513 #define FPU_ADD(size, a, b) float ## size ## _add(a, b, &env->sse_status) 514 #define FPU_SUB(size, a, b) float ## size ## _sub(a, b, &env->sse_status) 515 #define FPU_MUL(size, a, b) float ## size ## _mul(a, b, &env->sse_status) 516 #define FPU_DIV(size, a, b) float ## size ## _div(a, b, &env->sse_status) 517 518 /* Note that the choice of comparison op here is important to get the 519 * special cases right: for min and max Intel specifies that (-0,0), 520 * (NaN, anything) and (anything, NaN) return the second argument. 521 */ 522 #define FPU_MIN(size, a, b) \ 523 (float ## size ## _lt(a, b, &env->sse_status) ? (a) : (b)) 524 #define FPU_MAX(size, a, b) \ 525 (float ## size ## _lt(b, a, &env->sse_status) ? (a) : (b)) 526 527 SSE_HELPER_S(add, FPU_ADD) 528 SSE_HELPER_S(sub, FPU_SUB) 529 SSE_HELPER_S(mul, FPU_MUL) 530 SSE_HELPER_S(div, FPU_DIV) 531 SSE_HELPER_S(min, FPU_MIN) 532 SSE_HELPER_S(max, FPU_MAX) 533 534 void glue(helper_sqrtps, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) 535 { 536 int i; 537 for (i = 0; i < 2 << SHIFT; i++) { 538 d->ZMM_S(i) = float32_sqrt(s->ZMM_S(i), &env->sse_status); 539 } 540 } 541 542 void glue(helper_sqrtpd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) 543 { 544 int i; 545 for (i = 0; i < 1 << SHIFT; i++) { 546 d->ZMM_D(i) = float64_sqrt(s->ZMM_D(i), &env->sse_status); 547 } 548 } 549 550 #if SHIFT == 1 551 void helper_sqrtss(CPUX86State *env, Reg *d, Reg *v, Reg *s) 552 { 553 int i; 554 d->ZMM_S(0) = float32_sqrt(s->ZMM_S(0), &env->sse_status); 555 for (i = 1; i < 2 << SHIFT; i++) { 556 d->ZMM_L(i) = v->ZMM_L(i); 557 } 558 } 559 560 void helper_sqrtsd(CPUX86State *env, Reg *d, Reg *v, Reg *s) 561 { 562 int i; 563 d->ZMM_D(0) = float64_sqrt(s->ZMM_D(0), &env->sse_status); 564 for (i = 1; i < 1 << SHIFT; i++) { 565 d->ZMM_Q(i) = v->ZMM_Q(i); 566 } 567 } 568 #endif 569 570 /* float to float conversions */ 571 void glue(helper_cvtps2pd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) 572 { 573 int i; 574 for (i = 1 << SHIFT; --i >= 0; ) { 575 d->ZMM_D(i) = float32_to_float64(s->ZMM_S(i), &env->sse_status); 576 } 577 } 578 579 void glue(helper_cvtpd2ps, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) 580 { 581 int i; 582 for (i = 0; i < 1 << SHIFT; i++) { 583 d->ZMM_S(i) = float64_to_float32(s->ZMM_D(i), &env->sse_status); 584 } 585 for (i >>= 1; i < 1 << SHIFT; i++) { 586 d->Q(i) = 0; 587 } 588 } 589 590 #if SHIFT >= 1 591 void glue(helper_cvtph2ps, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) 592 { 593 int i; 594 595 for (i = 2 << SHIFT; --i >= 0; ) { 596 d->ZMM_S(i) = float16_to_float32(s->ZMM_H(i), true, &env->sse_status); 597 } 598 } 599 600 void glue(helper_cvtps2ph, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, int mode) 601 { 602 int i; 603 FloatRoundMode prev_rounding_mode = env->sse_status.float_rounding_mode; 604 if (!(mode & (1 << 2))) { 605 set_x86_rounding_mode(mode & 3, &env->sse_status); 606 } 607 608 for (i = 0; i < 2 << SHIFT; i++) { 609 d->ZMM_H(i) = float32_to_float16(s->ZMM_S(i), true, &env->sse_status); 610 } 611 for (i >>= 2; i < 1 << SHIFT; i++) { 612 d->Q(i) = 0; 613 } 614 615 env->sse_status.float_rounding_mode = prev_rounding_mode; 616 } 617 #endif 618 619 #if SHIFT == 1 620 void helper_cvtss2sd(CPUX86State *env, Reg *d, Reg *v, Reg *s) 621 { 622 int i; 623 d->ZMM_D(0) = float32_to_float64(s->ZMM_S(0), &env->sse_status); 624 for (i = 1; i < 1 << SHIFT; i++) { 625 d->ZMM_Q(i) = v->ZMM_Q(i); 626 } 627 } 628 629 void helper_cvtsd2ss(CPUX86State *env, Reg *d, Reg *v, Reg *s) 630 { 631 int i; 632 d->ZMM_S(0) = float64_to_float32(s->ZMM_D(0), &env->sse_status); 633 for (i = 1; i < 2 << SHIFT; i++) { 634 d->ZMM_L(i) = v->ZMM_L(i); 635 } 636 } 637 #endif 638 639 /* integer to float */ 640 void glue(helper_cvtdq2ps, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) 641 { 642 int i; 643 for (i = 0; i < 2 << SHIFT; i++) { 644 d->ZMM_S(i) = int32_to_float32(s->ZMM_L(i), &env->sse_status); 645 } 646 } 647 648 void glue(helper_cvtdq2pd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) 649 { 650 int i; 651 for (i = 1 << SHIFT; --i >= 0; ) { 652 int32_t l = s->ZMM_L(i); 653 d->ZMM_D(i) = int32_to_float64(l, &env->sse_status); 654 } 655 } 656 657 #if SHIFT == 1 658 void helper_cvtpi2ps(CPUX86State *env, ZMMReg *d, MMXReg *s) 659 { 660 d->ZMM_S(0) = int32_to_float32(s->MMX_L(0), &env->sse_status); 661 d->ZMM_S(1) = int32_to_float32(s->MMX_L(1), &env->sse_status); 662 } 663 664 void helper_cvtpi2pd(CPUX86State *env, ZMMReg *d, MMXReg *s) 665 { 666 d->ZMM_D(0) = int32_to_float64(s->MMX_L(0), &env->sse_status); 667 d->ZMM_D(1) = int32_to_float64(s->MMX_L(1), &env->sse_status); 668 } 669 670 void helper_cvtsi2ss(CPUX86State *env, ZMMReg *d, uint32_t val) 671 { 672 d->ZMM_S(0) = int32_to_float32(val, &env->sse_status); 673 } 674 675 void helper_cvtsi2sd(CPUX86State *env, ZMMReg *d, uint32_t val) 676 { 677 d->ZMM_D(0) = int32_to_float64(val, &env->sse_status); 678 } 679 680 #ifdef TARGET_X86_64 681 void helper_cvtsq2ss(CPUX86State *env, ZMMReg *d, uint64_t val) 682 { 683 d->ZMM_S(0) = int64_to_float32(val, &env->sse_status); 684 } 685 686 void helper_cvtsq2sd(CPUX86State *env, ZMMReg *d, uint64_t val) 687 { 688 d->ZMM_D(0) = int64_to_float64(val, &env->sse_status); 689 } 690 #endif 691 692 #endif 693 694 /* float to integer */ 695 696 #if SHIFT == 1 697 /* 698 * x86 mandates that we return the indefinite integer value for the result 699 * of any float-to-integer conversion that raises the 'invalid' exception. 700 * Wrap the softfloat functions to get this behaviour. 701 */ 702 #define WRAP_FLOATCONV(RETTYPE, FN, FLOATTYPE, INDEFVALUE) \ 703 static inline RETTYPE x86_##FN(FLOATTYPE a, float_status *s) \ 704 { \ 705 int oldflags, newflags; \ 706 RETTYPE r; \ 707 \ 708 oldflags = get_float_exception_flags(s); \ 709 set_float_exception_flags(0, s); \ 710 r = FN(a, s); \ 711 newflags = get_float_exception_flags(s); \ 712 if (newflags & float_flag_invalid) { \ 713 r = INDEFVALUE; \ 714 } \ 715 set_float_exception_flags(newflags | oldflags, s); \ 716 return r; \ 717 } 718 719 WRAP_FLOATCONV(int32_t, float32_to_int32, float32, INT32_MIN) 720 WRAP_FLOATCONV(int32_t, float32_to_int32_round_to_zero, float32, INT32_MIN) 721 WRAP_FLOATCONV(int32_t, float64_to_int32, float64, INT32_MIN) 722 WRAP_FLOATCONV(int32_t, float64_to_int32_round_to_zero, float64, INT32_MIN) 723 WRAP_FLOATCONV(int64_t, float32_to_int64, float32, INT64_MIN) 724 WRAP_FLOATCONV(int64_t, float32_to_int64_round_to_zero, float32, INT64_MIN) 725 WRAP_FLOATCONV(int64_t, float64_to_int64, float64, INT64_MIN) 726 WRAP_FLOATCONV(int64_t, float64_to_int64_round_to_zero, float64, INT64_MIN) 727 #endif 728 729 void glue(helper_cvtps2dq, SUFFIX)(CPUX86State *env, ZMMReg *d, ZMMReg *s) 730 { 731 int i; 732 for (i = 0; i < 2 << SHIFT; i++) { 733 d->ZMM_L(i) = x86_float32_to_int32(s->ZMM_S(i), &env->sse_status); 734 } 735 } 736 737 void glue(helper_cvtpd2dq, SUFFIX)(CPUX86State *env, ZMMReg *d, ZMMReg *s) 738 { 739 int i; 740 for (i = 0; i < 1 << SHIFT; i++) { 741 d->ZMM_L(i) = x86_float64_to_int32(s->ZMM_D(i), &env->sse_status); 742 } 743 for (i >>= 1; i < 1 << SHIFT; i++) { 744 d->Q(i) = 0; 745 } 746 } 747 748 #if SHIFT == 1 749 void helper_cvtps2pi(CPUX86State *env, MMXReg *d, ZMMReg *s) 750 { 751 d->MMX_L(0) = x86_float32_to_int32(s->ZMM_S(0), &env->sse_status); 752 d->MMX_L(1) = x86_float32_to_int32(s->ZMM_S(1), &env->sse_status); 753 } 754 755 void helper_cvtpd2pi(CPUX86State *env, MMXReg *d, ZMMReg *s) 756 { 757 d->MMX_L(0) = x86_float64_to_int32(s->ZMM_D(0), &env->sse_status); 758 d->MMX_L(1) = x86_float64_to_int32(s->ZMM_D(1), &env->sse_status); 759 } 760 761 int32_t helper_cvtss2si(CPUX86State *env, ZMMReg *s) 762 { 763 return x86_float32_to_int32(s->ZMM_S(0), &env->sse_status); 764 } 765 766 int32_t helper_cvtsd2si(CPUX86State *env, ZMMReg *s) 767 { 768 return x86_float64_to_int32(s->ZMM_D(0), &env->sse_status); 769 } 770 771 #ifdef TARGET_X86_64 772 int64_t helper_cvtss2sq(CPUX86State *env, ZMMReg *s) 773 { 774 return x86_float32_to_int64(s->ZMM_S(0), &env->sse_status); 775 } 776 777 int64_t helper_cvtsd2sq(CPUX86State *env, ZMMReg *s) 778 { 779 return x86_float64_to_int64(s->ZMM_D(0), &env->sse_status); 780 } 781 #endif 782 #endif 783 784 /* float to integer truncated */ 785 void glue(helper_cvttps2dq, SUFFIX)(CPUX86State *env, ZMMReg *d, ZMMReg *s) 786 { 787 int i; 788 for (i = 0; i < 2 << SHIFT; i++) { 789 d->ZMM_L(i) = x86_float32_to_int32_round_to_zero(s->ZMM_S(i), 790 &env->sse_status); 791 } 792 } 793 794 void glue(helper_cvttpd2dq, SUFFIX)(CPUX86State *env, ZMMReg *d, ZMMReg *s) 795 { 796 int i; 797 for (i = 0; i < 1 << SHIFT; i++) { 798 d->ZMM_L(i) = x86_float64_to_int32_round_to_zero(s->ZMM_D(i), 799 &env->sse_status); 800 } 801 for (i >>= 1; i < 1 << SHIFT; i++) { 802 d->Q(i) = 0; 803 } 804 } 805 806 #if SHIFT == 1 807 void helper_cvttps2pi(CPUX86State *env, MMXReg *d, ZMMReg *s) 808 { 809 d->MMX_L(0) = x86_float32_to_int32_round_to_zero(s->ZMM_S(0), &env->sse_status); 810 d->MMX_L(1) = x86_float32_to_int32_round_to_zero(s->ZMM_S(1), &env->sse_status); 811 } 812 813 void helper_cvttpd2pi(CPUX86State *env, MMXReg *d, ZMMReg *s) 814 { 815 d->MMX_L(0) = x86_float64_to_int32_round_to_zero(s->ZMM_D(0), &env->sse_status); 816 d->MMX_L(1) = x86_float64_to_int32_round_to_zero(s->ZMM_D(1), &env->sse_status); 817 } 818 819 int32_t helper_cvttss2si(CPUX86State *env, ZMMReg *s) 820 { 821 return x86_float32_to_int32_round_to_zero(s->ZMM_S(0), &env->sse_status); 822 } 823 824 int32_t helper_cvttsd2si(CPUX86State *env, ZMMReg *s) 825 { 826 return x86_float64_to_int32_round_to_zero(s->ZMM_D(0), &env->sse_status); 827 } 828 829 #ifdef TARGET_X86_64 830 int64_t helper_cvttss2sq(CPUX86State *env, ZMMReg *s) 831 { 832 return x86_float32_to_int64_round_to_zero(s->ZMM_S(0), &env->sse_status); 833 } 834 835 int64_t helper_cvttsd2sq(CPUX86State *env, ZMMReg *s) 836 { 837 return x86_float64_to_int64_round_to_zero(s->ZMM_D(0), &env->sse_status); 838 } 839 #endif 840 #endif 841 842 void glue(helper_rsqrtps, SUFFIX)(CPUX86State *env, ZMMReg *d, ZMMReg *s) 843 { 844 uint8_t old_flags = get_float_exception_flags(&env->sse_status); 845 int i; 846 for (i = 0; i < 2 << SHIFT; i++) { 847 d->ZMM_S(i) = float32_div(float32_one, 848 float32_sqrt(s->ZMM_S(i), &env->sse_status), 849 &env->sse_status); 850 } 851 set_float_exception_flags(old_flags, &env->sse_status); 852 } 853 854 #if SHIFT == 1 855 void helper_rsqrtss(CPUX86State *env, ZMMReg *d, ZMMReg *v, ZMMReg *s) 856 { 857 uint8_t old_flags = get_float_exception_flags(&env->sse_status); 858 int i; 859 d->ZMM_S(0) = float32_div(float32_one, 860 float32_sqrt(s->ZMM_S(0), &env->sse_status), 861 &env->sse_status); 862 set_float_exception_flags(old_flags, &env->sse_status); 863 for (i = 1; i < 2 << SHIFT; i++) { 864 d->ZMM_L(i) = v->ZMM_L(i); 865 } 866 } 867 #endif 868 869 void glue(helper_rcpps, SUFFIX)(CPUX86State *env, ZMMReg *d, ZMMReg *s) 870 { 871 uint8_t old_flags = get_float_exception_flags(&env->sse_status); 872 int i; 873 for (i = 0; i < 2 << SHIFT; i++) { 874 d->ZMM_S(i) = float32_div(float32_one, s->ZMM_S(i), &env->sse_status); 875 } 876 set_float_exception_flags(old_flags, &env->sse_status); 877 } 878 879 #if SHIFT == 1 880 void helper_rcpss(CPUX86State *env, ZMMReg *d, ZMMReg *v, ZMMReg *s) 881 { 882 uint8_t old_flags = get_float_exception_flags(&env->sse_status); 883 int i; 884 d->ZMM_S(0) = float32_div(float32_one, s->ZMM_S(0), &env->sse_status); 885 for (i = 1; i < 2 << SHIFT; i++) { 886 d->ZMM_L(i) = v->ZMM_L(i); 887 } 888 set_float_exception_flags(old_flags, &env->sse_status); 889 } 890 #endif 891 892 #if SHIFT == 1 893 static inline uint64_t helper_extrq(uint64_t src, int shift, int len) 894 { 895 uint64_t mask; 896 897 if (len == 0) { 898 mask = ~0LL; 899 } else { 900 mask = (1ULL << len) - 1; 901 } 902 return (src >> shift) & mask; 903 } 904 905 void helper_extrq_r(CPUX86State *env, ZMMReg *d, ZMMReg *s) 906 { 907 d->ZMM_Q(0) = helper_extrq(d->ZMM_Q(0), s->ZMM_B(1) & 63, s->ZMM_B(0) & 63); 908 } 909 910 void helper_extrq_i(CPUX86State *env, ZMMReg *d, int index, int length) 911 { 912 d->ZMM_Q(0) = helper_extrq(d->ZMM_Q(0), index, length); 913 } 914 915 static inline uint64_t helper_insertq(uint64_t dest, uint64_t src, int shift, int len) 916 { 917 uint64_t mask; 918 919 if (len == 0) { 920 mask = ~0ULL; 921 } else { 922 mask = (1ULL << len) - 1; 923 } 924 return (dest & ~(mask << shift)) | ((src & mask) << shift); 925 } 926 927 void helper_insertq_r(CPUX86State *env, ZMMReg *d, ZMMReg *s) 928 { 929 d->ZMM_Q(0) = helper_insertq(d->ZMM_Q(0), s->ZMM_Q(0), s->ZMM_B(9) & 63, s->ZMM_B(8) & 63); 930 } 931 932 void helper_insertq_i(CPUX86State *env, ZMMReg *d, ZMMReg *s, int index, int length) 933 { 934 d->ZMM_Q(0) = helper_insertq(d->ZMM_Q(0), s->ZMM_Q(0), index, length); 935 } 936 #endif 937 938 #define SSE_HELPER_HPS(name, F) \ 939 void glue(helper_ ## name, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s) \ 940 { \ 941 float32 r[2 << SHIFT]; \ 942 int i, j, k; \ 943 for (k = 0; k < 2 << SHIFT; k += LANE_WIDTH / 4) { \ 944 for (i = j = 0; j < 4; i++, j += 2) { \ 945 r[i + k] = F(v->ZMM_S(j + k), v->ZMM_S(j + k + 1), &env->sse_status); \ 946 } \ 947 for (j = 0; j < 4; i++, j += 2) { \ 948 r[i + k] = F(s->ZMM_S(j + k), s->ZMM_S(j + k + 1), &env->sse_status); \ 949 } \ 950 } \ 951 for (i = 0; i < 2 << SHIFT; i++) { \ 952 d->ZMM_S(i) = r[i]; \ 953 } \ 954 } 955 956 SSE_HELPER_HPS(haddps, float32_add) 957 SSE_HELPER_HPS(hsubps, float32_sub) 958 959 #define SSE_HELPER_HPD(name, F) \ 960 void glue(helper_ ## name, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s) \ 961 { \ 962 float64 r[1 << SHIFT]; \ 963 int i, j, k; \ 964 for (k = 0; k < 1 << SHIFT; k += LANE_WIDTH / 8) { \ 965 for (i = j = 0; j < 2; i++, j += 2) { \ 966 r[i + k] = F(v->ZMM_D(j + k), v->ZMM_D(j + k + 1), &env->sse_status); \ 967 } \ 968 for (j = 0; j < 2; i++, j += 2) { \ 969 r[i + k] = F(s->ZMM_D(j + k), s->ZMM_D(j + k + 1), &env->sse_status); \ 970 } \ 971 } \ 972 for (i = 0; i < 1 << SHIFT; i++) { \ 973 d->ZMM_D(i) = r[i]; \ 974 } \ 975 } 976 977 SSE_HELPER_HPD(haddpd, float64_add) 978 SSE_HELPER_HPD(hsubpd, float64_sub) 979 980 void glue(helper_addsubps, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s) 981 { 982 int i; 983 for (i = 0; i < 2 << SHIFT; i += 2) { 984 d->ZMM_S(i) = float32_sub(v->ZMM_S(i), s->ZMM_S(i), &env->sse_status); 985 d->ZMM_S(i+1) = float32_add(v->ZMM_S(i+1), s->ZMM_S(i+1), &env->sse_status); 986 } 987 } 988 989 void glue(helper_addsubpd, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s) 990 { 991 int i; 992 for (i = 0; i < 1 << SHIFT; i += 2) { 993 d->ZMM_D(i) = float64_sub(v->ZMM_D(i), s->ZMM_D(i), &env->sse_status); 994 d->ZMM_D(i+1) = float64_add(v->ZMM_D(i+1), s->ZMM_D(i+1), &env->sse_status); 995 } 996 } 997 998 #define SSE_HELPER_CMP_P(name, F, C) \ 999 void glue(helper_ ## name ## ps, SUFFIX)(CPUX86State *env, \ 1000 Reg *d, Reg *v, Reg *s) \ 1001 { \ 1002 int i; \ 1003 for (i = 0; i < 2 << SHIFT; i++) { \ 1004 d->ZMM_L(i) = C(F(32, v->ZMM_S(i), s->ZMM_S(i))) ? -1 : 0; \ 1005 } \ 1006 } \ 1007 \ 1008 void glue(helper_ ## name ## pd, SUFFIX)(CPUX86State *env, \ 1009 Reg *d, Reg *v, Reg *s) \ 1010 { \ 1011 int i; \ 1012 for (i = 0; i < 1 << SHIFT; i++) { \ 1013 d->ZMM_Q(i) = C(F(64, v->ZMM_D(i), s->ZMM_D(i))) ? -1 : 0; \ 1014 } \ 1015 } 1016 1017 #if SHIFT == 1 1018 #define SSE_HELPER_CMP(name, F, C) \ 1019 SSE_HELPER_CMP_P(name, F, C) \ 1020 void helper_ ## name ## ss(CPUX86State *env, Reg *d, Reg *v, Reg *s) \ 1021 { \ 1022 int i; \ 1023 d->ZMM_L(0) = C(F(32, v->ZMM_S(0), s->ZMM_S(0))) ? -1 : 0; \ 1024 for (i = 1; i < 2 << SHIFT; i++) { \ 1025 d->ZMM_L(i) = v->ZMM_L(i); \ 1026 } \ 1027 } \ 1028 \ 1029 void helper_ ## name ## sd(CPUX86State *env, Reg *d, Reg *v, Reg *s) \ 1030 { \ 1031 int i; \ 1032 d->ZMM_Q(0) = C(F(64, v->ZMM_D(0), s->ZMM_D(0))) ? -1 : 0; \ 1033 for (i = 1; i < 1 << SHIFT; i++) { \ 1034 d->ZMM_Q(i) = v->ZMM_Q(i); \ 1035 } \ 1036 } 1037 1038 static inline bool FPU_EQU(FloatRelation x) 1039 { 1040 return (x == float_relation_equal || x == float_relation_unordered); 1041 } 1042 static inline bool FPU_GE(FloatRelation x) 1043 { 1044 return (x == float_relation_equal || x == float_relation_greater); 1045 } 1046 #define FPU_EQ(x) (x == float_relation_equal) 1047 #define FPU_LT(x) (x == float_relation_less) 1048 #define FPU_LE(x) (x <= float_relation_equal) 1049 #define FPU_GT(x) (x == float_relation_greater) 1050 #define FPU_UNORD(x) (x == float_relation_unordered) 1051 /* We must make sure we evaluate the argument in case it is a signalling NAN */ 1052 #define FPU_FALSE(x) (x == float_relation_equal && 0) 1053 1054 #define FPU_CMPQ(size, a, b) \ 1055 float ## size ## _compare_quiet(a, b, &env->sse_status) 1056 #define FPU_CMPS(size, a, b) \ 1057 float ## size ## _compare(a, b, &env->sse_status) 1058 1059 #else 1060 #define SSE_HELPER_CMP(name, F, C) SSE_HELPER_CMP_P(name, F, C) 1061 #endif 1062 1063 SSE_HELPER_CMP(cmpeq, FPU_CMPQ, FPU_EQ) 1064 SSE_HELPER_CMP(cmplt, FPU_CMPS, FPU_LT) 1065 SSE_HELPER_CMP(cmple, FPU_CMPS, FPU_LE) 1066 SSE_HELPER_CMP(cmpunord, FPU_CMPQ, FPU_UNORD) 1067 SSE_HELPER_CMP(cmpneq, FPU_CMPQ, !FPU_EQ) 1068 SSE_HELPER_CMP(cmpnlt, FPU_CMPS, !FPU_LT) 1069 SSE_HELPER_CMP(cmpnle, FPU_CMPS, !FPU_LE) 1070 SSE_HELPER_CMP(cmpord, FPU_CMPQ, !FPU_UNORD) 1071 1072 SSE_HELPER_CMP(cmpequ, FPU_CMPQ, FPU_EQU) 1073 SSE_HELPER_CMP(cmpnge, FPU_CMPS, !FPU_GE) 1074 SSE_HELPER_CMP(cmpngt, FPU_CMPS, !FPU_GT) 1075 SSE_HELPER_CMP(cmpfalse, FPU_CMPQ, FPU_FALSE) 1076 SSE_HELPER_CMP(cmpnequ, FPU_CMPQ, !FPU_EQU) 1077 SSE_HELPER_CMP(cmpge, FPU_CMPS, FPU_GE) 1078 SSE_HELPER_CMP(cmpgt, FPU_CMPS, FPU_GT) 1079 SSE_HELPER_CMP(cmptrue, FPU_CMPQ, !FPU_FALSE) 1080 1081 SSE_HELPER_CMP(cmpeqs, FPU_CMPS, FPU_EQ) 1082 SSE_HELPER_CMP(cmpltq, FPU_CMPQ, FPU_LT) 1083 SSE_HELPER_CMP(cmpleq, FPU_CMPQ, FPU_LE) 1084 SSE_HELPER_CMP(cmpunords, FPU_CMPS, FPU_UNORD) 1085 SSE_HELPER_CMP(cmpneqq, FPU_CMPS, !FPU_EQ) 1086 SSE_HELPER_CMP(cmpnltq, FPU_CMPQ, !FPU_LT) 1087 SSE_HELPER_CMP(cmpnleq, FPU_CMPQ, !FPU_LE) 1088 SSE_HELPER_CMP(cmpords, FPU_CMPS, !FPU_UNORD) 1089 1090 SSE_HELPER_CMP(cmpequs, FPU_CMPS, FPU_EQU) 1091 SSE_HELPER_CMP(cmpngeq, FPU_CMPQ, !FPU_GE) 1092 SSE_HELPER_CMP(cmpngtq, FPU_CMPQ, !FPU_GT) 1093 SSE_HELPER_CMP(cmpfalses, FPU_CMPS, FPU_FALSE) 1094 SSE_HELPER_CMP(cmpnequs, FPU_CMPS, !FPU_EQU) 1095 SSE_HELPER_CMP(cmpgeq, FPU_CMPQ, FPU_GE) 1096 SSE_HELPER_CMP(cmpgtq, FPU_CMPQ, FPU_GT) 1097 SSE_HELPER_CMP(cmptrues, FPU_CMPS, !FPU_FALSE) 1098 1099 #undef SSE_HELPER_CMP 1100 1101 #if SHIFT == 1 1102 static const int comis_eflags[4] = {CC_C, CC_Z, 0, CC_Z | CC_P | CC_C}; 1103 1104 void helper_ucomiss(CPUX86State *env, Reg *d, Reg *s) 1105 { 1106 FloatRelation ret; 1107 float32 s0, s1; 1108 1109 s0 = d->ZMM_S(0); 1110 s1 = s->ZMM_S(0); 1111 ret = float32_compare_quiet(s0, s1, &env->sse_status); 1112 CC_SRC = comis_eflags[ret + 1]; 1113 } 1114 1115 void helper_comiss(CPUX86State *env, Reg *d, Reg *s) 1116 { 1117 FloatRelation ret; 1118 float32 s0, s1; 1119 1120 s0 = d->ZMM_S(0); 1121 s1 = s->ZMM_S(0); 1122 ret = float32_compare(s0, s1, &env->sse_status); 1123 CC_SRC = comis_eflags[ret + 1]; 1124 } 1125 1126 void helper_ucomisd(CPUX86State *env, Reg *d, Reg *s) 1127 { 1128 FloatRelation ret; 1129 float64 d0, d1; 1130 1131 d0 = d->ZMM_D(0); 1132 d1 = s->ZMM_D(0); 1133 ret = float64_compare_quiet(d0, d1, &env->sse_status); 1134 CC_SRC = comis_eflags[ret + 1]; 1135 } 1136 1137 void helper_comisd(CPUX86State *env, Reg *d, Reg *s) 1138 { 1139 FloatRelation ret; 1140 float64 d0, d1; 1141 1142 d0 = d->ZMM_D(0); 1143 d1 = s->ZMM_D(0); 1144 ret = float64_compare(d0, d1, &env->sse_status); 1145 CC_SRC = comis_eflags[ret + 1]; 1146 } 1147 #endif 1148 1149 uint32_t glue(helper_movmskps, SUFFIX)(CPUX86State *env, Reg *s) 1150 { 1151 uint32_t mask; 1152 int i; 1153 1154 mask = 0; 1155 for (i = 0; i < 2 << SHIFT; i++) { 1156 mask |= (s->ZMM_L(i) >> (31 - i)) & (1 << i); 1157 } 1158 return mask; 1159 } 1160 1161 uint32_t glue(helper_movmskpd, SUFFIX)(CPUX86State *env, Reg *s) 1162 { 1163 uint32_t mask; 1164 int i; 1165 1166 mask = 0; 1167 for (i = 0; i < 1 << SHIFT; i++) { 1168 mask |= (s->ZMM_Q(i) >> (63 - i)) & (1 << i); 1169 } 1170 return mask; 1171 } 1172 1173 #endif 1174 1175 #define PACK_HELPER_B(name, F) \ 1176 void glue(helper_pack ## name, SUFFIX)(CPUX86State *env, \ 1177 Reg *d, Reg *v, Reg *s) \ 1178 { \ 1179 uint8_t r[PACK_WIDTH * 2]; \ 1180 int j, k; \ 1181 for (j = 0; j < 4 << SHIFT; j += PACK_WIDTH) { \ 1182 for (k = 0; k < PACK_WIDTH; k++) { \ 1183 r[k] = F((int16_t)v->W(j + k)); \ 1184 } \ 1185 for (k = 0; k < PACK_WIDTH; k++) { \ 1186 r[PACK_WIDTH + k] = F((int16_t)s->W(j + k)); \ 1187 } \ 1188 for (k = 0; k < PACK_WIDTH * 2; k++) { \ 1189 d->B(2 * j + k) = r[k]; \ 1190 } \ 1191 } \ 1192 } 1193 1194 PACK_HELPER_B(sswb, satsb) 1195 PACK_HELPER_B(uswb, satub) 1196 1197 void glue(helper_packssdw, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s) 1198 { 1199 uint16_t r[PACK_WIDTH]; 1200 int j, k; 1201 1202 for (j = 0; j < 2 << SHIFT; j += PACK_WIDTH / 2) { 1203 for (k = 0; k < PACK_WIDTH / 2; k++) { 1204 r[k] = satsw(v->L(j + k)); 1205 } 1206 for (k = 0; k < PACK_WIDTH / 2; k++) { 1207 r[PACK_WIDTH / 2 + k] = satsw(s->L(j + k)); 1208 } 1209 for (k = 0; k < PACK_WIDTH; k++) { 1210 d->W(2 * j + k) = r[k]; 1211 } 1212 } 1213 } 1214 1215 #define UNPCK_OP(base_name, base) \ 1216 \ 1217 void glue(helper_punpck ## base_name ## bw, SUFFIX)(CPUX86State *env,\ 1218 Reg *d, Reg *v, Reg *s) \ 1219 { \ 1220 uint8_t r[PACK_WIDTH * 2]; \ 1221 int j, i; \ 1222 \ 1223 for (j = 0; j < 8 << SHIFT; ) { \ 1224 int k = j + base * PACK_WIDTH; \ 1225 for (i = 0; i < PACK_WIDTH; i++) { \ 1226 r[2 * i] = v->B(k + i); \ 1227 r[2 * i + 1] = s->B(k + i); \ 1228 } \ 1229 for (i = 0; i < PACK_WIDTH * 2; i++, j++) { \ 1230 d->B(j) = r[i]; \ 1231 } \ 1232 } \ 1233 } \ 1234 \ 1235 void glue(helper_punpck ## base_name ## wd, SUFFIX)(CPUX86State *env,\ 1236 Reg *d, Reg *v, Reg *s) \ 1237 { \ 1238 uint16_t r[PACK_WIDTH]; \ 1239 int j, i; \ 1240 \ 1241 for (j = 0; j < 4 << SHIFT; ) { \ 1242 int k = j + base * PACK_WIDTH / 2; \ 1243 for (i = 0; i < PACK_WIDTH / 2; i++) { \ 1244 r[2 * i] = v->W(k + i); \ 1245 r[2 * i + 1] = s->W(k + i); \ 1246 } \ 1247 for (i = 0; i < PACK_WIDTH; i++, j++) { \ 1248 d->W(j) = r[i]; \ 1249 } \ 1250 } \ 1251 } \ 1252 \ 1253 void glue(helper_punpck ## base_name ## dq, SUFFIX)(CPUX86State *env,\ 1254 Reg *d, Reg *v, Reg *s) \ 1255 { \ 1256 uint32_t r[PACK_WIDTH / 2]; \ 1257 int j, i; \ 1258 \ 1259 for (j = 0; j < 2 << SHIFT; ) { \ 1260 int k = j + base * PACK_WIDTH / 4; \ 1261 for (i = 0; i < PACK_WIDTH / 4; i++) { \ 1262 r[2 * i] = v->L(k + i); \ 1263 r[2 * i + 1] = s->L(k + i); \ 1264 } \ 1265 for (i = 0; i < PACK_WIDTH / 2; i++, j++) { \ 1266 d->L(j) = r[i]; \ 1267 } \ 1268 } \ 1269 } \ 1270 \ 1271 XMM_ONLY( \ 1272 void glue(helper_punpck ## base_name ## qdq, SUFFIX)( \ 1273 CPUX86State *env, Reg *d, Reg *v, Reg *s) \ 1274 { \ 1275 uint64_t r[2]; \ 1276 int i; \ 1277 \ 1278 for (i = 0; i < 1 << SHIFT; i += 2) { \ 1279 r[0] = v->Q(base + i); \ 1280 r[1] = s->Q(base + i); \ 1281 d->Q(i) = r[0]; \ 1282 d->Q(i + 1) = r[1]; \ 1283 } \ 1284 } \ 1285 ) 1286 1287 UNPCK_OP(l, 0) 1288 UNPCK_OP(h, 1) 1289 1290 #undef PACK_WIDTH 1291 #undef PACK_HELPER_B 1292 #undef UNPCK_OP 1293 1294 1295 /* 3DNow! float ops */ 1296 #if SHIFT == 0 1297 void helper_pi2fd(CPUX86State *env, MMXReg *d, MMXReg *s) 1298 { 1299 d->MMX_S(0) = int32_to_float32(s->MMX_L(0), &env->mmx_status); 1300 d->MMX_S(1) = int32_to_float32(s->MMX_L(1), &env->mmx_status); 1301 } 1302 1303 void helper_pi2fw(CPUX86State *env, MMXReg *d, MMXReg *s) 1304 { 1305 d->MMX_S(0) = int32_to_float32((int16_t)s->MMX_W(0), &env->mmx_status); 1306 d->MMX_S(1) = int32_to_float32((int16_t)s->MMX_W(2), &env->mmx_status); 1307 } 1308 1309 void helper_pf2id(CPUX86State *env, MMXReg *d, MMXReg *s) 1310 { 1311 d->MMX_L(0) = float32_to_int32_round_to_zero(s->MMX_S(0), &env->mmx_status); 1312 d->MMX_L(1) = float32_to_int32_round_to_zero(s->MMX_S(1), &env->mmx_status); 1313 } 1314 1315 void helper_pf2iw(CPUX86State *env, MMXReg *d, MMXReg *s) 1316 { 1317 d->MMX_L(0) = satsw(float32_to_int32_round_to_zero(s->MMX_S(0), 1318 &env->mmx_status)); 1319 d->MMX_L(1) = satsw(float32_to_int32_round_to_zero(s->MMX_S(1), 1320 &env->mmx_status)); 1321 } 1322 1323 void helper_pfacc(CPUX86State *env, MMXReg *d, MMXReg *s) 1324 { 1325 float32 r; 1326 1327 r = float32_add(d->MMX_S(0), d->MMX_S(1), &env->mmx_status); 1328 d->MMX_S(1) = float32_add(s->MMX_S(0), s->MMX_S(1), &env->mmx_status); 1329 d->MMX_S(0) = r; 1330 } 1331 1332 void helper_pfadd(CPUX86State *env, MMXReg *d, MMXReg *s) 1333 { 1334 d->MMX_S(0) = float32_add(d->MMX_S(0), s->MMX_S(0), &env->mmx_status); 1335 d->MMX_S(1) = float32_add(d->MMX_S(1), s->MMX_S(1), &env->mmx_status); 1336 } 1337 1338 void helper_pfcmpeq(CPUX86State *env, MMXReg *d, MMXReg *s) 1339 { 1340 d->MMX_L(0) = float32_eq_quiet(d->MMX_S(0), s->MMX_S(0), 1341 &env->mmx_status) ? -1 : 0; 1342 d->MMX_L(1) = float32_eq_quiet(d->MMX_S(1), s->MMX_S(1), 1343 &env->mmx_status) ? -1 : 0; 1344 } 1345 1346 void helper_pfcmpge(CPUX86State *env, MMXReg *d, MMXReg *s) 1347 { 1348 d->MMX_L(0) = float32_le(s->MMX_S(0), d->MMX_S(0), 1349 &env->mmx_status) ? -1 : 0; 1350 d->MMX_L(1) = float32_le(s->MMX_S(1), d->MMX_S(1), 1351 &env->mmx_status) ? -1 : 0; 1352 } 1353 1354 void helper_pfcmpgt(CPUX86State *env, MMXReg *d, MMXReg *s) 1355 { 1356 d->MMX_L(0) = float32_lt(s->MMX_S(0), d->MMX_S(0), 1357 &env->mmx_status) ? -1 : 0; 1358 d->MMX_L(1) = float32_lt(s->MMX_S(1), d->MMX_S(1), 1359 &env->mmx_status) ? -1 : 0; 1360 } 1361 1362 void helper_pfmax(CPUX86State *env, MMXReg *d, MMXReg *s) 1363 { 1364 if (float32_lt(d->MMX_S(0), s->MMX_S(0), &env->mmx_status)) { 1365 d->MMX_S(0) = s->MMX_S(0); 1366 } 1367 if (float32_lt(d->MMX_S(1), s->MMX_S(1), &env->mmx_status)) { 1368 d->MMX_S(1) = s->MMX_S(1); 1369 } 1370 } 1371 1372 void helper_pfmin(CPUX86State *env, MMXReg *d, MMXReg *s) 1373 { 1374 if (float32_lt(s->MMX_S(0), d->MMX_S(0), &env->mmx_status)) { 1375 d->MMX_S(0) = s->MMX_S(0); 1376 } 1377 if (float32_lt(s->MMX_S(1), d->MMX_S(1), &env->mmx_status)) { 1378 d->MMX_S(1) = s->MMX_S(1); 1379 } 1380 } 1381 1382 void helper_pfmul(CPUX86State *env, MMXReg *d, MMXReg *s) 1383 { 1384 d->MMX_S(0) = float32_mul(d->MMX_S(0), s->MMX_S(0), &env->mmx_status); 1385 d->MMX_S(1) = float32_mul(d->MMX_S(1), s->MMX_S(1), &env->mmx_status); 1386 } 1387 1388 void helper_pfnacc(CPUX86State *env, MMXReg *d, MMXReg *s) 1389 { 1390 float32 r; 1391 1392 r = float32_sub(d->MMX_S(0), d->MMX_S(1), &env->mmx_status); 1393 d->MMX_S(1) = float32_sub(s->MMX_S(0), s->MMX_S(1), &env->mmx_status); 1394 d->MMX_S(0) = r; 1395 } 1396 1397 void helper_pfpnacc(CPUX86State *env, MMXReg *d, MMXReg *s) 1398 { 1399 float32 r; 1400 1401 r = float32_sub(d->MMX_S(0), d->MMX_S(1), &env->mmx_status); 1402 d->MMX_S(1) = float32_add(s->MMX_S(0), s->MMX_S(1), &env->mmx_status); 1403 d->MMX_S(0) = r; 1404 } 1405 1406 void helper_pfrcp(CPUX86State *env, MMXReg *d, MMXReg *s) 1407 { 1408 d->MMX_S(0) = float32_div(float32_one, s->MMX_S(0), &env->mmx_status); 1409 d->MMX_S(1) = d->MMX_S(0); 1410 } 1411 1412 void helper_pfrsqrt(CPUX86State *env, MMXReg *d, MMXReg *s) 1413 { 1414 d->MMX_L(1) = s->MMX_L(0) & 0x7fffffff; 1415 d->MMX_S(1) = float32_div(float32_one, 1416 float32_sqrt(d->MMX_S(1), &env->mmx_status), 1417 &env->mmx_status); 1418 d->MMX_L(1) |= s->MMX_L(0) & 0x80000000; 1419 d->MMX_L(0) = d->MMX_L(1); 1420 } 1421 1422 void helper_pfsub(CPUX86State *env, MMXReg *d, MMXReg *s) 1423 { 1424 d->MMX_S(0) = float32_sub(d->MMX_S(0), s->MMX_S(0), &env->mmx_status); 1425 d->MMX_S(1) = float32_sub(d->MMX_S(1), s->MMX_S(1), &env->mmx_status); 1426 } 1427 1428 void helper_pfsubr(CPUX86State *env, MMXReg *d, MMXReg *s) 1429 { 1430 d->MMX_S(0) = float32_sub(s->MMX_S(0), d->MMX_S(0), &env->mmx_status); 1431 d->MMX_S(1) = float32_sub(s->MMX_S(1), d->MMX_S(1), &env->mmx_status); 1432 } 1433 1434 void helper_pswapd(CPUX86State *env, MMXReg *d, MMXReg *s) 1435 { 1436 uint32_t r; 1437 1438 r = s->MMX_L(0); 1439 d->MMX_L(0) = s->MMX_L(1); 1440 d->MMX_L(1) = r; 1441 } 1442 #endif 1443 1444 /* SSSE3 op helpers */ 1445 void glue(helper_pshufb, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s) 1446 { 1447 int i; 1448 #if SHIFT == 0 1449 uint8_t r[8]; 1450 1451 for (i = 0; i < 8; i++) { 1452 r[i] = (s->B(i) & 0x80) ? 0 : (v->B(s->B(i) & 7)); 1453 } 1454 for (i = 0; i < 8; i++) { 1455 d->B(i) = r[i]; 1456 } 1457 #else 1458 uint8_t r[8 << SHIFT]; 1459 1460 for (i = 0; i < 8 << SHIFT; i++) { 1461 int j = i & ~0xf; 1462 r[i] = (s->B(i) & 0x80) ? 0 : v->B(j | (s->B(i) & 0xf)); 1463 } 1464 for (i = 0; i < 8 << SHIFT; i++) { 1465 d->B(i) = r[i]; 1466 } 1467 #endif 1468 } 1469 1470 #define SSE_HELPER_HW(name, F) \ 1471 void glue(helper_ ## name, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s) \ 1472 { \ 1473 uint16_t r[4 << SHIFT]; \ 1474 int i, j, k; \ 1475 for (k = 0; k < 4 << SHIFT; k += LANE_WIDTH / 2) { \ 1476 for (i = j = 0; j < LANE_WIDTH / 2; i++, j += 2) { \ 1477 r[i + k] = F(v->W(j + k), v->W(j + k + 1)); \ 1478 } \ 1479 for (j = 0; j < LANE_WIDTH / 2; i++, j += 2) { \ 1480 r[i + k] = F(s->W(j + k), s->W(j + k + 1)); \ 1481 } \ 1482 } \ 1483 for (i = 0; i < 4 << SHIFT; i++) { \ 1484 d->W(i) = r[i]; \ 1485 } \ 1486 } 1487 1488 #define SSE_HELPER_HL(name, F) \ 1489 void glue(helper_ ## name, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s) \ 1490 { \ 1491 uint32_t r[2 << SHIFT]; \ 1492 int i, j, k; \ 1493 for (k = 0; k < 2 << SHIFT; k += LANE_WIDTH / 4) { \ 1494 for (i = j = 0; j < LANE_WIDTH / 4; i++, j += 2) { \ 1495 r[i + k] = F(v->L(j + k), v->L(j + k + 1)); \ 1496 } \ 1497 for (j = 0; j < LANE_WIDTH / 4; i++, j += 2) { \ 1498 r[i + k] = F(s->L(j + k), s->L(j + k + 1)); \ 1499 } \ 1500 } \ 1501 for (i = 0; i < 2 << SHIFT; i++) { \ 1502 d->L(i) = r[i]; \ 1503 } \ 1504 } 1505 1506 SSE_HELPER_HW(phaddw, FADD) 1507 SSE_HELPER_HW(phsubw, FSUB) 1508 SSE_HELPER_HW(phaddsw, FADDSW) 1509 SSE_HELPER_HW(phsubsw, FSUBSW) 1510 SSE_HELPER_HL(phaddd, FADD) 1511 SSE_HELPER_HL(phsubd, FSUB) 1512 1513 #undef SSE_HELPER_HW 1514 #undef SSE_HELPER_HL 1515 1516 void glue(helper_pmaddubsw, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s) 1517 { 1518 int i; 1519 for (i = 0; i < 4 << SHIFT; i++) { 1520 d->W(i) = satsw((int8_t)s->B(i * 2) * (uint8_t)v->B(i * 2) + 1521 (int8_t)s->B(i * 2 + 1) * (uint8_t)v->B(i * 2 + 1)); 1522 } 1523 } 1524 1525 #define FMULHRSW(d, s) (((int16_t) d * (int16_t)s + 0x4000) >> 15) 1526 SSE_HELPER_W(helper_pmulhrsw, FMULHRSW) 1527 1528 #define FSIGNB(d, s) (s <= INT8_MAX ? s ? d : 0 : -(int8_t)d) 1529 #define FSIGNW(d, s) (s <= INT16_MAX ? s ? d : 0 : -(int16_t)d) 1530 #define FSIGNL(d, s) (s <= INT32_MAX ? s ? d : 0 : -(int32_t)d) 1531 SSE_HELPER_B(helper_psignb, FSIGNB) 1532 SSE_HELPER_W(helper_psignw, FSIGNW) 1533 SSE_HELPER_L(helper_psignd, FSIGNL) 1534 1535 void glue(helper_palignr, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s, 1536 uint32_t imm) 1537 { 1538 int i; 1539 1540 /* XXX could be checked during translation */ 1541 if (imm >= (SHIFT ? 32 : 16)) { 1542 for (i = 0; i < (1 << SHIFT); i++) { 1543 d->Q(i) = 0; 1544 } 1545 } else { 1546 int shift = imm * 8; 1547 #define SHR(v, i) (i < 64 && i > -64 ? i > 0 ? v >> (i) : (v << -(i)) : 0) 1548 #if SHIFT == 0 1549 d->Q(0) = SHR(s->Q(0), shift - 0) | 1550 SHR(v->Q(0), shift - 64); 1551 #else 1552 for (i = 0; i < (1 << SHIFT); i += 2) { 1553 uint64_t r0, r1; 1554 1555 r0 = SHR(s->Q(i), shift - 0) | 1556 SHR(s->Q(i + 1), shift - 64) | 1557 SHR(v->Q(i), shift - 128) | 1558 SHR(v->Q(i + 1), shift - 192); 1559 r1 = SHR(s->Q(i), shift + 64) | 1560 SHR(s->Q(i + 1), shift - 0) | 1561 SHR(v->Q(i), shift - 64) | 1562 SHR(v->Q(i + 1), shift - 128); 1563 d->Q(i) = r0; 1564 d->Q(i + 1) = r1; 1565 } 1566 #endif 1567 #undef SHR 1568 } 1569 } 1570 1571 #if SHIFT >= 1 1572 1573 #define SSE_HELPER_V(name, elem, num, F) \ 1574 void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s, \ 1575 Reg *m) \ 1576 { \ 1577 int i; \ 1578 for (i = 0; i < num; i++) { \ 1579 d->elem(i) = F(v->elem(i), s->elem(i), m->elem(i)); \ 1580 } \ 1581 } 1582 1583 #define SSE_HELPER_I(name, elem, num, F) \ 1584 void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s, \ 1585 uint32_t imm) \ 1586 { \ 1587 int i; \ 1588 for (i = 0; i < num; i++) { \ 1589 int j = i & 7; \ 1590 d->elem(i) = F(v->elem(i), s->elem(i), (imm >> j) & 1); \ 1591 } \ 1592 } 1593 1594 /* SSE4.1 op helpers */ 1595 #define FBLENDVB(v, s, m) ((m & 0x80) ? s : v) 1596 #define FBLENDVPS(v, s, m) ((m & 0x80000000) ? s : v) 1597 #define FBLENDVPD(v, s, m) ((m & 0x8000000000000000LL) ? s : v) 1598 SSE_HELPER_V(helper_pblendvb, B, 8 << SHIFT, FBLENDVB) 1599 SSE_HELPER_V(helper_blendvps, L, 2 << SHIFT, FBLENDVPS) 1600 SSE_HELPER_V(helper_blendvpd, Q, 1 << SHIFT, FBLENDVPD) 1601 1602 void glue(helper_ptest, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) 1603 { 1604 uint64_t zf = 0, cf = 0; 1605 int i; 1606 1607 for (i = 0; i < 1 << SHIFT; i++) { 1608 zf |= (s->Q(i) & d->Q(i)); 1609 cf |= (s->Q(i) & ~d->Q(i)); 1610 } 1611 CC_SRC = (zf ? 0 : CC_Z) | (cf ? 0 : CC_C); 1612 } 1613 1614 #define FMOVSLDUP(i) s->L((i) & ~1) 1615 #define FMOVSHDUP(i) s->L((i) | 1) 1616 #define FMOVDLDUP(i) s->Q((i) & ~1) 1617 1618 #define SSE_HELPER_F(name, elem, num, F) \ 1619 void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) \ 1620 { \ 1621 int n = num; \ 1622 for (int i = n; --i >= 0; ) { \ 1623 d->elem(i) = F(i); \ 1624 } \ 1625 } 1626 1627 #if SHIFT > 0 1628 SSE_HELPER_F(helper_pmovsxbw, W, 4 << SHIFT, (int8_t) s->B) 1629 SSE_HELPER_F(helper_pmovsxbd, L, 2 << SHIFT, (int8_t) s->B) 1630 SSE_HELPER_F(helper_pmovsxbq, Q, 1 << SHIFT, (int8_t) s->B) 1631 SSE_HELPER_F(helper_pmovsxwd, L, 2 << SHIFT, (int16_t) s->W) 1632 SSE_HELPER_F(helper_pmovsxwq, Q, 1 << SHIFT, (int16_t) s->W) 1633 SSE_HELPER_F(helper_pmovsxdq, Q, 1 << SHIFT, (int32_t) s->L) 1634 SSE_HELPER_F(helper_pmovzxbw, W, 4 << SHIFT, s->B) 1635 SSE_HELPER_F(helper_pmovzxbd, L, 2 << SHIFT, s->B) 1636 SSE_HELPER_F(helper_pmovzxbq, Q, 1 << SHIFT, s->B) 1637 SSE_HELPER_F(helper_pmovzxwd, L, 2 << SHIFT, s->W) 1638 SSE_HELPER_F(helper_pmovzxwq, Q, 1 << SHIFT, s->W) 1639 SSE_HELPER_F(helper_pmovzxdq, Q, 1 << SHIFT, s->L) 1640 SSE_HELPER_F(helper_pmovsldup, L, 2 << SHIFT, FMOVSLDUP) 1641 SSE_HELPER_F(helper_pmovshdup, L, 2 << SHIFT, FMOVSHDUP) 1642 SSE_HELPER_F(helper_pmovdldup, Q, 1 << SHIFT, FMOVDLDUP) 1643 #endif 1644 1645 void glue(helper_pmuldq, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s) 1646 { 1647 int i; 1648 1649 for (i = 0; i < 1 << SHIFT; i++) { 1650 d->Q(i) = (int64_t)(int32_t) v->L(2 * i) * (int32_t) s->L(2 * i); 1651 } 1652 } 1653 1654 void glue(helper_packusdw, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s) 1655 { 1656 uint16_t r[8]; 1657 int i, j, k; 1658 1659 for (i = 0, j = 0; i <= 2 << SHIFT; i += 8, j += 4) { 1660 r[0] = satuw(v->L(j)); 1661 r[1] = satuw(v->L(j + 1)); 1662 r[2] = satuw(v->L(j + 2)); 1663 r[3] = satuw(v->L(j + 3)); 1664 r[4] = satuw(s->L(j)); 1665 r[5] = satuw(s->L(j + 1)); 1666 r[6] = satuw(s->L(j + 2)); 1667 r[7] = satuw(s->L(j + 3)); 1668 for (k = 0; k < 8; k++) { 1669 d->W(i + k) = r[k]; 1670 } 1671 } 1672 } 1673 1674 #if SHIFT == 1 1675 void glue(helper_phminposuw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) 1676 { 1677 int idx = 0; 1678 1679 if (s->W(1) < s->W(idx)) { 1680 idx = 1; 1681 } 1682 if (s->W(2) < s->W(idx)) { 1683 idx = 2; 1684 } 1685 if (s->W(3) < s->W(idx)) { 1686 idx = 3; 1687 } 1688 if (s->W(4) < s->W(idx)) { 1689 idx = 4; 1690 } 1691 if (s->W(5) < s->W(idx)) { 1692 idx = 5; 1693 } 1694 if (s->W(6) < s->W(idx)) { 1695 idx = 6; 1696 } 1697 if (s->W(7) < s->W(idx)) { 1698 idx = 7; 1699 } 1700 1701 d->W(0) = s->W(idx); 1702 d->W(1) = idx; 1703 d->L(1) = 0; 1704 d->Q(1) = 0; 1705 } 1706 #endif 1707 1708 void glue(helper_roundps, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, 1709 uint32_t mode) 1710 { 1711 uint8_t old_flags = get_float_exception_flags(&env->sse_status); 1712 signed char prev_rounding_mode; 1713 int i; 1714 1715 prev_rounding_mode = env->sse_status.float_rounding_mode; 1716 if (!(mode & (1 << 2))) { 1717 set_x86_rounding_mode(mode & 3, &env->sse_status); 1718 } 1719 1720 for (i = 0; i < 2 << SHIFT; i++) { 1721 d->ZMM_S(i) = float32_round_to_int(s->ZMM_S(i), &env->sse_status); 1722 } 1723 1724 if (mode & (1 << 3) && !(old_flags & float_flag_inexact)) { 1725 set_float_exception_flags(get_float_exception_flags(&env->sse_status) & 1726 ~float_flag_inexact, 1727 &env->sse_status); 1728 } 1729 env->sse_status.float_rounding_mode = prev_rounding_mode; 1730 } 1731 1732 void glue(helper_roundpd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, 1733 uint32_t mode) 1734 { 1735 uint8_t old_flags = get_float_exception_flags(&env->sse_status); 1736 signed char prev_rounding_mode; 1737 int i; 1738 1739 prev_rounding_mode = env->sse_status.float_rounding_mode; 1740 if (!(mode & (1 << 2))) { 1741 set_x86_rounding_mode(mode & 3, &env->sse_status); 1742 } 1743 1744 for (i = 0; i < 1 << SHIFT; i++) { 1745 d->ZMM_D(i) = float64_round_to_int(s->ZMM_D(i), &env->sse_status); 1746 } 1747 1748 if (mode & (1 << 3) && !(old_flags & float_flag_inexact)) { 1749 set_float_exception_flags(get_float_exception_flags(&env->sse_status) & 1750 ~float_flag_inexact, 1751 &env->sse_status); 1752 } 1753 env->sse_status.float_rounding_mode = prev_rounding_mode; 1754 } 1755 1756 #if SHIFT == 1 1757 void glue(helper_roundss, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s, 1758 uint32_t mode) 1759 { 1760 uint8_t old_flags = get_float_exception_flags(&env->sse_status); 1761 signed char prev_rounding_mode; 1762 int i; 1763 1764 prev_rounding_mode = env->sse_status.float_rounding_mode; 1765 if (!(mode & (1 << 2))) { 1766 set_x86_rounding_mode(mode & 3, &env->sse_status); 1767 } 1768 1769 d->ZMM_S(0) = float32_round_to_int(s->ZMM_S(0), &env->sse_status); 1770 for (i = 1; i < 2 << SHIFT; i++) { 1771 d->ZMM_L(i) = v->ZMM_L(i); 1772 } 1773 1774 if (mode & (1 << 3) && !(old_flags & float_flag_inexact)) { 1775 set_float_exception_flags(get_float_exception_flags(&env->sse_status) & 1776 ~float_flag_inexact, 1777 &env->sse_status); 1778 } 1779 env->sse_status.float_rounding_mode = prev_rounding_mode; 1780 } 1781 1782 void glue(helper_roundsd, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s, 1783 uint32_t mode) 1784 { 1785 uint8_t old_flags = get_float_exception_flags(&env->sse_status); 1786 signed char prev_rounding_mode; 1787 int i; 1788 1789 prev_rounding_mode = env->sse_status.float_rounding_mode; 1790 if (!(mode & (1 << 2))) { 1791 set_x86_rounding_mode(mode & 3, &env->sse_status); 1792 } 1793 1794 d->ZMM_D(0) = float64_round_to_int(s->ZMM_D(0), &env->sse_status); 1795 for (i = 1; i < 1 << SHIFT; i++) { 1796 d->ZMM_Q(i) = v->ZMM_Q(i); 1797 } 1798 1799 if (mode & (1 << 3) && !(old_flags & float_flag_inexact)) { 1800 set_float_exception_flags(get_float_exception_flags(&env->sse_status) & 1801 ~float_flag_inexact, 1802 &env->sse_status); 1803 } 1804 env->sse_status.float_rounding_mode = prev_rounding_mode; 1805 } 1806 #endif 1807 1808 #define FBLENDP(v, s, m) (m ? s : v) 1809 SSE_HELPER_I(helper_blendps, L, 2 << SHIFT, FBLENDP) 1810 SSE_HELPER_I(helper_blendpd, Q, 1 << SHIFT, FBLENDP) 1811 SSE_HELPER_I(helper_pblendw, W, 4 << SHIFT, FBLENDP) 1812 1813 void glue(helper_dpps, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s, 1814 uint32_t mask) 1815 { 1816 float32 prod1, prod2, temp2, temp3, temp4; 1817 int i; 1818 1819 for (i = 0; i < 2 << SHIFT; i += 4) { 1820 /* 1821 * We must evaluate (A+B)+(C+D), not ((A+B)+C)+D 1822 * to correctly round the intermediate results 1823 */ 1824 if (mask & (1 << 4)) { 1825 prod1 = float32_mul(v->ZMM_S(i), s->ZMM_S(i), &env->sse_status); 1826 } else { 1827 prod1 = float32_zero; 1828 } 1829 if (mask & (1 << 5)) { 1830 prod2 = float32_mul(v->ZMM_S(i+1), s->ZMM_S(i+1), &env->sse_status); 1831 } else { 1832 prod2 = float32_zero; 1833 } 1834 temp2 = float32_add(prod1, prod2, &env->sse_status); 1835 if (mask & (1 << 6)) { 1836 prod1 = float32_mul(v->ZMM_S(i+2), s->ZMM_S(i+2), &env->sse_status); 1837 } else { 1838 prod1 = float32_zero; 1839 } 1840 if (mask & (1 << 7)) { 1841 prod2 = float32_mul(v->ZMM_S(i+3), s->ZMM_S(i+3), &env->sse_status); 1842 } else { 1843 prod2 = float32_zero; 1844 } 1845 temp3 = float32_add(prod1, prod2, &env->sse_status); 1846 temp4 = float32_add(temp2, temp3, &env->sse_status); 1847 1848 d->ZMM_S(i) = (mask & (1 << 0)) ? temp4 : float32_zero; 1849 d->ZMM_S(i+1) = (mask & (1 << 1)) ? temp4 : float32_zero; 1850 d->ZMM_S(i+2) = (mask & (1 << 2)) ? temp4 : float32_zero; 1851 d->ZMM_S(i+3) = (mask & (1 << 3)) ? temp4 : float32_zero; 1852 } 1853 } 1854 1855 #if SHIFT == 1 1856 /* Oddly, there is no ymm version of dppd */ 1857 void glue(helper_dppd, SUFFIX)(CPUX86State *env, 1858 Reg *d, Reg *v, Reg *s, uint32_t mask) 1859 { 1860 float64 prod1, prod2, temp2; 1861 1862 if (mask & (1 << 4)) { 1863 prod1 = float64_mul(v->ZMM_D(0), s->ZMM_D(0), &env->sse_status); 1864 } else { 1865 prod1 = float64_zero; 1866 } 1867 if (mask & (1 << 5)) { 1868 prod2 = float64_mul(v->ZMM_D(1), s->ZMM_D(1), &env->sse_status); 1869 } else { 1870 prod2 = float64_zero; 1871 } 1872 temp2 = float64_add(prod1, prod2, &env->sse_status); 1873 d->ZMM_D(0) = (mask & (1 << 0)) ? temp2 : float64_zero; 1874 d->ZMM_D(1) = (mask & (1 << 1)) ? temp2 : float64_zero; 1875 } 1876 #endif 1877 1878 void glue(helper_mpsadbw, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s, 1879 uint32_t offset) 1880 { 1881 int i, j; 1882 uint16_t r[8]; 1883 1884 for (j = 0; j < 4 << SHIFT; ) { 1885 int s0 = (j * 2) + ((offset & 3) << 2); 1886 int d0 = (j * 2) + ((offset & 4) << 0); 1887 for (i = 0; i < LANE_WIDTH / 2; i++, d0++) { 1888 r[i] = 0; 1889 r[i] += abs1(v->B(d0 + 0) - s->B(s0 + 0)); 1890 r[i] += abs1(v->B(d0 + 1) - s->B(s0 + 1)); 1891 r[i] += abs1(v->B(d0 + 2) - s->B(s0 + 2)); 1892 r[i] += abs1(v->B(d0 + 3) - s->B(s0 + 3)); 1893 } 1894 for (i = 0; i < LANE_WIDTH / 2; i++, j++) { 1895 d->W(j) = r[i]; 1896 } 1897 offset >>= 3; 1898 } 1899 } 1900 1901 /* SSE4.2 op helpers */ 1902 #if SHIFT == 1 1903 static inline int pcmp_elen(CPUX86State *env, int reg, uint32_t ctrl) 1904 { 1905 target_long val, limit; 1906 1907 /* Presence of REX.W is indicated by a bit higher than 7 set */ 1908 if (ctrl >> 8) { 1909 val = (target_long)env->regs[reg]; 1910 } else { 1911 val = (int32_t)env->regs[reg]; 1912 } 1913 if (ctrl & 1) { 1914 limit = 8; 1915 } else { 1916 limit = 16; 1917 } 1918 if ((val > limit) || (val < -limit)) { 1919 return limit; 1920 } 1921 return abs1(val); 1922 } 1923 1924 static inline int pcmp_ilen(Reg *r, uint8_t ctrl) 1925 { 1926 int val = 0; 1927 1928 if (ctrl & 1) { 1929 while (val < 8 && r->W(val)) { 1930 val++; 1931 } 1932 } else { 1933 while (val < 16 && r->B(val)) { 1934 val++; 1935 } 1936 } 1937 1938 return val; 1939 } 1940 1941 static inline int pcmp_val(Reg *r, uint8_t ctrl, int i) 1942 { 1943 switch ((ctrl >> 0) & 3) { 1944 case 0: 1945 return r->B(i); 1946 case 1: 1947 return r->W(i); 1948 case 2: 1949 return (int8_t)r->B(i); 1950 case 3: 1951 default: 1952 return (int16_t)r->W(i); 1953 } 1954 } 1955 1956 static inline unsigned pcmpxstrx(CPUX86State *env, Reg *d, Reg *s, 1957 uint8_t ctrl, int valids, int validd) 1958 { 1959 unsigned int res = 0; 1960 int v; 1961 int j, i; 1962 int upper = (ctrl & 1) ? 7 : 15; 1963 1964 valids--; 1965 validd--; 1966 1967 CC_SRC = (valids < upper ? CC_Z : 0) | (validd < upper ? CC_S : 0); 1968 1969 switch ((ctrl >> 2) & 3) { 1970 case 0: 1971 for (j = valids; j >= 0; j--) { 1972 res <<= 1; 1973 v = pcmp_val(s, ctrl, j); 1974 for (i = validd; i >= 0; i--) { 1975 res |= (v == pcmp_val(d, ctrl, i)); 1976 } 1977 } 1978 break; 1979 case 1: 1980 for (j = valids; j >= 0; j--) { 1981 res <<= 1; 1982 v = pcmp_val(s, ctrl, j); 1983 for (i = ((validd - 1) | 1); i >= 0; i -= 2) { 1984 res |= (pcmp_val(d, ctrl, i - 0) >= v && 1985 pcmp_val(d, ctrl, i - 1) <= v); 1986 } 1987 } 1988 break; 1989 case 2: 1990 res = (1 << (upper - MAX(valids, validd))) - 1; 1991 res <<= MAX(valids, validd) - MIN(valids, validd); 1992 for (i = MIN(valids, validd); i >= 0; i--) { 1993 res <<= 1; 1994 v = pcmp_val(s, ctrl, i); 1995 res |= (v == pcmp_val(d, ctrl, i)); 1996 } 1997 break; 1998 case 3: 1999 if (validd == -1) { 2000 res = (2 << upper) - 1; 2001 break; 2002 } 2003 for (j = valids == upper ? valids : valids - validd; j >= 0; j--) { 2004 res <<= 1; 2005 v = 1; 2006 for (i = MIN(valids - j, validd); i >= 0; i--) { 2007 v &= (pcmp_val(s, ctrl, i + j) == pcmp_val(d, ctrl, i)); 2008 } 2009 res |= v; 2010 } 2011 break; 2012 } 2013 2014 switch ((ctrl >> 4) & 3) { 2015 case 1: 2016 res ^= (2 << upper) - 1; 2017 break; 2018 case 3: 2019 res ^= (1 << (valids + 1)) - 1; 2020 break; 2021 } 2022 2023 if (res) { 2024 CC_SRC |= CC_C; 2025 } 2026 if (res & 1) { 2027 CC_SRC |= CC_O; 2028 } 2029 2030 return res; 2031 } 2032 2033 void glue(helper_pcmpestri, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, 2034 uint32_t ctrl) 2035 { 2036 unsigned int res = pcmpxstrx(env, d, s, ctrl, 2037 pcmp_elen(env, R_EDX, ctrl), 2038 pcmp_elen(env, R_EAX, ctrl)); 2039 2040 if (res) { 2041 env->regs[R_ECX] = (ctrl & (1 << 6)) ? 31 - clz32(res) : ctz32(res); 2042 } else { 2043 env->regs[R_ECX] = 16 >> (ctrl & (1 << 0)); 2044 } 2045 } 2046 2047 void glue(helper_pcmpestrm, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, 2048 uint32_t ctrl) 2049 { 2050 int i; 2051 unsigned int res = pcmpxstrx(env, d, s, ctrl, 2052 pcmp_elen(env, R_EDX, ctrl), 2053 pcmp_elen(env, R_EAX, ctrl)); 2054 2055 if ((ctrl >> 6) & 1) { 2056 if (ctrl & 1) { 2057 for (i = 0; i < 8; i++, res >>= 1) { 2058 env->xmm_regs[0].W(i) = (res & 1) ? ~0 : 0; 2059 } 2060 } else { 2061 for (i = 0; i < 16; i++, res >>= 1) { 2062 env->xmm_regs[0].B(i) = (res & 1) ? ~0 : 0; 2063 } 2064 } 2065 } else { 2066 env->xmm_regs[0].Q(1) = 0; 2067 env->xmm_regs[0].Q(0) = res; 2068 } 2069 } 2070 2071 void glue(helper_pcmpistri, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, 2072 uint32_t ctrl) 2073 { 2074 unsigned int res = pcmpxstrx(env, d, s, ctrl, 2075 pcmp_ilen(s, ctrl), 2076 pcmp_ilen(d, ctrl)); 2077 2078 if (res) { 2079 env->regs[R_ECX] = (ctrl & (1 << 6)) ? 31 - clz32(res) : ctz32(res); 2080 } else { 2081 env->regs[R_ECX] = 16 >> (ctrl & (1 << 0)); 2082 } 2083 } 2084 2085 void glue(helper_pcmpistrm, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, 2086 uint32_t ctrl) 2087 { 2088 int i; 2089 unsigned int res = pcmpxstrx(env, d, s, ctrl, 2090 pcmp_ilen(s, ctrl), 2091 pcmp_ilen(d, ctrl)); 2092 2093 if ((ctrl >> 6) & 1) { 2094 if (ctrl & 1) { 2095 for (i = 0; i < 8; i++, res >>= 1) { 2096 env->xmm_regs[0].W(i) = (res & 1) ? ~0 : 0; 2097 } 2098 } else { 2099 for (i = 0; i < 16; i++, res >>= 1) { 2100 env->xmm_regs[0].B(i) = (res & 1) ? ~0 : 0; 2101 } 2102 } 2103 } else { 2104 env->xmm_regs[0].Q(1) = 0; 2105 env->xmm_regs[0].Q(0) = res; 2106 } 2107 } 2108 2109 #define CRCPOLY 0x1edc6f41 2110 #define CRCPOLY_BITREV 0x82f63b78 2111 target_ulong helper_crc32(uint32_t crc1, target_ulong msg, uint32_t len) 2112 { 2113 target_ulong crc = (msg & ((target_ulong) -1 >> 2114 (TARGET_LONG_BITS - len))) ^ crc1; 2115 2116 while (len--) { 2117 crc = (crc >> 1) ^ ((crc & 1) ? CRCPOLY_BITREV : 0); 2118 } 2119 2120 return crc; 2121 } 2122 2123 #endif 2124 2125 #if SHIFT == 1 2126 static void clmulq(uint64_t *dest_l, uint64_t *dest_h, 2127 uint64_t a, uint64_t b) 2128 { 2129 uint64_t al, ah, resh, resl; 2130 2131 ah = 0; 2132 al = a; 2133 resh = resl = 0; 2134 2135 while (b) { 2136 if (b & 1) { 2137 resl ^= al; 2138 resh ^= ah; 2139 } 2140 ah = (ah << 1) | (al >> 63); 2141 al <<= 1; 2142 b >>= 1; 2143 } 2144 2145 *dest_l = resl; 2146 *dest_h = resh; 2147 } 2148 #endif 2149 2150 void glue(helper_pclmulqdq, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s, 2151 uint32_t ctrl) 2152 { 2153 uint64_t a, b; 2154 int i; 2155 2156 for (i = 0; i < 1 << SHIFT; i += 2) { 2157 a = v->Q(((ctrl & 1) != 0) + i); 2158 b = s->Q(((ctrl & 16) != 0) + i); 2159 clmulq(&d->Q(i), &d->Q(i + 1), a, b); 2160 } 2161 } 2162 2163 void glue(helper_aesdec, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s) 2164 { 2165 for (int i = 0; i < SHIFT; i++) { 2166 AESState *ad = (AESState *)&d->ZMM_X(i); 2167 AESState *st = (AESState *)&v->ZMM_X(i); 2168 AESState *rk = (AESState *)&s->ZMM_X(i); 2169 2170 aesdec_ISB_ISR_IMC_AK(ad, st, rk, false); 2171 } 2172 } 2173 2174 void glue(helper_aesdeclast, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s) 2175 { 2176 for (int i = 0; i < SHIFT; i++) { 2177 AESState *ad = (AESState *)&d->ZMM_X(i); 2178 AESState *st = (AESState *)&v->ZMM_X(i); 2179 AESState *rk = (AESState *)&s->ZMM_X(i); 2180 2181 aesdec_ISB_ISR_AK(ad, st, rk, false); 2182 } 2183 } 2184 2185 void glue(helper_aesenc, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s) 2186 { 2187 for (int i = 0; i < SHIFT; i++) { 2188 AESState *ad = (AESState *)&d->ZMM_X(i); 2189 AESState *st = (AESState *)&v->ZMM_X(i); 2190 AESState *rk = (AESState *)&s->ZMM_X(i); 2191 2192 aesenc_SB_SR_MC_AK(ad, st, rk, false); 2193 } 2194 } 2195 2196 void glue(helper_aesenclast, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s) 2197 { 2198 for (int i = 0; i < SHIFT; i++) { 2199 AESState *ad = (AESState *)&d->ZMM_X(i); 2200 AESState *st = (AESState *)&v->ZMM_X(i); 2201 AESState *rk = (AESState *)&s->ZMM_X(i); 2202 2203 aesenc_SB_SR_AK(ad, st, rk, false); 2204 } 2205 } 2206 2207 #if SHIFT == 1 2208 void glue(helper_aesimc, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) 2209 { 2210 AESState *ad = (AESState *)&d->ZMM_X(0); 2211 AESState *st = (AESState *)&s->ZMM_X(0); 2212 2213 aesdec_IMC(ad, st, false); 2214 } 2215 2216 void glue(helper_aeskeygenassist, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, 2217 uint32_t ctrl) 2218 { 2219 int i; 2220 Reg tmp = *s; 2221 2222 for (i = 0 ; i < 4 ; i++) { 2223 d->B(i) = AES_sbox[tmp.B(i + 4)]; 2224 d->B(i + 8) = AES_sbox[tmp.B(i + 12)]; 2225 } 2226 d->L(1) = (d->L(0) << 24 | d->L(0) >> 8) ^ ctrl; 2227 d->L(3) = (d->L(2) << 24 | d->L(2) >> 8) ^ ctrl; 2228 } 2229 #endif 2230 #endif 2231 2232 #if SHIFT >= 1 2233 void glue(helper_vpermilpd, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s) 2234 { 2235 uint64_t r0, r1; 2236 int i; 2237 2238 for (i = 0; i < 1 << SHIFT; i += 2) { 2239 r0 = v->Q(i + ((s->Q(i) >> 1) & 1)); 2240 r1 = v->Q(i + ((s->Q(i+1) >> 1) & 1)); 2241 d->Q(i) = r0; 2242 d->Q(i+1) = r1; 2243 } 2244 } 2245 2246 void glue(helper_vpermilps, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s) 2247 { 2248 uint32_t r0, r1, r2, r3; 2249 int i; 2250 2251 for (i = 0; i < 2 << SHIFT; i += 4) { 2252 r0 = v->L(i + (s->L(i) & 3)); 2253 r1 = v->L(i + (s->L(i+1) & 3)); 2254 r2 = v->L(i + (s->L(i+2) & 3)); 2255 r3 = v->L(i + (s->L(i+3) & 3)); 2256 d->L(i) = r0; 2257 d->L(i+1) = r1; 2258 d->L(i+2) = r2; 2259 d->L(i+3) = r3; 2260 } 2261 } 2262 2263 void glue(helper_vpermilpd_imm, SUFFIX)(Reg *d, Reg *s, uint32_t order) 2264 { 2265 uint64_t r0, r1; 2266 int i; 2267 2268 for (i = 0; i < 1 << SHIFT; i += 2) { 2269 r0 = s->Q(i + ((order >> 0) & 1)); 2270 r1 = s->Q(i + ((order >> 1) & 1)); 2271 d->Q(i) = r0; 2272 d->Q(i+1) = r1; 2273 2274 order >>= 2; 2275 } 2276 } 2277 2278 void glue(helper_vpermilps_imm, SUFFIX)(Reg *d, Reg *s, uint32_t order) 2279 { 2280 uint32_t r0, r1, r2, r3; 2281 int i; 2282 2283 for (i = 0; i < 2 << SHIFT; i += 4) { 2284 r0 = s->L(i + ((order >> 0) & 3)); 2285 r1 = s->L(i + ((order >> 2) & 3)); 2286 r2 = s->L(i + ((order >> 4) & 3)); 2287 r3 = s->L(i + ((order >> 6) & 3)); 2288 d->L(i) = r0; 2289 d->L(i+1) = r1; 2290 d->L(i+2) = r2; 2291 d->L(i+3) = r3; 2292 } 2293 } 2294 2295 #if SHIFT == 1 2296 #define FPSRLVD(x, c) (c < 32 ? ((x) >> c) : 0) 2297 #define FPSRLVQ(x, c) (c < 64 ? ((x) >> c) : 0) 2298 #define FPSRAVD(x, c) ((int32_t)(x) >> (c < 32 ? c : 31)) 2299 #define FPSRAVQ(x, c) ((int64_t)(x) >> (c < 64 ? c : 63)) 2300 #define FPSLLVD(x, c) (c < 32 ? ((x) << c) : 0) 2301 #define FPSLLVQ(x, c) (c < 64 ? ((x) << c) : 0) 2302 #endif 2303 2304 SSE_HELPER_L(helper_vpsrlvd, FPSRLVD) 2305 SSE_HELPER_L(helper_vpsravd, FPSRAVD) 2306 SSE_HELPER_L(helper_vpsllvd, FPSLLVD) 2307 2308 SSE_HELPER_Q(helper_vpsrlvq, FPSRLVQ) 2309 SSE_HELPER_Q(helper_vpsravq, FPSRAVQ) 2310 SSE_HELPER_Q(helper_vpsllvq, FPSLLVQ) 2311 2312 void glue(helper_vtestps, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) 2313 { 2314 uint32_t zf = 0, cf = 0; 2315 int i; 2316 2317 for (i = 0; i < 2 << SHIFT; i++) { 2318 zf |= (s->L(i) & d->L(i)); 2319 cf |= (s->L(i) & ~d->L(i)); 2320 } 2321 CC_SRC = ((zf >> 31) ? 0 : CC_Z) | ((cf >> 31) ? 0 : CC_C); 2322 } 2323 2324 void glue(helper_vtestpd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) 2325 { 2326 uint64_t zf = 0, cf = 0; 2327 int i; 2328 2329 for (i = 0; i < 1 << SHIFT; i++) { 2330 zf |= (s->Q(i) & d->Q(i)); 2331 cf |= (s->Q(i) & ~d->Q(i)); 2332 } 2333 CC_SRC = ((zf >> 63) ? 0 : CC_Z) | ((cf >> 63) ? 0 : CC_C); 2334 } 2335 2336 void glue(helper_vpmaskmovd_st, SUFFIX)(CPUX86State *env, 2337 Reg *v, Reg *s, target_ulong a0) 2338 { 2339 int i; 2340 2341 for (i = 0; i < (2 << SHIFT); i++) { 2342 if (v->L(i) >> 31) { 2343 cpu_stl_data_ra(env, a0 + i * 4, s->L(i), GETPC()); 2344 } 2345 } 2346 } 2347 2348 void glue(helper_vpmaskmovq_st, SUFFIX)(CPUX86State *env, 2349 Reg *v, Reg *s, target_ulong a0) 2350 { 2351 int i; 2352 2353 for (i = 0; i < (1 << SHIFT); i++) { 2354 if (v->Q(i) >> 63) { 2355 cpu_stq_data_ra(env, a0 + i * 8, s->Q(i), GETPC()); 2356 } 2357 } 2358 } 2359 2360 void glue(helper_vpmaskmovd, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s) 2361 { 2362 int i; 2363 2364 for (i = 0; i < (2 << SHIFT); i++) { 2365 d->L(i) = (v->L(i) >> 31) ? s->L(i) : 0; 2366 } 2367 } 2368 2369 void glue(helper_vpmaskmovq, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s) 2370 { 2371 int i; 2372 2373 for (i = 0; i < (1 << SHIFT); i++) { 2374 d->Q(i) = (v->Q(i) >> 63) ? s->Q(i) : 0; 2375 } 2376 } 2377 2378 void glue(helper_vpgatherdd, SUFFIX)(CPUX86State *env, 2379 Reg *d, Reg *v, Reg *s, target_ulong a0, unsigned scale) 2380 { 2381 int i; 2382 for (i = 0; i < (2 << SHIFT); i++) { 2383 if (v->L(i) >> 31) { 2384 target_ulong addr = a0 2385 + ((target_ulong)(int32_t)s->L(i) << scale); 2386 d->L(i) = cpu_ldl_data_ra(env, addr, GETPC()); 2387 } 2388 v->L(i) = 0; 2389 } 2390 } 2391 2392 void glue(helper_vpgatherdq, SUFFIX)(CPUX86State *env, 2393 Reg *d, Reg *v, Reg *s, target_ulong a0, unsigned scale) 2394 { 2395 int i; 2396 for (i = 0; i < (1 << SHIFT); i++) { 2397 if (v->Q(i) >> 63) { 2398 target_ulong addr = a0 2399 + ((target_ulong)(int32_t)s->L(i) << scale); 2400 d->Q(i) = cpu_ldq_data_ra(env, addr, GETPC()); 2401 } 2402 v->Q(i) = 0; 2403 } 2404 } 2405 2406 void glue(helper_vpgatherqd, SUFFIX)(CPUX86State *env, 2407 Reg *d, Reg *v, Reg *s, target_ulong a0, unsigned scale) 2408 { 2409 int i; 2410 for (i = 0; i < (1 << SHIFT); i++) { 2411 if (v->L(i) >> 31) { 2412 target_ulong addr = a0 2413 + ((target_ulong)(int64_t)s->Q(i) << scale); 2414 d->L(i) = cpu_ldl_data_ra(env, addr, GETPC()); 2415 } 2416 v->L(i) = 0; 2417 } 2418 for (i /= 2; i < 1 << SHIFT; i++) { 2419 d->Q(i) = 0; 2420 v->Q(i) = 0; 2421 } 2422 } 2423 2424 void glue(helper_vpgatherqq, SUFFIX)(CPUX86State *env, 2425 Reg *d, Reg *v, Reg *s, target_ulong a0, unsigned scale) 2426 { 2427 int i; 2428 for (i = 0; i < (1 << SHIFT); i++) { 2429 if (v->Q(i) >> 63) { 2430 target_ulong addr = a0 2431 + ((target_ulong)(int64_t)s->Q(i) << scale); 2432 d->Q(i) = cpu_ldq_data_ra(env, addr, GETPC()); 2433 } 2434 v->Q(i) = 0; 2435 } 2436 } 2437 #endif 2438 2439 #if SHIFT >= 2 2440 void helper_vpermdq_ymm(Reg *d, Reg *v, Reg *s, uint32_t order) 2441 { 2442 uint64_t r0, r1, r2, r3; 2443 2444 switch (order & 3) { 2445 case 0: 2446 r0 = v->Q(0); 2447 r1 = v->Q(1); 2448 break; 2449 case 1: 2450 r0 = v->Q(2); 2451 r1 = v->Q(3); 2452 break; 2453 case 2: 2454 r0 = s->Q(0); 2455 r1 = s->Q(1); 2456 break; 2457 case 3: 2458 r0 = s->Q(2); 2459 r1 = s->Q(3); 2460 break; 2461 default: /* default case added to help the compiler to avoid warnings */ 2462 g_assert_not_reached(); 2463 } 2464 switch ((order >> 4) & 3) { 2465 case 0: 2466 r2 = v->Q(0); 2467 r3 = v->Q(1); 2468 break; 2469 case 1: 2470 r2 = v->Q(2); 2471 r3 = v->Q(3); 2472 break; 2473 case 2: 2474 r2 = s->Q(0); 2475 r3 = s->Q(1); 2476 break; 2477 case 3: 2478 r2 = s->Q(2); 2479 r3 = s->Q(3); 2480 break; 2481 default: /* default case added to help the compiler to avoid warnings */ 2482 g_assert_not_reached(); 2483 } 2484 d->Q(0) = r0; 2485 d->Q(1) = r1; 2486 d->Q(2) = r2; 2487 d->Q(3) = r3; 2488 if (order & 0x8) { 2489 d->Q(0) = 0; 2490 d->Q(1) = 0; 2491 } 2492 if (order & 0x80) { 2493 d->Q(2) = 0; 2494 d->Q(3) = 0; 2495 } 2496 } 2497 2498 void helper_vpermq_ymm(Reg *d, Reg *s, uint32_t order) 2499 { 2500 uint64_t r0, r1, r2, r3; 2501 r0 = s->Q(order & 3); 2502 r1 = s->Q((order >> 2) & 3); 2503 r2 = s->Q((order >> 4) & 3); 2504 r3 = s->Q((order >> 6) & 3); 2505 d->Q(0) = r0; 2506 d->Q(1) = r1; 2507 d->Q(2) = r2; 2508 d->Q(3) = r3; 2509 } 2510 2511 void helper_vpermd_ymm(Reg *d, Reg *v, Reg *s) 2512 { 2513 uint32_t r[8]; 2514 int i; 2515 2516 for (i = 0; i < 8; i++) { 2517 r[i] = s->L(v->L(i) & 7); 2518 } 2519 for (i = 0; i < 8; i++) { 2520 d->L(i) = r[i]; 2521 } 2522 } 2523 #endif 2524 2525 /* FMA3 op helpers */ 2526 #if SHIFT == 1 2527 #define SSE_HELPER_FMAS(name, elem, F) \ 2528 void name(CPUX86State *env, Reg *d, Reg *a, Reg *b, Reg *c, int flags) \ 2529 { \ 2530 d->elem(0) = F(a->elem(0), b->elem(0), c->elem(0), flags, &env->sse_status); \ 2531 } 2532 #define SSE_HELPER_FMAP(name, elem, num, F) \ 2533 void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *a, Reg *b, Reg *c, \ 2534 int flags, int flip) \ 2535 { \ 2536 int i; \ 2537 for (i = 0; i < num; i++) { \ 2538 d->elem(i) = F(a->elem(i), b->elem(i), c->elem(i), flags, &env->sse_status); \ 2539 flags ^= flip; \ 2540 } \ 2541 } 2542 2543 SSE_HELPER_FMAS(helper_fma4ss, ZMM_S, float32_muladd) 2544 SSE_HELPER_FMAS(helper_fma4sd, ZMM_D, float64_muladd) 2545 #endif 2546 2547 #if SHIFT >= 1 2548 SSE_HELPER_FMAP(helper_fma4ps, ZMM_S, 2 << SHIFT, float32_muladd) 2549 SSE_HELPER_FMAP(helper_fma4pd, ZMM_D, 1 << SHIFT, float64_muladd) 2550 #endif 2551 2552 #undef SSE_HELPER_S 2553 2554 #undef LANE_WIDTH 2555 #undef SHIFT 2556 #undef XMM_ONLY 2557 #undef Reg 2558 #undef B 2559 #undef W 2560 #undef L 2561 #undef Q 2562 #undef SUFFIX 2563