169e0a03cSPaolo Bonzini /* Copyright 2008 IBM Corporation 269e0a03cSPaolo Bonzini * 2008 Red Hat, Inc. 369e0a03cSPaolo Bonzini * Copyright 2011 Intel Corporation 469e0a03cSPaolo Bonzini * Copyright 2016 Veertu, Inc. 569e0a03cSPaolo Bonzini * Copyright 2017 The Android Open Source Project 669e0a03cSPaolo Bonzini * 769e0a03cSPaolo Bonzini * QEMU Hypervisor.framework support 869e0a03cSPaolo Bonzini * 969e0a03cSPaolo Bonzini * This program is free software; you can redistribute it and/or 1069e0a03cSPaolo Bonzini * modify it under the terms of version 2 of the GNU General Public 1169e0a03cSPaolo Bonzini * License as published by the Free Software Foundation. 1269e0a03cSPaolo Bonzini * 1369e0a03cSPaolo Bonzini * This program is distributed in the hope that it will be useful, 1469e0a03cSPaolo Bonzini * but WITHOUT ANY WARRANTY; without even the implied warranty of 1569e0a03cSPaolo Bonzini * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16e361a772SThomas Huth * General Public License for more details. 1769e0a03cSPaolo Bonzini * 18e361a772SThomas Huth * You should have received a copy of the GNU General Public License 19e361a772SThomas Huth * along with this program; if not, see <http://www.gnu.org/licenses/>. 20d781e24dSIzik Eidus * 21d781e24dSIzik Eidus * This file contain code under public domain from the hvdos project: 22d781e24dSIzik Eidus * https://github.com/mist64/hvdos 234d98a8e5SPaolo Bonzini * 244d98a8e5SPaolo Bonzini * Parts Copyright (c) 2011 NetApp, Inc. 254d98a8e5SPaolo Bonzini * All rights reserved. 264d98a8e5SPaolo Bonzini * 274d98a8e5SPaolo Bonzini * Redistribution and use in source and binary forms, with or without 284d98a8e5SPaolo Bonzini * modification, are permitted provided that the following conditions 294d98a8e5SPaolo Bonzini * are met: 304d98a8e5SPaolo Bonzini * 1. Redistributions of source code must retain the above copyright 314d98a8e5SPaolo Bonzini * notice, this list of conditions and the following disclaimer. 324d98a8e5SPaolo Bonzini * 2. Redistributions in binary form must reproduce the above copyright 334d98a8e5SPaolo Bonzini * notice, this list of conditions and the following disclaimer in the 344d98a8e5SPaolo Bonzini * documentation and/or other materials provided with the distribution. 354d98a8e5SPaolo Bonzini * 364d98a8e5SPaolo Bonzini * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 374d98a8e5SPaolo Bonzini * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 384d98a8e5SPaolo Bonzini * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 394d98a8e5SPaolo Bonzini * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 404d98a8e5SPaolo Bonzini * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 414d98a8e5SPaolo Bonzini * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 424d98a8e5SPaolo Bonzini * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 434d98a8e5SPaolo Bonzini * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 444d98a8e5SPaolo Bonzini * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 454d98a8e5SPaolo Bonzini * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 464d98a8e5SPaolo Bonzini * SUCH DAMAGE. 4769e0a03cSPaolo Bonzini */ 4854d31236SMarkus Armbruster 4969e0a03cSPaolo Bonzini #include "qemu/osdep.h" 5069e0a03cSPaolo Bonzini #include "qemu-common.h" 5169e0a03cSPaolo Bonzini #include "qemu/error-report.h" 5269e0a03cSPaolo Bonzini 5369e0a03cSPaolo Bonzini #include "sysemu/hvf.h" 5454d31236SMarkus Armbruster #include "sysemu/runstate.h" 5569e0a03cSPaolo Bonzini #include "hvf-i386.h" 5669e0a03cSPaolo Bonzini #include "vmcs.h" 5769e0a03cSPaolo Bonzini #include "vmx.h" 5869e0a03cSPaolo Bonzini #include "x86.h" 5969e0a03cSPaolo Bonzini #include "x86_descr.h" 6069e0a03cSPaolo Bonzini #include "x86_mmu.h" 6169e0a03cSPaolo Bonzini #include "x86_decode.h" 6269e0a03cSPaolo Bonzini #include "x86_emu.h" 6369e0a03cSPaolo Bonzini #include "x86_task.h" 6469e0a03cSPaolo Bonzini #include "x86hvf.h" 6569e0a03cSPaolo Bonzini 6669e0a03cSPaolo Bonzini #include <Hypervisor/hv.h> 6769e0a03cSPaolo Bonzini #include <Hypervisor/hv_vmx.h> 6869e0a03cSPaolo Bonzini 6969e0a03cSPaolo Bonzini #include "exec/address-spaces.h" 7069e0a03cSPaolo Bonzini #include "hw/i386/apic_internal.h" 7169e0a03cSPaolo Bonzini #include "qemu/main-loop.h" 7269e0a03cSPaolo Bonzini #include "sysemu/accel.h" 7369e0a03cSPaolo Bonzini #include "target/i386/cpu.h" 7469e0a03cSPaolo Bonzini 7569e0a03cSPaolo Bonzini HVFState *hvf_state; 7669e0a03cSPaolo Bonzini 7769e0a03cSPaolo Bonzini static void assert_hvf_ok(hv_return_t ret) 7869e0a03cSPaolo Bonzini { 7969e0a03cSPaolo Bonzini if (ret == HV_SUCCESS) { 8069e0a03cSPaolo Bonzini return; 8169e0a03cSPaolo Bonzini } 8269e0a03cSPaolo Bonzini 8369e0a03cSPaolo Bonzini switch (ret) { 8469e0a03cSPaolo Bonzini case HV_ERROR: 852d9178d9SLaurent Vivier error_report("Error: HV_ERROR"); 8669e0a03cSPaolo Bonzini break; 8769e0a03cSPaolo Bonzini case HV_BUSY: 882d9178d9SLaurent Vivier error_report("Error: HV_BUSY"); 8969e0a03cSPaolo Bonzini break; 9069e0a03cSPaolo Bonzini case HV_BAD_ARGUMENT: 912d9178d9SLaurent Vivier error_report("Error: HV_BAD_ARGUMENT"); 9269e0a03cSPaolo Bonzini break; 9369e0a03cSPaolo Bonzini case HV_NO_RESOURCES: 942d9178d9SLaurent Vivier error_report("Error: HV_NO_RESOURCES"); 9569e0a03cSPaolo Bonzini break; 9669e0a03cSPaolo Bonzini case HV_NO_DEVICE: 972d9178d9SLaurent Vivier error_report("Error: HV_NO_DEVICE"); 9869e0a03cSPaolo Bonzini break; 9969e0a03cSPaolo Bonzini case HV_UNSUPPORTED: 1002d9178d9SLaurent Vivier error_report("Error: HV_UNSUPPORTED"); 10169e0a03cSPaolo Bonzini break; 10269e0a03cSPaolo Bonzini default: 1032d9178d9SLaurent Vivier error_report("Unknown Error"); 10469e0a03cSPaolo Bonzini } 10569e0a03cSPaolo Bonzini 10669e0a03cSPaolo Bonzini abort(); 10769e0a03cSPaolo Bonzini } 10869e0a03cSPaolo Bonzini 10969e0a03cSPaolo Bonzini /* Memory slots */ 110fbafbb6dSCameron Esfahani hvf_slot *hvf_find_overlap_slot(uint64_t start, uint64_t size) 11169e0a03cSPaolo Bonzini { 11269e0a03cSPaolo Bonzini hvf_slot *slot; 11369e0a03cSPaolo Bonzini int x; 11469e0a03cSPaolo Bonzini for (x = 0; x < hvf_state->num_slots; ++x) { 11569e0a03cSPaolo Bonzini slot = &hvf_state->slots[x]; 11669e0a03cSPaolo Bonzini if (slot->size && start < (slot->start + slot->size) && 117fbafbb6dSCameron Esfahani (start + size) > slot->start) { 11869e0a03cSPaolo Bonzini return slot; 11969e0a03cSPaolo Bonzini } 12069e0a03cSPaolo Bonzini } 12169e0a03cSPaolo Bonzini return NULL; 12269e0a03cSPaolo Bonzini } 12369e0a03cSPaolo Bonzini 12469e0a03cSPaolo Bonzini struct mac_slot { 12569e0a03cSPaolo Bonzini int present; 12669e0a03cSPaolo Bonzini uint64_t size; 12769e0a03cSPaolo Bonzini uint64_t gpa_start; 12869e0a03cSPaolo Bonzini uint64_t gva; 12969e0a03cSPaolo Bonzini }; 13069e0a03cSPaolo Bonzini 13169e0a03cSPaolo Bonzini struct mac_slot mac_slots[32]; 13269e0a03cSPaolo Bonzini 133fbafbb6dSCameron Esfahani static int do_hvf_set_memory(hvf_slot *slot, hv_memory_flags_t flags) 13469e0a03cSPaolo Bonzini { 13569e0a03cSPaolo Bonzini struct mac_slot *macslot; 13669e0a03cSPaolo Bonzini hv_return_t ret; 13769e0a03cSPaolo Bonzini 13869e0a03cSPaolo Bonzini macslot = &mac_slots[slot->slot_id]; 13969e0a03cSPaolo Bonzini 14069e0a03cSPaolo Bonzini if (macslot->present) { 14169e0a03cSPaolo Bonzini if (macslot->size != slot->size) { 14269e0a03cSPaolo Bonzini macslot->present = 0; 14369e0a03cSPaolo Bonzini ret = hv_vm_unmap(macslot->gpa_start, macslot->size); 14469e0a03cSPaolo Bonzini assert_hvf_ok(ret); 14569e0a03cSPaolo Bonzini } 14669e0a03cSPaolo Bonzini } 14769e0a03cSPaolo Bonzini 14869e0a03cSPaolo Bonzini if (!slot->size) { 14969e0a03cSPaolo Bonzini return 0; 15069e0a03cSPaolo Bonzini } 15169e0a03cSPaolo Bonzini 15269e0a03cSPaolo Bonzini macslot->present = 1; 15369e0a03cSPaolo Bonzini macslot->gpa_start = slot->start; 15469e0a03cSPaolo Bonzini macslot->size = slot->size; 15569e0a03cSPaolo Bonzini ret = hv_vm_map((hv_uvaddr_t)slot->mem, slot->start, slot->size, flags); 15669e0a03cSPaolo Bonzini assert_hvf_ok(ret); 15769e0a03cSPaolo Bonzini return 0; 15869e0a03cSPaolo Bonzini } 15969e0a03cSPaolo Bonzini 16069e0a03cSPaolo Bonzini void hvf_set_phys_mem(MemoryRegionSection *section, bool add) 16169e0a03cSPaolo Bonzini { 16269e0a03cSPaolo Bonzini hvf_slot *mem; 16369e0a03cSPaolo Bonzini MemoryRegion *area = section->mr; 164fbafbb6dSCameron Esfahani bool writeable = !area->readonly && !area->rom_device; 165fbafbb6dSCameron Esfahani hv_memory_flags_t flags; 16669e0a03cSPaolo Bonzini 16769e0a03cSPaolo Bonzini if (!memory_region_is_ram(area)) { 168fbafbb6dSCameron Esfahani if (writeable) { 16969e0a03cSPaolo Bonzini return; 170fbafbb6dSCameron Esfahani } else if (!memory_region_is_romd(area)) { 171fbafbb6dSCameron Esfahani /* 172fbafbb6dSCameron Esfahani * If the memory device is not in romd_mode, then we actually want 173fbafbb6dSCameron Esfahani * to remove the hvf memory slot so all accesses will trap. 174fbafbb6dSCameron Esfahani */ 175fbafbb6dSCameron Esfahani add = false; 176fbafbb6dSCameron Esfahani } 17769e0a03cSPaolo Bonzini } 17869e0a03cSPaolo Bonzini 17969e0a03cSPaolo Bonzini mem = hvf_find_overlap_slot( 18069e0a03cSPaolo Bonzini section->offset_within_address_space, 181fbafbb6dSCameron Esfahani int128_get64(section->size)); 18269e0a03cSPaolo Bonzini 18369e0a03cSPaolo Bonzini if (mem && add) { 18469e0a03cSPaolo Bonzini if (mem->size == int128_get64(section->size) && 18569e0a03cSPaolo Bonzini mem->start == section->offset_within_address_space && 18669e0a03cSPaolo Bonzini mem->mem == (memory_region_get_ram_ptr(area) + 18769e0a03cSPaolo Bonzini section->offset_within_region)) { 18869e0a03cSPaolo Bonzini return; /* Same region was attempted to register, go away. */ 18969e0a03cSPaolo Bonzini } 19069e0a03cSPaolo Bonzini } 19169e0a03cSPaolo Bonzini 19269e0a03cSPaolo Bonzini /* Region needs to be reset. set the size to 0 and remap it. */ 19369e0a03cSPaolo Bonzini if (mem) { 19469e0a03cSPaolo Bonzini mem->size = 0; 195fbafbb6dSCameron Esfahani if (do_hvf_set_memory(mem, 0)) { 1962d9178d9SLaurent Vivier error_report("Failed to reset overlapping slot"); 19769e0a03cSPaolo Bonzini abort(); 19869e0a03cSPaolo Bonzini } 19969e0a03cSPaolo Bonzini } 20069e0a03cSPaolo Bonzini 20169e0a03cSPaolo Bonzini if (!add) { 20269e0a03cSPaolo Bonzini return; 20369e0a03cSPaolo Bonzini } 20469e0a03cSPaolo Bonzini 205fbafbb6dSCameron Esfahani if (area->readonly || 206fbafbb6dSCameron Esfahani (!memory_region_is_ram(area) && memory_region_is_romd(area))) { 207fbafbb6dSCameron Esfahani flags = HV_MEMORY_READ | HV_MEMORY_EXEC; 208fbafbb6dSCameron Esfahani } else { 209fbafbb6dSCameron Esfahani flags = HV_MEMORY_READ | HV_MEMORY_WRITE | HV_MEMORY_EXEC; 210fbafbb6dSCameron Esfahani } 211fbafbb6dSCameron Esfahani 21269e0a03cSPaolo Bonzini /* Now make a new slot. */ 21369e0a03cSPaolo Bonzini int x; 21469e0a03cSPaolo Bonzini 21569e0a03cSPaolo Bonzini for (x = 0; x < hvf_state->num_slots; ++x) { 21669e0a03cSPaolo Bonzini mem = &hvf_state->slots[x]; 21769e0a03cSPaolo Bonzini if (!mem->size) { 21869e0a03cSPaolo Bonzini break; 21969e0a03cSPaolo Bonzini } 22069e0a03cSPaolo Bonzini } 22169e0a03cSPaolo Bonzini 22269e0a03cSPaolo Bonzini if (x == hvf_state->num_slots) { 2232d9178d9SLaurent Vivier error_report("No free slots"); 22469e0a03cSPaolo Bonzini abort(); 22569e0a03cSPaolo Bonzini } 22669e0a03cSPaolo Bonzini 22769e0a03cSPaolo Bonzini mem->size = int128_get64(section->size); 22869e0a03cSPaolo Bonzini mem->mem = memory_region_get_ram_ptr(area) + section->offset_within_region; 22969e0a03cSPaolo Bonzini mem->start = section->offset_within_address_space; 23069e0a03cSPaolo Bonzini mem->region = area; 23169e0a03cSPaolo Bonzini 232fbafbb6dSCameron Esfahani if (do_hvf_set_memory(mem, flags)) { 2332d9178d9SLaurent Vivier error_report("Error registering new memory slot"); 23469e0a03cSPaolo Bonzini abort(); 23569e0a03cSPaolo Bonzini } 23669e0a03cSPaolo Bonzini } 23769e0a03cSPaolo Bonzini 23869e0a03cSPaolo Bonzini void vmx_update_tpr(CPUState *cpu) 23969e0a03cSPaolo Bonzini { 24069e0a03cSPaolo Bonzini /* TODO: need integrate APIC handling */ 24169e0a03cSPaolo Bonzini X86CPU *x86_cpu = X86_CPU(cpu); 24269e0a03cSPaolo Bonzini int tpr = cpu_get_apic_tpr(x86_cpu->apic_state) << 4; 24369e0a03cSPaolo Bonzini int irr = apic_get_highest_priority_irr(x86_cpu->apic_state); 24469e0a03cSPaolo Bonzini 24569e0a03cSPaolo Bonzini wreg(cpu->hvf_fd, HV_X86_TPR, tpr); 24669e0a03cSPaolo Bonzini if (irr == -1) { 24769e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_TPR_THRESHOLD, 0); 24869e0a03cSPaolo Bonzini } else { 24969e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_TPR_THRESHOLD, (irr > tpr) ? tpr >> 4 : 25069e0a03cSPaolo Bonzini irr >> 4); 25169e0a03cSPaolo Bonzini } 25269e0a03cSPaolo Bonzini } 25369e0a03cSPaolo Bonzini 25469e0a03cSPaolo Bonzini void update_apic_tpr(CPUState *cpu) 25569e0a03cSPaolo Bonzini { 25669e0a03cSPaolo Bonzini X86CPU *x86_cpu = X86_CPU(cpu); 25769e0a03cSPaolo Bonzini int tpr = rreg(cpu->hvf_fd, HV_X86_TPR) >> 4; 25869e0a03cSPaolo Bonzini cpu_set_apic_tpr(x86_cpu->apic_state, tpr); 25969e0a03cSPaolo Bonzini } 26069e0a03cSPaolo Bonzini 26169e0a03cSPaolo Bonzini #define VECTORING_INFO_VECTOR_MASK 0xff 26269e0a03cSPaolo Bonzini 26369e0a03cSPaolo Bonzini static void hvf_handle_interrupt(CPUState * cpu, int mask) 26469e0a03cSPaolo Bonzini { 26569e0a03cSPaolo Bonzini cpu->interrupt_request |= mask; 26669e0a03cSPaolo Bonzini if (!qemu_cpu_is_self(cpu)) { 26769e0a03cSPaolo Bonzini qemu_cpu_kick(cpu); 26869e0a03cSPaolo Bonzini } 26969e0a03cSPaolo Bonzini } 27069e0a03cSPaolo Bonzini 27169e0a03cSPaolo Bonzini void hvf_handle_io(CPUArchState *env, uint16_t port, void *buffer, 27269e0a03cSPaolo Bonzini int direction, int size, int count) 27369e0a03cSPaolo Bonzini { 27469e0a03cSPaolo Bonzini int i; 27569e0a03cSPaolo Bonzini uint8_t *ptr = buffer; 27669e0a03cSPaolo Bonzini 27769e0a03cSPaolo Bonzini for (i = 0; i < count; i++) { 27869e0a03cSPaolo Bonzini address_space_rw(&address_space_io, port, MEMTXATTRS_UNSPECIFIED, 27969e0a03cSPaolo Bonzini ptr, size, 28069e0a03cSPaolo Bonzini direction); 28169e0a03cSPaolo Bonzini ptr += size; 28269e0a03cSPaolo Bonzini } 28369e0a03cSPaolo Bonzini } 28469e0a03cSPaolo Bonzini 28569e0a03cSPaolo Bonzini /* TODO: synchronize vcpu state */ 28669e0a03cSPaolo Bonzini static void do_hvf_cpu_synchronize_state(CPUState *cpu, run_on_cpu_data arg) 28769e0a03cSPaolo Bonzini { 28869e0a03cSPaolo Bonzini CPUState *cpu_state = cpu; 28969e0a03cSPaolo Bonzini if (cpu_state->vcpu_dirty == 0) { 29069e0a03cSPaolo Bonzini hvf_get_registers(cpu_state); 29169e0a03cSPaolo Bonzini } 29269e0a03cSPaolo Bonzini 29369e0a03cSPaolo Bonzini cpu_state->vcpu_dirty = 1; 29469e0a03cSPaolo Bonzini } 29569e0a03cSPaolo Bonzini 29669e0a03cSPaolo Bonzini void hvf_cpu_synchronize_state(CPUState *cpu_state) 29769e0a03cSPaolo Bonzini { 29869e0a03cSPaolo Bonzini if (cpu_state->vcpu_dirty == 0) { 29969e0a03cSPaolo Bonzini run_on_cpu(cpu_state, do_hvf_cpu_synchronize_state, RUN_ON_CPU_NULL); 30069e0a03cSPaolo Bonzini } 30169e0a03cSPaolo Bonzini } 30269e0a03cSPaolo Bonzini 30369e0a03cSPaolo Bonzini static void do_hvf_cpu_synchronize_post_reset(CPUState *cpu, run_on_cpu_data arg) 30469e0a03cSPaolo Bonzini { 30569e0a03cSPaolo Bonzini CPUState *cpu_state = cpu; 30669e0a03cSPaolo Bonzini hvf_put_registers(cpu_state); 30769e0a03cSPaolo Bonzini cpu_state->vcpu_dirty = false; 30869e0a03cSPaolo Bonzini } 30969e0a03cSPaolo Bonzini 31069e0a03cSPaolo Bonzini void hvf_cpu_synchronize_post_reset(CPUState *cpu_state) 31169e0a03cSPaolo Bonzini { 31269e0a03cSPaolo Bonzini run_on_cpu(cpu_state, do_hvf_cpu_synchronize_post_reset, RUN_ON_CPU_NULL); 31369e0a03cSPaolo Bonzini } 31469e0a03cSPaolo Bonzini 31569e0a03cSPaolo Bonzini void _hvf_cpu_synchronize_post_init(CPUState *cpu, run_on_cpu_data arg) 31669e0a03cSPaolo Bonzini { 31769e0a03cSPaolo Bonzini CPUState *cpu_state = cpu; 31869e0a03cSPaolo Bonzini hvf_put_registers(cpu_state); 31969e0a03cSPaolo Bonzini cpu_state->vcpu_dirty = false; 32069e0a03cSPaolo Bonzini } 32169e0a03cSPaolo Bonzini 32269e0a03cSPaolo Bonzini void hvf_cpu_synchronize_post_init(CPUState *cpu_state) 32369e0a03cSPaolo Bonzini { 32469e0a03cSPaolo Bonzini run_on_cpu(cpu_state, _hvf_cpu_synchronize_post_init, RUN_ON_CPU_NULL); 32569e0a03cSPaolo Bonzini } 32669e0a03cSPaolo Bonzini 327ff2de166SPaolo Bonzini static bool ept_emulation_fault(hvf_slot *slot, uint64_t gpa, uint64_t ept_qual) 32869e0a03cSPaolo Bonzini { 32969e0a03cSPaolo Bonzini int read, write; 33069e0a03cSPaolo Bonzini 33169e0a03cSPaolo Bonzini /* EPT fault on an instruction fetch doesn't make sense here */ 33269e0a03cSPaolo Bonzini if (ept_qual & EPT_VIOLATION_INST_FETCH) { 33369e0a03cSPaolo Bonzini return false; 33469e0a03cSPaolo Bonzini } 33569e0a03cSPaolo Bonzini 33669e0a03cSPaolo Bonzini /* EPT fault must be a read fault or a write fault */ 33769e0a03cSPaolo Bonzini read = ept_qual & EPT_VIOLATION_DATA_READ ? 1 : 0; 33869e0a03cSPaolo Bonzini write = ept_qual & EPT_VIOLATION_DATA_WRITE ? 1 : 0; 33969e0a03cSPaolo Bonzini if ((read | write) == 0) { 34069e0a03cSPaolo Bonzini return false; 34169e0a03cSPaolo Bonzini } 34269e0a03cSPaolo Bonzini 34369e0a03cSPaolo Bonzini if (write && slot) { 34469e0a03cSPaolo Bonzini if (slot->flags & HVF_SLOT_LOG) { 34569e0a03cSPaolo Bonzini memory_region_set_dirty(slot->region, gpa - slot->start, 1); 34669e0a03cSPaolo Bonzini hv_vm_protect((hv_gpaddr_t)slot->start, (size_t)slot->size, 34769e0a03cSPaolo Bonzini HV_MEMORY_READ | HV_MEMORY_WRITE); 34869e0a03cSPaolo Bonzini } 34969e0a03cSPaolo Bonzini } 35069e0a03cSPaolo Bonzini 35169e0a03cSPaolo Bonzini /* 35269e0a03cSPaolo Bonzini * The EPT violation must have been caused by accessing a 35369e0a03cSPaolo Bonzini * guest-physical address that is a translation of a guest-linear 35469e0a03cSPaolo Bonzini * address. 35569e0a03cSPaolo Bonzini */ 35669e0a03cSPaolo Bonzini if ((ept_qual & EPT_VIOLATION_GLA_VALID) == 0 || 35769e0a03cSPaolo Bonzini (ept_qual & EPT_VIOLATION_XLAT_VALID) == 0) { 35869e0a03cSPaolo Bonzini return false; 35969e0a03cSPaolo Bonzini } 36069e0a03cSPaolo Bonzini 361fbafbb6dSCameron Esfahani if (!slot) { 362fbafbb6dSCameron Esfahani return true; 363fbafbb6dSCameron Esfahani } 364fbafbb6dSCameron Esfahani if (!memory_region_is_ram(slot->region) && 365fbafbb6dSCameron Esfahani !(read && memory_region_is_romd(slot->region))) { 366fbafbb6dSCameron Esfahani return true; 367fbafbb6dSCameron Esfahani } 368fbafbb6dSCameron Esfahani return false; 36969e0a03cSPaolo Bonzini } 37069e0a03cSPaolo Bonzini 37169e0a03cSPaolo Bonzini static void hvf_set_dirty_tracking(MemoryRegionSection *section, bool on) 37269e0a03cSPaolo Bonzini { 37369e0a03cSPaolo Bonzini hvf_slot *slot; 37469e0a03cSPaolo Bonzini 37569e0a03cSPaolo Bonzini slot = hvf_find_overlap_slot( 37669e0a03cSPaolo Bonzini section->offset_within_address_space, 377fbafbb6dSCameron Esfahani int128_get64(section->size)); 37869e0a03cSPaolo Bonzini 37969e0a03cSPaolo Bonzini /* protect region against writes; begin tracking it */ 38069e0a03cSPaolo Bonzini if (on) { 38169e0a03cSPaolo Bonzini slot->flags |= HVF_SLOT_LOG; 38269e0a03cSPaolo Bonzini hv_vm_protect((hv_gpaddr_t)slot->start, (size_t)slot->size, 38369e0a03cSPaolo Bonzini HV_MEMORY_READ); 38469e0a03cSPaolo Bonzini /* stop tracking region*/ 38569e0a03cSPaolo Bonzini } else { 38669e0a03cSPaolo Bonzini slot->flags &= ~HVF_SLOT_LOG; 38769e0a03cSPaolo Bonzini hv_vm_protect((hv_gpaddr_t)slot->start, (size_t)slot->size, 38869e0a03cSPaolo Bonzini HV_MEMORY_READ | HV_MEMORY_WRITE); 38969e0a03cSPaolo Bonzini } 39069e0a03cSPaolo Bonzini } 39169e0a03cSPaolo Bonzini 39269e0a03cSPaolo Bonzini static void hvf_log_start(MemoryListener *listener, 39369e0a03cSPaolo Bonzini MemoryRegionSection *section, int old, int new) 39469e0a03cSPaolo Bonzini { 39569e0a03cSPaolo Bonzini if (old != 0) { 39669e0a03cSPaolo Bonzini return; 39769e0a03cSPaolo Bonzini } 39869e0a03cSPaolo Bonzini 39969e0a03cSPaolo Bonzini hvf_set_dirty_tracking(section, 1); 40069e0a03cSPaolo Bonzini } 40169e0a03cSPaolo Bonzini 40269e0a03cSPaolo Bonzini static void hvf_log_stop(MemoryListener *listener, 40369e0a03cSPaolo Bonzini MemoryRegionSection *section, int old, int new) 40469e0a03cSPaolo Bonzini { 40569e0a03cSPaolo Bonzini if (new != 0) { 40669e0a03cSPaolo Bonzini return; 40769e0a03cSPaolo Bonzini } 40869e0a03cSPaolo Bonzini 40969e0a03cSPaolo Bonzini hvf_set_dirty_tracking(section, 0); 41069e0a03cSPaolo Bonzini } 41169e0a03cSPaolo Bonzini 41269e0a03cSPaolo Bonzini static void hvf_log_sync(MemoryListener *listener, 41369e0a03cSPaolo Bonzini MemoryRegionSection *section) 41469e0a03cSPaolo Bonzini { 41569e0a03cSPaolo Bonzini /* 41669e0a03cSPaolo Bonzini * sync of dirty pages is handled elsewhere; just make sure we keep 41769e0a03cSPaolo Bonzini * tracking the region. 41869e0a03cSPaolo Bonzini */ 41969e0a03cSPaolo Bonzini hvf_set_dirty_tracking(section, 1); 42069e0a03cSPaolo Bonzini } 42169e0a03cSPaolo Bonzini 42269e0a03cSPaolo Bonzini static void hvf_region_add(MemoryListener *listener, 42369e0a03cSPaolo Bonzini MemoryRegionSection *section) 42469e0a03cSPaolo Bonzini { 42569e0a03cSPaolo Bonzini hvf_set_phys_mem(section, true); 42669e0a03cSPaolo Bonzini } 42769e0a03cSPaolo Bonzini 42869e0a03cSPaolo Bonzini static void hvf_region_del(MemoryListener *listener, 42969e0a03cSPaolo Bonzini MemoryRegionSection *section) 43069e0a03cSPaolo Bonzini { 43169e0a03cSPaolo Bonzini hvf_set_phys_mem(section, false); 43269e0a03cSPaolo Bonzini } 43369e0a03cSPaolo Bonzini 43469e0a03cSPaolo Bonzini static MemoryListener hvf_memory_listener = { 43569e0a03cSPaolo Bonzini .priority = 10, 43669e0a03cSPaolo Bonzini .region_add = hvf_region_add, 43769e0a03cSPaolo Bonzini .region_del = hvf_region_del, 43869e0a03cSPaolo Bonzini .log_start = hvf_log_start, 43969e0a03cSPaolo Bonzini .log_stop = hvf_log_stop, 44069e0a03cSPaolo Bonzini .log_sync = hvf_log_sync, 44169e0a03cSPaolo Bonzini }; 44269e0a03cSPaolo Bonzini 44369e0a03cSPaolo Bonzini void hvf_reset_vcpu(CPUState *cpu) { 444*e37aa8b0SCameron Esfahani uint64_t pdpte[4] = {0, 0, 0, 0}; 445*e37aa8b0SCameron Esfahani int i; 44669e0a03cSPaolo Bonzini 44769e0a03cSPaolo Bonzini /* TODO: this shouldn't be needed; there is already a call to 44869e0a03cSPaolo Bonzini * cpu_synchronize_all_post_reset in vl.c 44969e0a03cSPaolo Bonzini */ 45069e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_ENTRY_CTLS, 0); 45169e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_IA32_EFER, 0); 452*e37aa8b0SCameron Esfahani 453*e37aa8b0SCameron Esfahani /* Initialize PDPTE */ 454*e37aa8b0SCameron Esfahani for (i = 0; i < 4; i++) { 455*e37aa8b0SCameron Esfahani wvmcs(cpu->hvf_fd, VMCS_GUEST_PDPTE0 + i * 2, pdpte[i]); 456*e37aa8b0SCameron Esfahani } 457*e37aa8b0SCameron Esfahani 45869e0a03cSPaolo Bonzini macvm_set_cr0(cpu->hvf_fd, 0x60000010); 45969e0a03cSPaolo Bonzini 46069e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_CR4_MASK, CR4_VMXE_MASK); 46169e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_CR4_SHADOW, 0x0); 46269e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_CR4, CR4_VMXE_MASK); 46369e0a03cSPaolo Bonzini 46469e0a03cSPaolo Bonzini /* set VMCS guest state fields */ 46569e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_CS_SELECTOR, 0xf000); 46669e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_CS_LIMIT, 0xffff); 46769e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_CS_ACCESS_RIGHTS, 0x9b); 46869e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_CS_BASE, 0xffff0000); 46969e0a03cSPaolo Bonzini 47069e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_DS_SELECTOR, 0); 47169e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_DS_LIMIT, 0xffff); 47269e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_DS_ACCESS_RIGHTS, 0x93); 47369e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_DS_BASE, 0); 47469e0a03cSPaolo Bonzini 47569e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_ES_SELECTOR, 0); 47669e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_ES_LIMIT, 0xffff); 47769e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_ES_ACCESS_RIGHTS, 0x93); 47869e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_ES_BASE, 0); 47969e0a03cSPaolo Bonzini 48069e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_FS_SELECTOR, 0); 48169e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_FS_LIMIT, 0xffff); 48269e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_FS_ACCESS_RIGHTS, 0x93); 48369e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_FS_BASE, 0); 48469e0a03cSPaolo Bonzini 48569e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_GS_SELECTOR, 0); 48669e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_GS_LIMIT, 0xffff); 48769e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_GS_ACCESS_RIGHTS, 0x93); 48869e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_GS_BASE, 0); 48969e0a03cSPaolo Bonzini 49069e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_SS_SELECTOR, 0); 49169e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_SS_LIMIT, 0xffff); 49269e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_SS_ACCESS_RIGHTS, 0x93); 49369e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_SS_BASE, 0); 49469e0a03cSPaolo Bonzini 49569e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_LDTR_SELECTOR, 0); 49669e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_LDTR_LIMIT, 0); 49769e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_LDTR_ACCESS_RIGHTS, 0x10000); 49869e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_LDTR_BASE, 0); 49969e0a03cSPaolo Bonzini 50069e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_TR_SELECTOR, 0); 50169e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_TR_LIMIT, 0); 50269e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_TR_ACCESS_RIGHTS, 0x83); 50369e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_TR_BASE, 0); 50469e0a03cSPaolo Bonzini 50569e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_GDTR_LIMIT, 0); 50669e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_GDTR_BASE, 0); 50769e0a03cSPaolo Bonzini 50869e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_IDTR_LIMIT, 0); 50969e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_IDTR_BASE, 0); 51069e0a03cSPaolo Bonzini 51169e0a03cSPaolo Bonzini /*wvmcs(cpu->hvf_fd, VMCS_GUEST_CR2, 0x0);*/ 51269e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_GUEST_CR3, 0x0); 51369e0a03cSPaolo Bonzini 51469e0a03cSPaolo Bonzini wreg(cpu->hvf_fd, HV_X86_RIP, 0xfff0); 51569e0a03cSPaolo Bonzini wreg(cpu->hvf_fd, HV_X86_RDX, 0x623); 51669e0a03cSPaolo Bonzini wreg(cpu->hvf_fd, HV_X86_RFLAGS, 0x2); 51769e0a03cSPaolo Bonzini wreg(cpu->hvf_fd, HV_X86_RSP, 0x0); 51869e0a03cSPaolo Bonzini wreg(cpu->hvf_fd, HV_X86_RAX, 0x0); 51969e0a03cSPaolo Bonzini wreg(cpu->hvf_fd, HV_X86_RBX, 0x0); 52069e0a03cSPaolo Bonzini wreg(cpu->hvf_fd, HV_X86_RCX, 0x0); 52169e0a03cSPaolo Bonzini wreg(cpu->hvf_fd, HV_X86_RSI, 0x0); 52269e0a03cSPaolo Bonzini wreg(cpu->hvf_fd, HV_X86_RDI, 0x0); 52369e0a03cSPaolo Bonzini wreg(cpu->hvf_fd, HV_X86_RBP, 0x0); 52469e0a03cSPaolo Bonzini 52569e0a03cSPaolo Bonzini for (int i = 0; i < 8; i++) { 52669e0a03cSPaolo Bonzini wreg(cpu->hvf_fd, HV_X86_R8 + i, 0x0); 52769e0a03cSPaolo Bonzini } 52869e0a03cSPaolo Bonzini 52969e0a03cSPaolo Bonzini hv_vcpu_invalidate_tlb(cpu->hvf_fd); 53069e0a03cSPaolo Bonzini hv_vcpu_flush(cpu->hvf_fd); 53169e0a03cSPaolo Bonzini } 53269e0a03cSPaolo Bonzini 53369e0a03cSPaolo Bonzini void hvf_vcpu_destroy(CPUState *cpu) 53469e0a03cSPaolo Bonzini { 53569e0a03cSPaolo Bonzini hv_return_t ret = hv_vcpu_destroy((hv_vcpuid_t)cpu->hvf_fd); 53669e0a03cSPaolo Bonzini assert_hvf_ok(ret); 53769e0a03cSPaolo Bonzini } 53869e0a03cSPaolo Bonzini 53969e0a03cSPaolo Bonzini static void dummy_signal(int sig) 54069e0a03cSPaolo Bonzini { 54169e0a03cSPaolo Bonzini } 54269e0a03cSPaolo Bonzini 54369e0a03cSPaolo Bonzini int hvf_init_vcpu(CPUState *cpu) 54469e0a03cSPaolo Bonzini { 54569e0a03cSPaolo Bonzini 54669e0a03cSPaolo Bonzini X86CPU *x86cpu = X86_CPU(cpu); 54769e0a03cSPaolo Bonzini CPUX86State *env = &x86cpu->env; 54869e0a03cSPaolo Bonzini int r; 54969e0a03cSPaolo Bonzini 55069e0a03cSPaolo Bonzini /* init cpu signals */ 55169e0a03cSPaolo Bonzini sigset_t set; 55269e0a03cSPaolo Bonzini struct sigaction sigact; 55369e0a03cSPaolo Bonzini 55469e0a03cSPaolo Bonzini memset(&sigact, 0, sizeof(sigact)); 55569e0a03cSPaolo Bonzini sigact.sa_handler = dummy_signal; 55669e0a03cSPaolo Bonzini sigaction(SIG_IPI, &sigact, NULL); 55769e0a03cSPaolo Bonzini 55869e0a03cSPaolo Bonzini pthread_sigmask(SIG_BLOCK, NULL, &set); 55969e0a03cSPaolo Bonzini sigdelset(&set, SIG_IPI); 56069e0a03cSPaolo Bonzini 56169e0a03cSPaolo Bonzini init_emu(); 56269e0a03cSPaolo Bonzini init_decoder(); 56369e0a03cSPaolo Bonzini 56469e0a03cSPaolo Bonzini hvf_state->hvf_caps = g_new0(struct hvf_vcpu_caps, 1); 56569e0a03cSPaolo Bonzini env->hvf_emul = g_new0(HVFX86EmulatorState, 1); 56669e0a03cSPaolo Bonzini 56769e0a03cSPaolo Bonzini r = hv_vcpu_create((hv_vcpuid_t *)&cpu->hvf_fd, HV_VCPU_DEFAULT); 56869e0a03cSPaolo Bonzini cpu->vcpu_dirty = 1; 56969e0a03cSPaolo Bonzini assert_hvf_ok(r); 57069e0a03cSPaolo Bonzini 57169e0a03cSPaolo Bonzini if (hv_vmx_read_capability(HV_VMX_CAP_PINBASED, 57269e0a03cSPaolo Bonzini &hvf_state->hvf_caps->vmx_cap_pinbased)) { 57369e0a03cSPaolo Bonzini abort(); 57469e0a03cSPaolo Bonzini } 57569e0a03cSPaolo Bonzini if (hv_vmx_read_capability(HV_VMX_CAP_PROCBASED, 57669e0a03cSPaolo Bonzini &hvf_state->hvf_caps->vmx_cap_procbased)) { 57769e0a03cSPaolo Bonzini abort(); 57869e0a03cSPaolo Bonzini } 57969e0a03cSPaolo Bonzini if (hv_vmx_read_capability(HV_VMX_CAP_PROCBASED2, 58069e0a03cSPaolo Bonzini &hvf_state->hvf_caps->vmx_cap_procbased2)) { 58169e0a03cSPaolo Bonzini abort(); 58269e0a03cSPaolo Bonzini } 58369e0a03cSPaolo Bonzini if (hv_vmx_read_capability(HV_VMX_CAP_ENTRY, 58469e0a03cSPaolo Bonzini &hvf_state->hvf_caps->vmx_cap_entry)) { 58569e0a03cSPaolo Bonzini abort(); 58669e0a03cSPaolo Bonzini } 58769e0a03cSPaolo Bonzini 58869e0a03cSPaolo Bonzini /* set VMCS control fields */ 58969e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_PIN_BASED_CTLS, 59069e0a03cSPaolo Bonzini cap2ctrl(hvf_state->hvf_caps->vmx_cap_pinbased, 59169e0a03cSPaolo Bonzini VMCS_PIN_BASED_CTLS_EXTINT | 59269e0a03cSPaolo Bonzini VMCS_PIN_BASED_CTLS_NMI | 59369e0a03cSPaolo Bonzini VMCS_PIN_BASED_CTLS_VNMI)); 59469e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS, 59569e0a03cSPaolo Bonzini cap2ctrl(hvf_state->hvf_caps->vmx_cap_procbased, 59669e0a03cSPaolo Bonzini VMCS_PRI_PROC_BASED_CTLS_HLT | 59769e0a03cSPaolo Bonzini VMCS_PRI_PROC_BASED_CTLS_MWAIT | 59869e0a03cSPaolo Bonzini VMCS_PRI_PROC_BASED_CTLS_TSC_OFFSET | 59969e0a03cSPaolo Bonzini VMCS_PRI_PROC_BASED_CTLS_TPR_SHADOW) | 60069e0a03cSPaolo Bonzini VMCS_PRI_PROC_BASED_CTLS_SEC_CONTROL); 60169e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_SEC_PROC_BASED_CTLS, 60269e0a03cSPaolo Bonzini cap2ctrl(hvf_state->hvf_caps->vmx_cap_procbased2, 60369e0a03cSPaolo Bonzini VMCS_PRI_PROC_BASED2_CTLS_APIC_ACCESSES)); 60469e0a03cSPaolo Bonzini 60569e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_ENTRY_CTLS, cap2ctrl(hvf_state->hvf_caps->vmx_cap_entry, 60669e0a03cSPaolo Bonzini 0)); 60769e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_EXCEPTION_BITMAP, 0); /* Double fault */ 60869e0a03cSPaolo Bonzini 60969e0a03cSPaolo Bonzini wvmcs(cpu->hvf_fd, VMCS_TPR_THRESHOLD, 0); 61069e0a03cSPaolo Bonzini 61169e0a03cSPaolo Bonzini x86cpu = X86_CPU(cpu); 6125b8063c4SLiran Alon x86cpu->env.xsave_buf = qemu_memalign(4096, 4096); 61369e0a03cSPaolo Bonzini 61469e0a03cSPaolo Bonzini hv_vcpu_enable_native_msr(cpu->hvf_fd, MSR_STAR, 1); 61569e0a03cSPaolo Bonzini hv_vcpu_enable_native_msr(cpu->hvf_fd, MSR_LSTAR, 1); 61669e0a03cSPaolo Bonzini hv_vcpu_enable_native_msr(cpu->hvf_fd, MSR_CSTAR, 1); 61769e0a03cSPaolo Bonzini hv_vcpu_enable_native_msr(cpu->hvf_fd, MSR_FMASK, 1); 61869e0a03cSPaolo Bonzini hv_vcpu_enable_native_msr(cpu->hvf_fd, MSR_FSBASE, 1); 61969e0a03cSPaolo Bonzini hv_vcpu_enable_native_msr(cpu->hvf_fd, MSR_GSBASE, 1); 62069e0a03cSPaolo Bonzini hv_vcpu_enable_native_msr(cpu->hvf_fd, MSR_KERNELGSBASE, 1); 62169e0a03cSPaolo Bonzini hv_vcpu_enable_native_msr(cpu->hvf_fd, MSR_TSC_AUX, 1); 6229fedbbeeSCameron Esfahani hv_vcpu_enable_native_msr(cpu->hvf_fd, MSR_IA32_TSC, 1); 62369e0a03cSPaolo Bonzini hv_vcpu_enable_native_msr(cpu->hvf_fd, MSR_IA32_SYSENTER_CS, 1); 62469e0a03cSPaolo Bonzini hv_vcpu_enable_native_msr(cpu->hvf_fd, MSR_IA32_SYSENTER_EIP, 1); 62569e0a03cSPaolo Bonzini hv_vcpu_enable_native_msr(cpu->hvf_fd, MSR_IA32_SYSENTER_ESP, 1); 62669e0a03cSPaolo Bonzini 62769e0a03cSPaolo Bonzini return 0; 62869e0a03cSPaolo Bonzini } 62969e0a03cSPaolo Bonzini 63069e0a03cSPaolo Bonzini static void hvf_store_events(CPUState *cpu, uint32_t ins_len, uint64_t idtvec_info) 63169e0a03cSPaolo Bonzini { 63269e0a03cSPaolo Bonzini X86CPU *x86_cpu = X86_CPU(cpu); 63369e0a03cSPaolo Bonzini CPUX86State *env = &x86_cpu->env; 63469e0a03cSPaolo Bonzini 635fd13f23bSLiran Alon env->exception_nr = -1; 636fd13f23bSLiran Alon env->exception_pending = 0; 637fd13f23bSLiran Alon env->exception_injected = 0; 63869e0a03cSPaolo Bonzini env->interrupt_injected = -1; 63969e0a03cSPaolo Bonzini env->nmi_injected = false; 64069e0a03cSPaolo Bonzini if (idtvec_info & VMCS_IDT_VEC_VALID) { 64169e0a03cSPaolo Bonzini switch (idtvec_info & VMCS_IDT_VEC_TYPE) { 64269e0a03cSPaolo Bonzini case VMCS_IDT_VEC_HWINTR: 64369e0a03cSPaolo Bonzini case VMCS_IDT_VEC_SWINTR: 64469e0a03cSPaolo Bonzini env->interrupt_injected = idtvec_info & VMCS_IDT_VEC_VECNUM; 64569e0a03cSPaolo Bonzini break; 64669e0a03cSPaolo Bonzini case VMCS_IDT_VEC_NMI: 64769e0a03cSPaolo Bonzini env->nmi_injected = true; 64869e0a03cSPaolo Bonzini break; 64969e0a03cSPaolo Bonzini case VMCS_IDT_VEC_HWEXCEPTION: 65069e0a03cSPaolo Bonzini case VMCS_IDT_VEC_SWEXCEPTION: 651fd13f23bSLiran Alon env->exception_nr = idtvec_info & VMCS_IDT_VEC_VECNUM; 652fd13f23bSLiran Alon env->exception_injected = 1; 65369e0a03cSPaolo Bonzini break; 65469e0a03cSPaolo Bonzini case VMCS_IDT_VEC_PRIV_SWEXCEPTION: 65569e0a03cSPaolo Bonzini default: 65669e0a03cSPaolo Bonzini abort(); 65769e0a03cSPaolo Bonzini } 65869e0a03cSPaolo Bonzini if ((idtvec_info & VMCS_IDT_VEC_TYPE) == VMCS_IDT_VEC_SWEXCEPTION || 65969e0a03cSPaolo Bonzini (idtvec_info & VMCS_IDT_VEC_TYPE) == VMCS_IDT_VEC_SWINTR) { 66069e0a03cSPaolo Bonzini env->ins_len = ins_len; 66169e0a03cSPaolo Bonzini } 66269e0a03cSPaolo Bonzini if (idtvec_info & VMCS_INTR_DEL_ERRCODE) { 66369e0a03cSPaolo Bonzini env->has_error_code = true; 66469e0a03cSPaolo Bonzini env->error_code = rvmcs(cpu->hvf_fd, VMCS_IDT_VECTORING_ERROR); 66569e0a03cSPaolo Bonzini } 66669e0a03cSPaolo Bonzini } 66769e0a03cSPaolo Bonzini if ((rvmcs(cpu->hvf_fd, VMCS_GUEST_INTERRUPTIBILITY) & 66869e0a03cSPaolo Bonzini VMCS_INTERRUPTIBILITY_NMI_BLOCKING)) { 66969e0a03cSPaolo Bonzini env->hflags2 |= HF2_NMI_MASK; 67069e0a03cSPaolo Bonzini } else { 67169e0a03cSPaolo Bonzini env->hflags2 &= ~HF2_NMI_MASK; 67269e0a03cSPaolo Bonzini } 67369e0a03cSPaolo Bonzini if (rvmcs(cpu->hvf_fd, VMCS_GUEST_INTERRUPTIBILITY) & 67469e0a03cSPaolo Bonzini (VMCS_INTERRUPTIBILITY_STI_BLOCKING | 67569e0a03cSPaolo Bonzini VMCS_INTERRUPTIBILITY_MOVSS_BLOCKING)) { 67669e0a03cSPaolo Bonzini env->hflags |= HF_INHIBIT_IRQ_MASK; 67769e0a03cSPaolo Bonzini } else { 67869e0a03cSPaolo Bonzini env->hflags &= ~HF_INHIBIT_IRQ_MASK; 67969e0a03cSPaolo Bonzini } 68069e0a03cSPaolo Bonzini } 68169e0a03cSPaolo Bonzini 68269e0a03cSPaolo Bonzini int hvf_vcpu_exec(CPUState *cpu) 68369e0a03cSPaolo Bonzini { 68469e0a03cSPaolo Bonzini X86CPU *x86_cpu = X86_CPU(cpu); 68569e0a03cSPaolo Bonzini CPUX86State *env = &x86_cpu->env; 68669e0a03cSPaolo Bonzini int ret = 0; 68769e0a03cSPaolo Bonzini uint64_t rip = 0; 68869e0a03cSPaolo Bonzini 68969e0a03cSPaolo Bonzini if (hvf_process_events(cpu)) { 69069e0a03cSPaolo Bonzini return EXCP_HLT; 69169e0a03cSPaolo Bonzini } 69269e0a03cSPaolo Bonzini 69369e0a03cSPaolo Bonzini do { 69469e0a03cSPaolo Bonzini if (cpu->vcpu_dirty) { 69569e0a03cSPaolo Bonzini hvf_put_registers(cpu); 69669e0a03cSPaolo Bonzini cpu->vcpu_dirty = false; 69769e0a03cSPaolo Bonzini } 69869e0a03cSPaolo Bonzini 69969e0a03cSPaolo Bonzini if (hvf_inject_interrupts(cpu)) { 70069e0a03cSPaolo Bonzini return EXCP_INTERRUPT; 70169e0a03cSPaolo Bonzini } 70269e0a03cSPaolo Bonzini vmx_update_tpr(cpu); 70369e0a03cSPaolo Bonzini 70469e0a03cSPaolo Bonzini qemu_mutex_unlock_iothread(); 70569e0a03cSPaolo Bonzini if (!cpu_is_bsp(X86_CPU(cpu)) && cpu->halted) { 70669e0a03cSPaolo Bonzini qemu_mutex_lock_iothread(); 70769e0a03cSPaolo Bonzini return EXCP_HLT; 70869e0a03cSPaolo Bonzini } 70969e0a03cSPaolo Bonzini 71069e0a03cSPaolo Bonzini hv_return_t r = hv_vcpu_run(cpu->hvf_fd); 71169e0a03cSPaolo Bonzini assert_hvf_ok(r); 71269e0a03cSPaolo Bonzini 71369e0a03cSPaolo Bonzini /* handle VMEXIT */ 71469e0a03cSPaolo Bonzini uint64_t exit_reason = rvmcs(cpu->hvf_fd, VMCS_EXIT_REASON); 71569e0a03cSPaolo Bonzini uint64_t exit_qual = rvmcs(cpu->hvf_fd, VMCS_EXIT_QUALIFICATION); 71669e0a03cSPaolo Bonzini uint32_t ins_len = (uint32_t)rvmcs(cpu->hvf_fd, 71769e0a03cSPaolo Bonzini VMCS_EXIT_INSTRUCTION_LENGTH); 71869e0a03cSPaolo Bonzini 71969e0a03cSPaolo Bonzini uint64_t idtvec_info = rvmcs(cpu->hvf_fd, VMCS_IDT_VECTORING_INFO); 72069e0a03cSPaolo Bonzini 72169e0a03cSPaolo Bonzini hvf_store_events(cpu, ins_len, idtvec_info); 72269e0a03cSPaolo Bonzini rip = rreg(cpu->hvf_fd, HV_X86_RIP); 72369e0a03cSPaolo Bonzini RFLAGS(env) = rreg(cpu->hvf_fd, HV_X86_RFLAGS); 72469e0a03cSPaolo Bonzini env->eflags = RFLAGS(env); 72569e0a03cSPaolo Bonzini 72669e0a03cSPaolo Bonzini qemu_mutex_lock_iothread(); 72769e0a03cSPaolo Bonzini 72869e0a03cSPaolo Bonzini update_apic_tpr(cpu); 72969e0a03cSPaolo Bonzini current_cpu = cpu; 73069e0a03cSPaolo Bonzini 73169e0a03cSPaolo Bonzini ret = 0; 73269e0a03cSPaolo Bonzini switch (exit_reason) { 73369e0a03cSPaolo Bonzini case EXIT_REASON_HLT: { 73469e0a03cSPaolo Bonzini macvm_set_rip(cpu, rip + ins_len); 73569e0a03cSPaolo Bonzini if (!((cpu->interrupt_request & CPU_INTERRUPT_HARD) && 73669e0a03cSPaolo Bonzini (EFLAGS(env) & IF_MASK)) 73769e0a03cSPaolo Bonzini && !(cpu->interrupt_request & CPU_INTERRUPT_NMI) && 73869e0a03cSPaolo Bonzini !(idtvec_info & VMCS_IDT_VEC_VALID)) { 73969e0a03cSPaolo Bonzini cpu->halted = 1; 74069e0a03cSPaolo Bonzini ret = EXCP_HLT; 7413b9c59daSChen Zhang break; 74269e0a03cSPaolo Bonzini } 74369e0a03cSPaolo Bonzini ret = EXCP_INTERRUPT; 74469e0a03cSPaolo Bonzini break; 74569e0a03cSPaolo Bonzini } 74669e0a03cSPaolo Bonzini case EXIT_REASON_MWAIT: { 74769e0a03cSPaolo Bonzini ret = EXCP_INTERRUPT; 74869e0a03cSPaolo Bonzini break; 74969e0a03cSPaolo Bonzini } 750fbafbb6dSCameron Esfahani /* Need to check if MMIO or unmapped fault */ 75169e0a03cSPaolo Bonzini case EXIT_REASON_EPT_FAULT: 75269e0a03cSPaolo Bonzini { 75369e0a03cSPaolo Bonzini hvf_slot *slot; 754ff2de166SPaolo Bonzini uint64_t gpa = rvmcs(cpu->hvf_fd, VMCS_GUEST_PHYSICAL_ADDRESS); 75569e0a03cSPaolo Bonzini 75669e0a03cSPaolo Bonzini if (((idtvec_info & VMCS_IDT_VEC_VALID) == 0) && 75769e0a03cSPaolo Bonzini ((exit_qual & EXIT_QUAL_NMIUDTI) != 0)) { 75869e0a03cSPaolo Bonzini vmx_set_nmi_blocking(cpu); 75969e0a03cSPaolo Bonzini } 76069e0a03cSPaolo Bonzini 761fbafbb6dSCameron Esfahani slot = hvf_find_overlap_slot(gpa, 1); 76269e0a03cSPaolo Bonzini /* mmio */ 76369e0a03cSPaolo Bonzini if (ept_emulation_fault(slot, gpa, exit_qual)) { 76469e0a03cSPaolo Bonzini struct x86_decode decode; 76569e0a03cSPaolo Bonzini 76669e0a03cSPaolo Bonzini load_regs(cpu); 76769e0a03cSPaolo Bonzini env->hvf_emul->fetch_rip = rip; 76869e0a03cSPaolo Bonzini 76969e0a03cSPaolo Bonzini decode_instruction(env, &decode); 77069e0a03cSPaolo Bonzini exec_instruction(env, &decode); 77169e0a03cSPaolo Bonzini store_regs(cpu); 77269e0a03cSPaolo Bonzini break; 77369e0a03cSPaolo Bonzini } 77469e0a03cSPaolo Bonzini break; 77569e0a03cSPaolo Bonzini } 77669e0a03cSPaolo Bonzini case EXIT_REASON_INOUT: 77769e0a03cSPaolo Bonzini { 77869e0a03cSPaolo Bonzini uint32_t in = (exit_qual & 8) != 0; 77969e0a03cSPaolo Bonzini uint32_t size = (exit_qual & 7) + 1; 78069e0a03cSPaolo Bonzini uint32_t string = (exit_qual & 16) != 0; 78169e0a03cSPaolo Bonzini uint32_t port = exit_qual >> 16; 78269e0a03cSPaolo Bonzini /*uint32_t rep = (exit_qual & 0x20) != 0;*/ 78369e0a03cSPaolo Bonzini 78469e0a03cSPaolo Bonzini if (!string && in) { 78569e0a03cSPaolo Bonzini uint64_t val = 0; 78669e0a03cSPaolo Bonzini load_regs(cpu); 78769e0a03cSPaolo Bonzini hvf_handle_io(env, port, &val, 0, size, 1); 78869e0a03cSPaolo Bonzini if (size == 1) { 78969e0a03cSPaolo Bonzini AL(env) = val; 79069e0a03cSPaolo Bonzini } else if (size == 2) { 79169e0a03cSPaolo Bonzini AX(env) = val; 79269e0a03cSPaolo Bonzini } else if (size == 4) { 79369e0a03cSPaolo Bonzini RAX(env) = (uint32_t)val; 79469e0a03cSPaolo Bonzini } else { 795da20f5cdSPaolo Bonzini RAX(env) = (uint64_t)val; 79669e0a03cSPaolo Bonzini } 79769e0a03cSPaolo Bonzini RIP(env) += ins_len; 79869e0a03cSPaolo Bonzini store_regs(cpu); 79969e0a03cSPaolo Bonzini break; 80069e0a03cSPaolo Bonzini } else if (!string && !in) { 80169e0a03cSPaolo Bonzini RAX(env) = rreg(cpu->hvf_fd, HV_X86_RAX); 80269e0a03cSPaolo Bonzini hvf_handle_io(env, port, &RAX(env), 1, size, 1); 80369e0a03cSPaolo Bonzini macvm_set_rip(cpu, rip + ins_len); 80469e0a03cSPaolo Bonzini break; 80569e0a03cSPaolo Bonzini } 80669e0a03cSPaolo Bonzini struct x86_decode decode; 80769e0a03cSPaolo Bonzini 80869e0a03cSPaolo Bonzini load_regs(cpu); 80969e0a03cSPaolo Bonzini env->hvf_emul->fetch_rip = rip; 81069e0a03cSPaolo Bonzini 81169e0a03cSPaolo Bonzini decode_instruction(env, &decode); 812e62963bfSPaolo Bonzini assert(ins_len == decode.len); 81369e0a03cSPaolo Bonzini exec_instruction(env, &decode); 81469e0a03cSPaolo Bonzini store_regs(cpu); 81569e0a03cSPaolo Bonzini 81669e0a03cSPaolo Bonzini break; 81769e0a03cSPaolo Bonzini } 81869e0a03cSPaolo Bonzini case EXIT_REASON_CPUID: { 81969e0a03cSPaolo Bonzini uint32_t rax = (uint32_t)rreg(cpu->hvf_fd, HV_X86_RAX); 82069e0a03cSPaolo Bonzini uint32_t rbx = (uint32_t)rreg(cpu->hvf_fd, HV_X86_RBX); 82169e0a03cSPaolo Bonzini uint32_t rcx = (uint32_t)rreg(cpu->hvf_fd, HV_X86_RCX); 82269e0a03cSPaolo Bonzini uint32_t rdx = (uint32_t)rreg(cpu->hvf_fd, HV_X86_RDX); 82369e0a03cSPaolo Bonzini 82469e0a03cSPaolo Bonzini cpu_x86_cpuid(env, rax, rcx, &rax, &rbx, &rcx, &rdx); 82569e0a03cSPaolo Bonzini 82669e0a03cSPaolo Bonzini wreg(cpu->hvf_fd, HV_X86_RAX, rax); 82769e0a03cSPaolo Bonzini wreg(cpu->hvf_fd, HV_X86_RBX, rbx); 82869e0a03cSPaolo Bonzini wreg(cpu->hvf_fd, HV_X86_RCX, rcx); 82969e0a03cSPaolo Bonzini wreg(cpu->hvf_fd, HV_X86_RDX, rdx); 83069e0a03cSPaolo Bonzini 83169e0a03cSPaolo Bonzini macvm_set_rip(cpu, rip + ins_len); 83269e0a03cSPaolo Bonzini break; 83369e0a03cSPaolo Bonzini } 83469e0a03cSPaolo Bonzini case EXIT_REASON_XSETBV: { 83569e0a03cSPaolo Bonzini X86CPU *x86_cpu = X86_CPU(cpu); 83669e0a03cSPaolo Bonzini CPUX86State *env = &x86_cpu->env; 83769e0a03cSPaolo Bonzini uint32_t eax = (uint32_t)rreg(cpu->hvf_fd, HV_X86_RAX); 83869e0a03cSPaolo Bonzini uint32_t ecx = (uint32_t)rreg(cpu->hvf_fd, HV_X86_RCX); 83969e0a03cSPaolo Bonzini uint32_t edx = (uint32_t)rreg(cpu->hvf_fd, HV_X86_RDX); 84069e0a03cSPaolo Bonzini 84169e0a03cSPaolo Bonzini if (ecx) { 84269e0a03cSPaolo Bonzini macvm_set_rip(cpu, rip + ins_len); 84369e0a03cSPaolo Bonzini break; 84469e0a03cSPaolo Bonzini } 84569e0a03cSPaolo Bonzini env->xcr0 = ((uint64_t)edx << 32) | eax; 84669e0a03cSPaolo Bonzini wreg(cpu->hvf_fd, HV_X86_XCR0, env->xcr0 | 1); 84769e0a03cSPaolo Bonzini macvm_set_rip(cpu, rip + ins_len); 84869e0a03cSPaolo Bonzini break; 84969e0a03cSPaolo Bonzini } 85069e0a03cSPaolo Bonzini case EXIT_REASON_INTR_WINDOW: 85169e0a03cSPaolo Bonzini vmx_clear_int_window_exiting(cpu); 85269e0a03cSPaolo Bonzini ret = EXCP_INTERRUPT; 85369e0a03cSPaolo Bonzini break; 85469e0a03cSPaolo Bonzini case EXIT_REASON_NMI_WINDOW: 85569e0a03cSPaolo Bonzini vmx_clear_nmi_window_exiting(cpu); 85669e0a03cSPaolo Bonzini ret = EXCP_INTERRUPT; 85769e0a03cSPaolo Bonzini break; 85869e0a03cSPaolo Bonzini case EXIT_REASON_EXT_INTR: 85969e0a03cSPaolo Bonzini /* force exit and allow io handling */ 86069e0a03cSPaolo Bonzini ret = EXCP_INTERRUPT; 86169e0a03cSPaolo Bonzini break; 86269e0a03cSPaolo Bonzini case EXIT_REASON_RDMSR: 86369e0a03cSPaolo Bonzini case EXIT_REASON_WRMSR: 86469e0a03cSPaolo Bonzini { 86569e0a03cSPaolo Bonzini load_regs(cpu); 86669e0a03cSPaolo Bonzini if (exit_reason == EXIT_REASON_RDMSR) { 86769e0a03cSPaolo Bonzini simulate_rdmsr(cpu); 86869e0a03cSPaolo Bonzini } else { 86969e0a03cSPaolo Bonzini simulate_wrmsr(cpu); 87069e0a03cSPaolo Bonzini } 87169e0a03cSPaolo Bonzini RIP(env) += rvmcs(cpu->hvf_fd, VMCS_EXIT_INSTRUCTION_LENGTH); 87269e0a03cSPaolo Bonzini store_regs(cpu); 87369e0a03cSPaolo Bonzini break; 87469e0a03cSPaolo Bonzini } 87569e0a03cSPaolo Bonzini case EXIT_REASON_CR_ACCESS: { 87669e0a03cSPaolo Bonzini int cr; 87769e0a03cSPaolo Bonzini int reg; 87869e0a03cSPaolo Bonzini 87969e0a03cSPaolo Bonzini load_regs(cpu); 88069e0a03cSPaolo Bonzini cr = exit_qual & 15; 88169e0a03cSPaolo Bonzini reg = (exit_qual >> 8) & 15; 88269e0a03cSPaolo Bonzini 88369e0a03cSPaolo Bonzini switch (cr) { 88469e0a03cSPaolo Bonzini case 0x0: { 88569e0a03cSPaolo Bonzini macvm_set_cr0(cpu->hvf_fd, RRX(env, reg)); 88669e0a03cSPaolo Bonzini break; 88769e0a03cSPaolo Bonzini } 88869e0a03cSPaolo Bonzini case 4: { 88969e0a03cSPaolo Bonzini macvm_set_cr4(cpu->hvf_fd, RRX(env, reg)); 89069e0a03cSPaolo Bonzini break; 89169e0a03cSPaolo Bonzini } 89269e0a03cSPaolo Bonzini case 8: { 89369e0a03cSPaolo Bonzini X86CPU *x86_cpu = X86_CPU(cpu); 89469e0a03cSPaolo Bonzini if (exit_qual & 0x10) { 89569e0a03cSPaolo Bonzini RRX(env, reg) = cpu_get_apic_tpr(x86_cpu->apic_state); 89669e0a03cSPaolo Bonzini } else { 89769e0a03cSPaolo Bonzini int tpr = RRX(env, reg); 89869e0a03cSPaolo Bonzini cpu_set_apic_tpr(x86_cpu->apic_state, tpr); 89969e0a03cSPaolo Bonzini ret = EXCP_INTERRUPT; 90069e0a03cSPaolo Bonzini } 90169e0a03cSPaolo Bonzini break; 90269e0a03cSPaolo Bonzini } 90369e0a03cSPaolo Bonzini default: 9042d9178d9SLaurent Vivier error_report("Unrecognized CR %d", cr); 90569e0a03cSPaolo Bonzini abort(); 90669e0a03cSPaolo Bonzini } 90769e0a03cSPaolo Bonzini RIP(env) += ins_len; 90869e0a03cSPaolo Bonzini store_regs(cpu); 90969e0a03cSPaolo Bonzini break; 91069e0a03cSPaolo Bonzini } 91169e0a03cSPaolo Bonzini case EXIT_REASON_APIC_ACCESS: { /* TODO */ 91269e0a03cSPaolo Bonzini struct x86_decode decode; 91369e0a03cSPaolo Bonzini 91469e0a03cSPaolo Bonzini load_regs(cpu); 91569e0a03cSPaolo Bonzini env->hvf_emul->fetch_rip = rip; 91669e0a03cSPaolo Bonzini 91769e0a03cSPaolo Bonzini decode_instruction(env, &decode); 91869e0a03cSPaolo Bonzini exec_instruction(env, &decode); 91969e0a03cSPaolo Bonzini store_regs(cpu); 92069e0a03cSPaolo Bonzini break; 92169e0a03cSPaolo Bonzini } 92269e0a03cSPaolo Bonzini case EXIT_REASON_TPR: { 92369e0a03cSPaolo Bonzini ret = 1; 92469e0a03cSPaolo Bonzini break; 92569e0a03cSPaolo Bonzini } 92669e0a03cSPaolo Bonzini case EXIT_REASON_TASK_SWITCH: { 92769e0a03cSPaolo Bonzini uint64_t vinfo = rvmcs(cpu->hvf_fd, VMCS_IDT_VECTORING_INFO); 92869e0a03cSPaolo Bonzini x68_segment_selector sel = {.sel = exit_qual & 0xffff}; 92969e0a03cSPaolo Bonzini vmx_handle_task_switch(cpu, sel, (exit_qual >> 30) & 0x3, 93069e0a03cSPaolo Bonzini vinfo & VMCS_INTR_VALID, vinfo & VECTORING_INFO_VECTOR_MASK, vinfo 93169e0a03cSPaolo Bonzini & VMCS_INTR_T_MASK); 93269e0a03cSPaolo Bonzini break; 93369e0a03cSPaolo Bonzini } 93469e0a03cSPaolo Bonzini case EXIT_REASON_TRIPLE_FAULT: { 93569e0a03cSPaolo Bonzini qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); 93669e0a03cSPaolo Bonzini ret = EXCP_INTERRUPT; 93769e0a03cSPaolo Bonzini break; 93869e0a03cSPaolo Bonzini } 93969e0a03cSPaolo Bonzini case EXIT_REASON_RDPMC: 94069e0a03cSPaolo Bonzini wreg(cpu->hvf_fd, HV_X86_RAX, 0); 94169e0a03cSPaolo Bonzini wreg(cpu->hvf_fd, HV_X86_RDX, 0); 94269e0a03cSPaolo Bonzini macvm_set_rip(cpu, rip + ins_len); 94369e0a03cSPaolo Bonzini break; 94469e0a03cSPaolo Bonzini case VMX_REASON_VMCALL: 945fd13f23bSLiran Alon env->exception_nr = EXCP0D_GPF; 946fd13f23bSLiran Alon env->exception_injected = 1; 94769e0a03cSPaolo Bonzini env->has_error_code = true; 94869e0a03cSPaolo Bonzini env->error_code = 0; 94969e0a03cSPaolo Bonzini break; 95069e0a03cSPaolo Bonzini default: 9512d9178d9SLaurent Vivier error_report("%llx: unhandled exit %llx", rip, exit_reason); 95269e0a03cSPaolo Bonzini } 95369e0a03cSPaolo Bonzini } while (ret == 0); 95469e0a03cSPaolo Bonzini 95569e0a03cSPaolo Bonzini return ret; 95669e0a03cSPaolo Bonzini } 95769e0a03cSPaolo Bonzini 95892cc3aaaSRoman Bolshakov bool hvf_allowed; 95969e0a03cSPaolo Bonzini 96069e0a03cSPaolo Bonzini static int hvf_accel_init(MachineState *ms) 96169e0a03cSPaolo Bonzini { 96269e0a03cSPaolo Bonzini int x; 96369e0a03cSPaolo Bonzini hv_return_t ret; 96469e0a03cSPaolo Bonzini HVFState *s; 96569e0a03cSPaolo Bonzini 96669e0a03cSPaolo Bonzini ret = hv_vm_create(HV_VM_DEFAULT); 96769e0a03cSPaolo Bonzini assert_hvf_ok(ret); 96869e0a03cSPaolo Bonzini 96969e0a03cSPaolo Bonzini s = g_new0(HVFState, 1); 97069e0a03cSPaolo Bonzini 97169e0a03cSPaolo Bonzini s->num_slots = 32; 97269e0a03cSPaolo Bonzini for (x = 0; x < s->num_slots; ++x) { 97369e0a03cSPaolo Bonzini s->slots[x].size = 0; 97469e0a03cSPaolo Bonzini s->slots[x].slot_id = x; 97569e0a03cSPaolo Bonzini } 97669e0a03cSPaolo Bonzini 97769e0a03cSPaolo Bonzini hvf_state = s; 97869e0a03cSPaolo Bonzini cpu_interrupt_handler = hvf_handle_interrupt; 97969e0a03cSPaolo Bonzini memory_listener_register(&hvf_memory_listener, &address_space_memory); 98069e0a03cSPaolo Bonzini return 0; 98169e0a03cSPaolo Bonzini } 98269e0a03cSPaolo Bonzini 98369e0a03cSPaolo Bonzini static void hvf_accel_class_init(ObjectClass *oc, void *data) 98469e0a03cSPaolo Bonzini { 98569e0a03cSPaolo Bonzini AccelClass *ac = ACCEL_CLASS(oc); 98669e0a03cSPaolo Bonzini ac->name = "HVF"; 98769e0a03cSPaolo Bonzini ac->init_machine = hvf_accel_init; 98869e0a03cSPaolo Bonzini ac->allowed = &hvf_allowed; 98969e0a03cSPaolo Bonzini } 99069e0a03cSPaolo Bonzini 99169e0a03cSPaolo Bonzini static const TypeInfo hvf_accel_type = { 99269e0a03cSPaolo Bonzini .name = TYPE_HVF_ACCEL, 99369e0a03cSPaolo Bonzini .parent = TYPE_ACCEL, 99469e0a03cSPaolo Bonzini .class_init = hvf_accel_class_init, 99569e0a03cSPaolo Bonzini }; 99669e0a03cSPaolo Bonzini 99769e0a03cSPaolo Bonzini static void hvf_type_init(void) 99869e0a03cSPaolo Bonzini { 99969e0a03cSPaolo Bonzini type_register_static(&hvf_accel_type); 100069e0a03cSPaolo Bonzini } 100169e0a03cSPaolo Bonzini 100269e0a03cSPaolo Bonzini type_init(hvf_type_init); 1003