1 /* 2 * i386 CPUID, CPU class, definitions, models: sysemu-only code 3 * 4 * Copyright (c) 2003 Fabrice Bellard 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2.1 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include "qemu/osdep.h" 21 #include "cpu.h" 22 #include "sysemu/kvm.h" 23 #include "sysemu/xen.h" 24 #include "sysemu/whpx.h" 25 #include "qapi/error.h" 26 #include "qapi/qapi-visit-run-state.h" 27 #include "qapi/qmp/qdict.h" 28 #include "qom/qom-qobject.h" 29 #include "qapi/qapi-commands-machine-target.h" 30 #include "hw/qdev-properties.h" 31 32 #include "exec/address-spaces.h" 33 #include "hw/i386/apic_internal.h" 34 35 #include "cpu-internal.h" 36 37 /* Return a QDict containing keys for all properties that can be included 38 * in static expansion of CPU models. All properties set by x86_cpu_load_model() 39 * must be included in the dictionary. 40 */ 41 static QDict *x86_cpu_static_props(void) 42 { 43 FeatureWord w; 44 int i; 45 static const char *props[] = { 46 "min-level", 47 "min-xlevel", 48 "family", 49 "model", 50 "stepping", 51 "model-id", 52 "vendor", 53 "lmce", 54 NULL, 55 }; 56 static QDict *d; 57 58 if (d) { 59 return d; 60 } 61 62 d = qdict_new(); 63 for (i = 0; props[i]; i++) { 64 qdict_put_null(d, props[i]); 65 } 66 67 for (w = 0; w < FEATURE_WORDS; w++) { 68 FeatureWordInfo *fi = &feature_word_info[w]; 69 int bit; 70 for (bit = 0; bit < 64; bit++) { 71 if (!fi->feat_names[bit]) { 72 continue; 73 } 74 qdict_put_null(d, fi->feat_names[bit]); 75 } 76 } 77 78 return d; 79 } 80 81 /* Add an entry to @props dict, with the value for property. */ 82 static void x86_cpu_expand_prop(X86CPU *cpu, QDict *props, const char *prop) 83 { 84 QObject *value = object_property_get_qobject(OBJECT(cpu), prop, 85 &error_abort); 86 87 qdict_put_obj(props, prop, value); 88 } 89 90 /* Convert CPU model data from X86CPU object to a property dictionary 91 * that can recreate exactly the same CPU model. 92 */ 93 static void x86_cpu_to_dict(X86CPU *cpu, QDict *props) 94 { 95 QDict *sprops = x86_cpu_static_props(); 96 const QDictEntry *e; 97 98 for (e = qdict_first(sprops); e; e = qdict_next(sprops, e)) { 99 const char *prop = qdict_entry_key(e); 100 x86_cpu_expand_prop(cpu, props, prop); 101 } 102 } 103 104 /* Convert CPU model data from X86CPU object to a property dictionary 105 * that can recreate exactly the same CPU model, including every 106 * writable QOM property. 107 */ 108 static void x86_cpu_to_dict_full(X86CPU *cpu, QDict *props) 109 { 110 ObjectPropertyIterator iter; 111 ObjectProperty *prop; 112 113 object_property_iter_init(&iter, OBJECT(cpu)); 114 while ((prop = object_property_iter_next(&iter))) { 115 /* skip read-only or write-only properties */ 116 if (!prop->get || !prop->set) { 117 continue; 118 } 119 120 /* "hotplugged" is the only property that is configurable 121 * on the command-line but will be set differently on CPUs 122 * created using "-cpu ... -smp ..." and by CPUs created 123 * on the fly by x86_cpu_from_model() for querying. Skip it. 124 */ 125 if (!strcmp(prop->name, "hotplugged")) { 126 continue; 127 } 128 x86_cpu_expand_prop(cpu, props, prop->name); 129 } 130 } 131 132 static void object_apply_props(Object *obj, QDict *props, Error **errp) 133 { 134 const QDictEntry *prop; 135 136 for (prop = qdict_first(props); prop; prop = qdict_next(props, prop)) { 137 if (!object_property_set_qobject(obj, qdict_entry_key(prop), 138 qdict_entry_value(prop), errp)) { 139 break; 140 } 141 } 142 } 143 144 /* Create X86CPU object according to model+props specification */ 145 static X86CPU *x86_cpu_from_model(const char *model, QDict *props, Error **errp) 146 { 147 X86CPU *xc = NULL; 148 X86CPUClass *xcc; 149 Error *err = NULL; 150 151 xcc = X86_CPU_CLASS(cpu_class_by_name(TYPE_X86_CPU, model)); 152 if (xcc == NULL) { 153 error_setg(&err, "CPU model '%s' not found", model); 154 goto out; 155 } 156 157 xc = X86_CPU(object_new_with_class(OBJECT_CLASS(xcc))); 158 if (props) { 159 object_apply_props(OBJECT(xc), props, &err); 160 if (err) { 161 goto out; 162 } 163 } 164 165 x86_cpu_expand_features(xc, &err); 166 if (err) { 167 goto out; 168 } 169 170 out: 171 if (err) { 172 error_propagate(errp, err); 173 object_unref(OBJECT(xc)); 174 xc = NULL; 175 } 176 return xc; 177 } 178 179 CpuModelExpansionInfo * 180 qmp_query_cpu_model_expansion(CpuModelExpansionType type, 181 CpuModelInfo *model, 182 Error **errp) 183 { 184 X86CPU *xc = NULL; 185 Error *err = NULL; 186 CpuModelExpansionInfo *ret = g_new0(CpuModelExpansionInfo, 1); 187 QDict *props = NULL; 188 const char *base_name; 189 190 xc = x86_cpu_from_model(model->name, qobject_to(QDict, model->props), 191 &err); 192 if (err) { 193 goto out; 194 } 195 196 props = qdict_new(); 197 ret->model = g_new0(CpuModelInfo, 1); 198 ret->model->props = QOBJECT(props); 199 200 switch (type) { 201 case CPU_MODEL_EXPANSION_TYPE_STATIC: 202 /* Static expansion will be based on "base" only */ 203 base_name = "base"; 204 x86_cpu_to_dict(xc, props); 205 break; 206 case CPU_MODEL_EXPANSION_TYPE_FULL: 207 /* As we don't return every single property, full expansion needs 208 * to keep the original model name+props, and add extra 209 * properties on top of that. 210 */ 211 base_name = model->name; 212 x86_cpu_to_dict_full(xc, props); 213 break; 214 default: 215 error_setg(&err, "Unsupported expansion type"); 216 goto out; 217 } 218 219 x86_cpu_to_dict(xc, props); 220 221 ret->model->name = g_strdup(base_name); 222 223 out: 224 object_unref(OBJECT(xc)); 225 if (err) { 226 error_propagate(errp, err); 227 qapi_free_CpuModelExpansionInfo(ret); 228 ret = NULL; 229 } 230 return ret; 231 } 232 233 void cpu_clear_apic_feature(CPUX86State *env) 234 { 235 env->features[FEAT_1_EDX] &= ~CPUID_APIC; 236 } 237 238 void cpu_set_apic_feature(CPUX86State *env) 239 { 240 env->features[FEAT_1_EDX] |= CPUID_APIC; 241 } 242 243 bool cpu_has_x2apic_feature(CPUX86State *env) 244 { 245 return env->features[FEAT_1_ECX] & CPUID_EXT_X2APIC; 246 } 247 248 bool cpu_is_bsp(X86CPU *cpu) 249 { 250 return cpu_get_apic_base(cpu->apic_state) & MSR_IA32_APICBASE_BSP; 251 } 252 253 /* TODO: remove me, when reset over QOM tree is implemented */ 254 void x86_cpu_machine_reset_cb(void *opaque) 255 { 256 X86CPU *cpu = opaque; 257 cpu_reset(CPU(cpu)); 258 } 259 260 APICCommonClass *apic_get_class(Error **errp) 261 { 262 const char *apic_type = "apic"; 263 264 /* TODO: in-kernel irqchip for hvf */ 265 if (kvm_enabled()) { 266 if (!kvm_irqchip_in_kernel()) { 267 error_setg(errp, "KVM does not support userspace APIC"); 268 return NULL; 269 } 270 apic_type = "kvm-apic"; 271 } else if (xen_enabled()) { 272 apic_type = "xen-apic"; 273 } else if (whpx_apic_in_platform()) { 274 apic_type = "whpx-apic"; 275 } 276 277 return APIC_COMMON_CLASS(object_class_by_name(apic_type)); 278 } 279 280 void x86_cpu_apic_create(X86CPU *cpu, Error **errp) 281 { 282 APICCommonState *apic; 283 APICCommonClass *apic_class = apic_get_class(errp); 284 285 if (!apic_class) { 286 return; 287 } 288 289 cpu->apic_state = DEVICE(object_new_with_class(OBJECT_CLASS(apic_class))); 290 object_property_add_child(OBJECT(cpu), "lapic", 291 OBJECT(cpu->apic_state)); 292 object_unref(OBJECT(cpu->apic_state)); 293 294 /* TODO: convert to link<> */ 295 apic = APIC_COMMON(cpu->apic_state); 296 apic->cpu = cpu; 297 apic->apicbase = APIC_DEFAULT_ADDRESS | MSR_IA32_APICBASE_ENABLE; 298 299 /* 300 * apic_common_set_id needs to check if the CPU has x2APIC 301 * feature in case APIC ID >= 255, so we need to set apic->cpu 302 * before setting APIC ID 303 */ 304 qdev_prop_set_uint32(cpu->apic_state, "id", cpu->apic_id); 305 } 306 307 void x86_cpu_apic_realize(X86CPU *cpu, Error **errp) 308 { 309 APICCommonState *apic; 310 static bool apic_mmio_map_once; 311 312 if (cpu->apic_state == NULL) { 313 return; 314 } 315 qdev_realize(DEVICE(cpu->apic_state), NULL, errp); 316 317 /* Map APIC MMIO area */ 318 apic = APIC_COMMON(cpu->apic_state); 319 if (!apic_mmio_map_once) { 320 memory_region_add_subregion_overlap(get_system_memory(), 321 apic->apicbase & 322 MSR_IA32_APICBASE_BASE, 323 &apic->io_memory, 324 0x1000); 325 apic_mmio_map_once = true; 326 } 327 } 328 329 GuestPanicInformation *x86_cpu_get_crash_info(CPUState *cs) 330 { 331 X86CPU *cpu = X86_CPU(cs); 332 CPUX86State *env = &cpu->env; 333 GuestPanicInformation *panic_info = NULL; 334 335 if (hyperv_feat_enabled(cpu, HYPERV_FEAT_CRASH)) { 336 panic_info = g_new0(GuestPanicInformation, 1); 337 338 panic_info->type = GUEST_PANIC_INFORMATION_TYPE_HYPER_V; 339 340 assert(HV_CRASH_PARAMS >= 5); 341 panic_info->u.hyper_v.arg1 = env->msr_hv_crash_params[0]; 342 panic_info->u.hyper_v.arg2 = env->msr_hv_crash_params[1]; 343 panic_info->u.hyper_v.arg3 = env->msr_hv_crash_params[2]; 344 panic_info->u.hyper_v.arg4 = env->msr_hv_crash_params[3]; 345 panic_info->u.hyper_v.arg5 = env->msr_hv_crash_params[4]; 346 } 347 348 return panic_info; 349 } 350 void x86_cpu_get_crash_info_qom(Object *obj, Visitor *v, 351 const char *name, void *opaque, 352 Error **errp) 353 { 354 CPUState *cs = CPU(obj); 355 GuestPanicInformation *panic_info; 356 357 if (!cs->crash_occurred) { 358 error_setg(errp, "No crash occurred"); 359 return; 360 } 361 362 panic_info = x86_cpu_get_crash_info(cs); 363 if (panic_info == NULL) { 364 error_setg(errp, "No crash information"); 365 return; 366 } 367 368 visit_type_GuestPanicInformation(v, "crash-information", &panic_info, 369 errp); 370 qapi_free_GuestPanicInformation(panic_info); 371 } 372 373