1*fcf5ef2aSThomas Huth /* 2*fcf5ef2aSThomas Huth * QEMU x86 CPU 3*fcf5ef2aSThomas Huth * 4*fcf5ef2aSThomas Huth * Copyright (c) 2012 SUSE LINUX Products GmbH 5*fcf5ef2aSThomas Huth * 6*fcf5ef2aSThomas Huth * This library is free software; you can redistribute it and/or 7*fcf5ef2aSThomas Huth * modify it under the terms of the GNU Lesser General Public 8*fcf5ef2aSThomas Huth * License as published by the Free Software Foundation; either 9*fcf5ef2aSThomas Huth * version 2.1 of the License, or (at your option) any later version. 10*fcf5ef2aSThomas Huth * 11*fcf5ef2aSThomas Huth * This library is distributed in the hope that it will be useful, 12*fcf5ef2aSThomas Huth * but WITHOUT ANY WARRANTY; without even the implied warranty of 13*fcf5ef2aSThomas Huth * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14*fcf5ef2aSThomas Huth * Lesser General Public License for more details. 15*fcf5ef2aSThomas Huth * 16*fcf5ef2aSThomas Huth * You should have received a copy of the GNU Lesser General Public 17*fcf5ef2aSThomas Huth * License along with this library; if not, see 18*fcf5ef2aSThomas Huth * <http://www.gnu.org/licenses/lgpl-2.1.html> 19*fcf5ef2aSThomas Huth */ 20*fcf5ef2aSThomas Huth #ifndef QEMU_I386_CPU_QOM_H 21*fcf5ef2aSThomas Huth #define QEMU_I386_CPU_QOM_H 22*fcf5ef2aSThomas Huth 23*fcf5ef2aSThomas Huth #include "qom/cpu.h" 24*fcf5ef2aSThomas Huth #include "qemu/notify.h" 25*fcf5ef2aSThomas Huth 26*fcf5ef2aSThomas Huth #ifdef TARGET_X86_64 27*fcf5ef2aSThomas Huth #define TYPE_X86_CPU "x86_64-cpu" 28*fcf5ef2aSThomas Huth #else 29*fcf5ef2aSThomas Huth #define TYPE_X86_CPU "i386-cpu" 30*fcf5ef2aSThomas Huth #endif 31*fcf5ef2aSThomas Huth 32*fcf5ef2aSThomas Huth #define X86_CPU_CLASS(klass) \ 33*fcf5ef2aSThomas Huth OBJECT_CLASS_CHECK(X86CPUClass, (klass), TYPE_X86_CPU) 34*fcf5ef2aSThomas Huth #define X86_CPU(obj) \ 35*fcf5ef2aSThomas Huth OBJECT_CHECK(X86CPU, (obj), TYPE_X86_CPU) 36*fcf5ef2aSThomas Huth #define X86_CPU_GET_CLASS(obj) \ 37*fcf5ef2aSThomas Huth OBJECT_GET_CLASS(X86CPUClass, (obj), TYPE_X86_CPU) 38*fcf5ef2aSThomas Huth 39*fcf5ef2aSThomas Huth /** 40*fcf5ef2aSThomas Huth * X86CPUDefinition: 41*fcf5ef2aSThomas Huth * 42*fcf5ef2aSThomas Huth * CPU model definition data that was not converted to QOM per-subclass 43*fcf5ef2aSThomas Huth * property defaults yet. 44*fcf5ef2aSThomas Huth */ 45*fcf5ef2aSThomas Huth typedef struct X86CPUDefinition X86CPUDefinition; 46*fcf5ef2aSThomas Huth 47*fcf5ef2aSThomas Huth /** 48*fcf5ef2aSThomas Huth * X86CPUClass: 49*fcf5ef2aSThomas Huth * @cpu_def: CPU model definition 50*fcf5ef2aSThomas Huth * @kvm_required: Whether CPU model requires KVM to be enabled. 51*fcf5ef2aSThomas Huth * @parent_realize: The parent class' realize handler. 52*fcf5ef2aSThomas Huth * @parent_reset: The parent class' reset handler. 53*fcf5ef2aSThomas Huth * 54*fcf5ef2aSThomas Huth * An x86 CPU model or family. 55*fcf5ef2aSThomas Huth */ 56*fcf5ef2aSThomas Huth typedef struct X86CPUClass { 57*fcf5ef2aSThomas Huth /*< private >*/ 58*fcf5ef2aSThomas Huth CPUClass parent_class; 59*fcf5ef2aSThomas Huth /*< public >*/ 60*fcf5ef2aSThomas Huth 61*fcf5ef2aSThomas Huth /* Should be eventually replaced by subclass-specific property defaults. */ 62*fcf5ef2aSThomas Huth X86CPUDefinition *cpu_def; 63*fcf5ef2aSThomas Huth 64*fcf5ef2aSThomas Huth bool kvm_required; 65*fcf5ef2aSThomas Huth 66*fcf5ef2aSThomas Huth /* Optional description of CPU model. 67*fcf5ef2aSThomas Huth * If unavailable, cpu_def->model_id is used */ 68*fcf5ef2aSThomas Huth const char *model_description; 69*fcf5ef2aSThomas Huth 70*fcf5ef2aSThomas Huth DeviceRealize parent_realize; 71*fcf5ef2aSThomas Huth DeviceUnrealize parent_unrealize; 72*fcf5ef2aSThomas Huth void (*parent_reset)(CPUState *cpu); 73*fcf5ef2aSThomas Huth } X86CPUClass; 74*fcf5ef2aSThomas Huth 75*fcf5ef2aSThomas Huth typedef struct X86CPU X86CPU; 76*fcf5ef2aSThomas Huth 77*fcf5ef2aSThomas Huth #endif 78