1fcf5ef2aSThomas Huth /* 2fcf5ef2aSThomas Huth * QEMU x86 CPU 3fcf5ef2aSThomas Huth * 4fcf5ef2aSThomas Huth * Copyright (c) 2012 SUSE LINUX Products GmbH 5fcf5ef2aSThomas Huth * 6fcf5ef2aSThomas Huth * This library is free software; you can redistribute it and/or 7fcf5ef2aSThomas Huth * modify it under the terms of the GNU Lesser General Public 8fcf5ef2aSThomas Huth * License as published by the Free Software Foundation; either 9fcf5ef2aSThomas Huth * version 2.1 of the License, or (at your option) any later version. 10fcf5ef2aSThomas Huth * 11fcf5ef2aSThomas Huth * This library is distributed in the hope that it will be useful, 12fcf5ef2aSThomas Huth * but WITHOUT ANY WARRANTY; without even the implied warranty of 13fcf5ef2aSThomas Huth * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14fcf5ef2aSThomas Huth * Lesser General Public License for more details. 15fcf5ef2aSThomas Huth * 16fcf5ef2aSThomas Huth * You should have received a copy of the GNU Lesser General Public 17fcf5ef2aSThomas Huth * License along with this library; if not, see 18fcf5ef2aSThomas Huth * <http://www.gnu.org/licenses/lgpl-2.1.html> 19fcf5ef2aSThomas Huth */ 20fcf5ef2aSThomas Huth #ifndef QEMU_I386_CPU_QOM_H 21fcf5ef2aSThomas Huth #define QEMU_I386_CPU_QOM_H 22fcf5ef2aSThomas Huth 23fcf5ef2aSThomas Huth #include "qom/cpu.h" 24fcf5ef2aSThomas Huth #include "qemu/notify.h" 25fcf5ef2aSThomas Huth 26fcf5ef2aSThomas Huth #ifdef TARGET_X86_64 27fcf5ef2aSThomas Huth #define TYPE_X86_CPU "x86_64-cpu" 28fcf5ef2aSThomas Huth #else 29fcf5ef2aSThomas Huth #define TYPE_X86_CPU "i386-cpu" 30fcf5ef2aSThomas Huth #endif 31fcf5ef2aSThomas Huth 32fcf5ef2aSThomas Huth #define X86_CPU_CLASS(klass) \ 33fcf5ef2aSThomas Huth OBJECT_CLASS_CHECK(X86CPUClass, (klass), TYPE_X86_CPU) 34fcf5ef2aSThomas Huth #define X86_CPU(obj) \ 35fcf5ef2aSThomas Huth OBJECT_CHECK(X86CPU, (obj), TYPE_X86_CPU) 36fcf5ef2aSThomas Huth #define X86_CPU_GET_CLASS(obj) \ 37fcf5ef2aSThomas Huth OBJECT_GET_CLASS(X86CPUClass, (obj), TYPE_X86_CPU) 38fcf5ef2aSThomas Huth 39fcf5ef2aSThomas Huth /** 40fcf5ef2aSThomas Huth * X86CPUDefinition: 41fcf5ef2aSThomas Huth * 42fcf5ef2aSThomas Huth * CPU model definition data that was not converted to QOM per-subclass 43fcf5ef2aSThomas Huth * property defaults yet. 44fcf5ef2aSThomas Huth */ 45fcf5ef2aSThomas Huth typedef struct X86CPUDefinition X86CPUDefinition; 46fcf5ef2aSThomas Huth 47fcf5ef2aSThomas Huth /** 48fcf5ef2aSThomas Huth * X86CPUClass: 49fcf5ef2aSThomas Huth * @cpu_def: CPU model definition 50fcf5ef2aSThomas Huth * @kvm_required: Whether CPU model requires KVM to be enabled. 51*f48c8837SEduardo Habkost * @ordering: Ordering on the "-cpu help" CPU model list. 52bd72159dSEduardo Habkost * @migration_safe: See CpuDefinitionInfo::migration_safe 53fcf5ef2aSThomas Huth * @parent_realize: The parent class' realize handler. 54fcf5ef2aSThomas Huth * @parent_reset: The parent class' reset handler. 55fcf5ef2aSThomas Huth * 56fcf5ef2aSThomas Huth * An x86 CPU model or family. 57fcf5ef2aSThomas Huth */ 58fcf5ef2aSThomas Huth typedef struct X86CPUClass { 59fcf5ef2aSThomas Huth /*< private >*/ 60fcf5ef2aSThomas Huth CPUClass parent_class; 61fcf5ef2aSThomas Huth /*< public >*/ 62fcf5ef2aSThomas Huth 63fcf5ef2aSThomas Huth /* Should be eventually replaced by subclass-specific property defaults. */ 64fcf5ef2aSThomas Huth X86CPUDefinition *cpu_def; 65fcf5ef2aSThomas Huth 66fcf5ef2aSThomas Huth bool kvm_required; 67*f48c8837SEduardo Habkost int ordering; 68bd72159dSEduardo Habkost bool migration_safe; 69fcf5ef2aSThomas Huth 70fcf5ef2aSThomas Huth /* Optional description of CPU model. 71fcf5ef2aSThomas Huth * If unavailable, cpu_def->model_id is used */ 72fcf5ef2aSThomas Huth const char *model_description; 73fcf5ef2aSThomas Huth 74fcf5ef2aSThomas Huth DeviceRealize parent_realize; 75fcf5ef2aSThomas Huth DeviceUnrealize parent_unrealize; 76fcf5ef2aSThomas Huth void (*parent_reset)(CPUState *cpu); 77fcf5ef2aSThomas Huth } X86CPUClass; 78fcf5ef2aSThomas Huth 79fcf5ef2aSThomas Huth typedef struct X86CPU X86CPU; 80fcf5ef2aSThomas Huth 81fcf5ef2aSThomas Huth #endif 82