xref: /openbmc/qemu/target/i386/cpu-param.h (revision c5614ee3)
1 /*
2  * i386 cpu parameters for qemu.
3  *
4  * Copyright (c) 2003 Fabrice Bellard
5  * SPDX-License-Identifier: LGPL-2.0+
6  */
7 
8 #ifndef I386_CPU_PARAM_H
9 #define I386_CPU_PARAM_H
10 
11 #ifdef TARGET_X86_64
12 # define TARGET_LONG_BITS             64
13 # define TARGET_PHYS_ADDR_SPACE_BITS  52
14 /*
15  * ??? This is really 48 bits, sign-extended, but the only thing
16  * accessible to userland with bit 48 set is the VSYSCALL, and that
17  * is handled via other mechanisms.
18  */
19 # define TARGET_VIRT_ADDR_SPACE_BITS  47
20 #else
21 # define TARGET_LONG_BITS             32
22 # define TARGET_PHYS_ADDR_SPACE_BITS  36
23 # define TARGET_VIRT_ADDR_SPACE_BITS  32
24 #endif
25 #define TARGET_PAGE_BITS 12
26 
27 /* The x86 has a strong memory model with some store-after-load re-ordering */
28 #define TCG_GUEST_DEFAULT_MO      (TCG_MO_ALL & ~TCG_MO_ST_LD)
29 
30 #endif
31