1 /* 2 * Helpers for HPPA instructions. 3 * 4 * Copyright (c) 2016 Richard Henderson <rth@twiddle.net> 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2.1 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include "qemu/osdep.h" 21 #include "qemu/log.h" 22 #include "cpu.h" 23 #include "exec/exec-all.h" 24 #include "exec/helper-proto.h" 25 #include "exec/cpu_ldst.h" 26 #include "qemu/timer.h" 27 #include "trace.h" 28 29 G_NORETURN void HELPER(excp)(CPUHPPAState *env, int excp) 30 { 31 CPUState *cs = env_cpu(env); 32 33 cs->exception_index = excp; 34 cpu_loop_exit(cs); 35 } 36 37 G_NORETURN void hppa_dynamic_excp(CPUHPPAState *env, int excp, uintptr_t ra) 38 { 39 CPUState *cs = env_cpu(env); 40 41 cs->exception_index = excp; 42 cpu_loop_exit_restore(cs, ra); 43 } 44 45 void HELPER(tsv)(CPUHPPAState *env, target_ureg cond) 46 { 47 if (unlikely((target_sreg)cond < 0)) { 48 hppa_dynamic_excp(env, EXCP_OVERFLOW, GETPC()); 49 } 50 } 51 52 void HELPER(tcond)(CPUHPPAState *env, target_ureg cond) 53 { 54 if (unlikely(cond)) { 55 hppa_dynamic_excp(env, EXCP_COND, GETPC()); 56 } 57 } 58 59 static void atomic_store_3(CPUHPPAState *env, target_ulong addr, 60 uint32_t val, uintptr_t ra) 61 { 62 int mmu_idx = cpu_mmu_index(env, 0); 63 uint32_t old, new, cmp, mask, *haddr; 64 void *vaddr; 65 66 vaddr = probe_access(env, addr, 3, MMU_DATA_STORE, mmu_idx, ra); 67 if (vaddr == NULL) { 68 cpu_loop_exit_atomic(env_cpu(env), ra); 69 } 70 haddr = (uint32_t *)((uintptr_t)vaddr & -4); 71 mask = addr & 1 ? 0x00ffffffu : 0xffffff00u; 72 73 old = *haddr; 74 while (1) { 75 new = be32_to_cpu((cpu_to_be32(old) & ~mask) | (val & mask)); 76 cmp = qatomic_cmpxchg(haddr, old, new); 77 if (cmp == old) { 78 return; 79 } 80 old = cmp; 81 } 82 } 83 84 static void do_stby_b(CPUHPPAState *env, target_ulong addr, target_ureg val, 85 bool parallel, uintptr_t ra) 86 { 87 switch (addr & 3) { 88 case 3: 89 cpu_stb_data_ra(env, addr, val, ra); 90 break; 91 case 2: 92 cpu_stw_data_ra(env, addr, val, ra); 93 break; 94 case 1: 95 /* The 3 byte store must appear atomic. */ 96 if (parallel) { 97 atomic_store_3(env, addr, val, ra); 98 } else { 99 cpu_stb_data_ra(env, addr, val >> 16, ra); 100 cpu_stw_data_ra(env, addr + 1, val, ra); 101 } 102 break; 103 default: 104 cpu_stl_data_ra(env, addr, val, ra); 105 break; 106 } 107 } 108 109 void HELPER(stby_b)(CPUHPPAState *env, target_ulong addr, target_ureg val) 110 { 111 do_stby_b(env, addr, val, false, GETPC()); 112 } 113 114 void HELPER(stby_b_parallel)(CPUHPPAState *env, target_ulong addr, 115 target_ureg val) 116 { 117 do_stby_b(env, addr, val, true, GETPC()); 118 } 119 120 static void do_stby_e(CPUHPPAState *env, target_ulong addr, target_ureg val, 121 bool parallel, uintptr_t ra) 122 { 123 switch (addr & 3) { 124 case 3: 125 /* The 3 byte store must appear atomic. */ 126 if (parallel) { 127 atomic_store_3(env, addr - 3, val, ra); 128 } else { 129 cpu_stw_data_ra(env, addr - 3, val >> 16, ra); 130 cpu_stb_data_ra(env, addr - 1, val >> 8, ra); 131 } 132 break; 133 case 2: 134 cpu_stw_data_ra(env, addr - 2, val >> 16, ra); 135 break; 136 case 1: 137 cpu_stb_data_ra(env, addr - 1, val >> 24, ra); 138 break; 139 default: 140 /* Nothing is stored, but protection is checked and the 141 cacheline is marked dirty. */ 142 probe_write(env, addr, 0, cpu_mmu_index(env, 0), ra); 143 break; 144 } 145 } 146 147 void HELPER(stby_e)(CPUHPPAState *env, target_ulong addr, target_ureg val) 148 { 149 do_stby_e(env, addr, val, false, GETPC()); 150 } 151 152 void HELPER(stby_e_parallel)(CPUHPPAState *env, target_ulong addr, 153 target_ureg val) 154 { 155 do_stby_e(env, addr, val, true, GETPC()); 156 } 157 158 void HELPER(ldc_check)(target_ulong addr) 159 { 160 if (unlikely(addr & 0xf)) { 161 qemu_log_mask(LOG_GUEST_ERROR, 162 "Undefined ldc to unaligned address mod 16: " 163 TARGET_FMT_lx "\n", addr); 164 } 165 } 166 167 target_ureg HELPER(probe)(CPUHPPAState *env, target_ulong addr, 168 uint32_t level, uint32_t want) 169 { 170 #ifdef CONFIG_USER_ONLY 171 return (page_check_range(addr, 1, want) == 0) ? 1 : 0; 172 #else 173 int prot, excp; 174 hwaddr phys; 175 176 trace_hppa_tlb_probe(addr, level, want); 177 /* Fail if the requested privilege level is higher than current. */ 178 if (level < (env->iaoq_f & 3)) { 179 return 0; 180 } 181 182 excp = hppa_get_physical_address(env, addr, level, 0, &phys, &prot); 183 if (excp >= 0) { 184 if (env->psw & PSW_Q) { 185 /* ??? Needs tweaking for hppa64. */ 186 env->cr[CR_IOR] = addr; 187 env->cr[CR_ISR] = addr >> 32; 188 } 189 if (excp == EXCP_DTLB_MISS) { 190 excp = EXCP_NA_DTLB_MISS; 191 } 192 hppa_dynamic_excp(env, excp, GETPC()); 193 } 194 return (want & prot) != 0; 195 #endif 196 } 197 198 target_ureg HELPER(read_interval_timer)(void) 199 { 200 #ifdef CONFIG_USER_ONLY 201 /* In user-mode, QEMU_CLOCK_VIRTUAL doesn't exist. 202 Just pass through the host cpu clock ticks. */ 203 return cpu_get_host_ticks(); 204 #else 205 /* In system mode we have access to a decent high-resolution clock. 206 In order to make OS-level time accounting work with the cr16, 207 present it with a well-timed clock fixed at 250MHz. */ 208 return qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) >> 2; 209 #endif 210 } 211