1 /* 2 * HPPA emulation cpu helpers for qemu. 3 * 4 * Copyright (c) 2016 Richard Henderson <rth@twiddle.net> 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2.1 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include "qemu/osdep.h" 21 #include "qemu/log.h" 22 #include "cpu.h" 23 #include "fpu/softfloat.h" 24 #include "exec/exec-all.h" 25 #include "exec/helper-proto.h" 26 #include "qemu/qemu-print.h" 27 28 target_ulong cpu_hppa_get_psw(CPUHPPAState *env) 29 { 30 target_ulong psw; 31 target_ulong mask1 = (target_ulong)-1 / 0xf; 32 target_ulong maskf = (target_ulong)-1 / 0xffff * 0xf; 33 34 /* Fold carry bits down to 8 consecutive bits. */ 35 /* ^^^b^^^c^^^d^^^e^^^f^^^g^^^h^^^i^^^j^^^k^^^l^^^m^^^n^^^o^^^p^^^^ */ 36 psw = (env->psw_cb >> 4) & mask1; 37 /* .......b...c...d...e...f...g...h...i...j...k...l...m...n...o...p */ 38 psw |= psw >> 3; 39 /* .......b..bc..cd..de..ef..fg..gh..hi..ij..jk..kl..lm..mn..no..op */ 40 psw |= psw >> 6; 41 psw &= maskf; 42 /* .............bcd............efgh............ijkl............mnop */ 43 psw |= psw >> 12; 44 /* .............bcd.........bcdefgh........efghijkl........ijklmnop */ 45 psw |= env->psw_cb_msb << 39; 46 /* .............bcd........abcdefgh........efghijkl........ijklmnop */ 47 48 /* For hppa64, the two 8-bit fields are discontiguous. */ 49 if (hppa_is_pa20(env)) { 50 psw = (psw & 0xff00000000ull) | ((psw & 0xff) << 8); 51 } else { 52 psw = (psw & 0xff) << 8; 53 } 54 55 psw |= env->psw_n * PSW_N; 56 psw |= (env->psw_v < 0) * PSW_V; 57 psw |= env->psw; 58 59 return psw; 60 } 61 62 void cpu_hppa_put_psw(CPUHPPAState *env, target_ulong psw) 63 { 64 uint64_t reserved; 65 target_ulong cb = 0; 66 67 /* Do not allow reserved bits to be set. */ 68 if (hppa_is_pa20(env)) { 69 reserved = MAKE_64BIT_MASK(40, 24) | MAKE_64BIT_MASK(28, 4); 70 reserved |= PSW_G; /* PA1.x only */ 71 reserved |= PSW_E; /* not implemented */ 72 } else { 73 reserved = MAKE_64BIT_MASK(32, 32) | MAKE_64BIT_MASK(28, 2); 74 reserved |= PSW_O | PSW_W; /* PA2.0 only */ 75 reserved |= PSW_E | PSW_Y | PSW_Z; /* not implemented */ 76 } 77 psw &= ~reserved; 78 79 env->psw = psw & (uint32_t)~(PSW_N | PSW_V | PSW_CB); 80 81 env->psw_n = (psw / PSW_N) & 1; 82 env->psw_v = -((psw / PSW_V) & 1); 83 84 env->psw_cb_msb = (psw >> 39) & 1; 85 cb |= ((psw >> 38) & 1) << 60; 86 cb |= ((psw >> 37) & 1) << 56; 87 cb |= ((psw >> 36) & 1) << 52; 88 cb |= ((psw >> 35) & 1) << 48; 89 cb |= ((psw >> 34) & 1) << 44; 90 cb |= ((psw >> 33) & 1) << 40; 91 cb |= ((psw >> 32) & 1) << 36; 92 cb |= ((psw >> 15) & 1) << 32; 93 cb |= ((psw >> 14) & 1) << 28; 94 cb |= ((psw >> 13) & 1) << 24; 95 cb |= ((psw >> 12) & 1) << 20; 96 cb |= ((psw >> 11) & 1) << 16; 97 cb |= ((psw >> 10) & 1) << 12; 98 cb |= ((psw >> 9) & 1) << 8; 99 cb |= ((psw >> 8) & 1) << 4; 100 env->psw_cb = cb; 101 } 102 103 void hppa_cpu_dump_state(CPUState *cs, FILE *f, int flags) 104 { 105 CPUHPPAState *env = cpu_env(cs); 106 target_ulong psw = cpu_hppa_get_psw(env); 107 target_ulong psw_cb; 108 char psw_c[20]; 109 int i, w; 110 uint64_t m; 111 112 if (hppa_is_pa20(env)) { 113 w = 16; 114 m = UINT64_MAX; 115 } else { 116 w = 8; 117 m = UINT32_MAX; 118 } 119 120 qemu_fprintf(f, "IA_F " TARGET_FMT_lx " IA_B " TARGET_FMT_lx 121 " IIR %0*" PRIx64 "\n", 122 hppa_form_gva_psw(psw, env->iasq_f, env->iaoq_f), 123 hppa_form_gva_psw(psw, env->iasq_b, env->iaoq_b), 124 w, m & env->cr[CR_IIR]); 125 126 psw_c[0] = (psw & PSW_W ? 'W' : '-'); 127 psw_c[1] = (psw & PSW_E ? 'E' : '-'); 128 psw_c[2] = (psw & PSW_S ? 'S' : '-'); 129 psw_c[3] = (psw & PSW_T ? 'T' : '-'); 130 psw_c[4] = (psw & PSW_H ? 'H' : '-'); 131 psw_c[5] = (psw & PSW_L ? 'L' : '-'); 132 psw_c[6] = (psw & PSW_N ? 'N' : '-'); 133 psw_c[7] = (psw & PSW_X ? 'X' : '-'); 134 psw_c[8] = (psw & PSW_B ? 'B' : '-'); 135 psw_c[9] = (psw & PSW_C ? 'C' : '-'); 136 psw_c[10] = (psw & PSW_V ? 'V' : '-'); 137 psw_c[11] = (psw & PSW_M ? 'M' : '-'); 138 psw_c[12] = (psw & PSW_F ? 'F' : '-'); 139 psw_c[13] = (psw & PSW_R ? 'R' : '-'); 140 psw_c[14] = (psw & PSW_Q ? 'Q' : '-'); 141 psw_c[15] = (psw & PSW_P ? 'P' : '-'); 142 psw_c[16] = (psw & PSW_D ? 'D' : '-'); 143 psw_c[17] = (psw & PSW_I ? 'I' : '-'); 144 psw_c[18] = '\0'; 145 psw_cb = ((env->psw_cb >> 4) & 0x1111111111111111ull) 146 | (env->psw_cb_msb << 60); 147 148 qemu_fprintf(f, "PSW %0*" PRIx64 " CB %0*" PRIx64 " %s\n", 149 w, m & psw, w, m & psw_cb, psw_c); 150 151 for (i = 0; i < 32; i++) { 152 qemu_fprintf(f, "GR%02d %0*" PRIx64 "%c", 153 i, w, m & env->gr[i], 154 (i & 3) == 3 ? '\n' : ' '); 155 } 156 #ifndef CONFIG_USER_ONLY 157 for (i = 0; i < 8; i++) { 158 qemu_fprintf(f, "SR%02d %08x%c", i, (uint32_t)(env->sr[i] >> 32), 159 (i & 3) == 3 ? '\n' : ' '); 160 } 161 #endif 162 qemu_fprintf(f, "\n"); 163 164 /* ??? FR */ 165 } 166