1 /* 2 * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, see <http://www.gnu.org/licenses/>. 16 */ 17 18 #ifndef HEXAGON_MMVEC_H 19 #define HEXAGON_MMVEC_H 20 21 #define MAX_VEC_SIZE_LOGBYTES 7 22 #define MAX_VEC_SIZE_BYTES (1 << MAX_VEC_SIZE_LOGBYTES) 23 24 #define NUM_VREGS 32 25 #define NUM_QREGS 4 26 27 typedef uint32_t VRegMask; /* at least NUM_VREGS bits */ 28 typedef uint32_t QRegMask; /* at least NUM_QREGS bits */ 29 30 #define VECTOR_SIZE_BYTE (fVECSIZE()) 31 32 typedef union { 33 uint64_t ud[MAX_VEC_SIZE_BYTES / 8]; 34 int64_t d[MAX_VEC_SIZE_BYTES / 8]; 35 uint32_t uw[MAX_VEC_SIZE_BYTES / 4]; 36 int32_t w[MAX_VEC_SIZE_BYTES / 4]; 37 uint16_t uh[MAX_VEC_SIZE_BYTES / 2]; 38 int16_t h[MAX_VEC_SIZE_BYTES / 2]; 39 uint8_t ub[MAX_VEC_SIZE_BYTES / 1]; 40 int8_t b[MAX_VEC_SIZE_BYTES / 1]; 41 } MMVector; 42 43 typedef union { 44 uint64_t ud[2 * MAX_VEC_SIZE_BYTES / 8]; 45 int64_t d[2 * MAX_VEC_SIZE_BYTES / 8]; 46 uint32_t uw[2 * MAX_VEC_SIZE_BYTES / 4]; 47 int32_t w[2 * MAX_VEC_SIZE_BYTES / 4]; 48 uint16_t uh[2 * MAX_VEC_SIZE_BYTES / 2]; 49 int16_t h[2 * MAX_VEC_SIZE_BYTES / 2]; 50 uint8_t ub[2 * MAX_VEC_SIZE_BYTES / 1]; 51 int8_t b[2 * MAX_VEC_SIZE_BYTES / 1]; 52 MMVector v[2]; 53 } MMVectorPair; 54 55 typedef union { 56 uint64_t ud[MAX_VEC_SIZE_BYTES / 8 / 8]; 57 int64_t d[MAX_VEC_SIZE_BYTES / 8 / 8]; 58 uint32_t uw[MAX_VEC_SIZE_BYTES / 4 / 8]; 59 int32_t w[MAX_VEC_SIZE_BYTES / 4 / 8]; 60 uint16_t uh[MAX_VEC_SIZE_BYTES / 2 / 8]; 61 int16_t h[MAX_VEC_SIZE_BYTES / 2 / 8]; 62 uint8_t ub[MAX_VEC_SIZE_BYTES / 1 / 8]; 63 int8_t b[MAX_VEC_SIZE_BYTES / 1 / 8]; 64 } MMQReg; 65 66 typedef struct { 67 MMVector data; 68 DECLARE_BITMAP(mask, MAX_VEC_SIZE_BYTES); 69 target_ulong va[MAX_VEC_SIZE_BYTES]; 70 bool op; 71 int op_size; 72 } VTCMStoreLog; 73 74 75 /* Types of vector register assignment */ 76 typedef enum { 77 EXT_DFL, /* Default */ 78 EXT_NEW, /* New - value used in the same packet */ 79 EXT_TMP /* Temp - value used but not stored to register */ 80 } VRegWriteType; 81 82 #endif 83