xref: /openbmc/qemu/target/hexagon/hex_regs.h (revision 2df1eb27)
1 /*
2  *  Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
3  *
4  *  This program is free software; you can redistribute it and/or modify
5  *  it under the terms of the GNU General Public License as published by
6  *  the Free Software Foundation; either version 2 of the License, or
7  *  (at your option) any later version.
8  *
9  *  This program is distributed in the hope that it will be useful,
10  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
11  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  *  GNU General Public License for more details.
13  *
14  *  You should have received a copy of the GNU General Public License
15  *  along with this program; if not, see <http://www.gnu.org/licenses/>.
16  */
17 
18 #ifndef HEXAGON_HEX_REGS_H
19 #define HEXAGON_HEX_REGS_H
20 
21 enum {
22     HEX_REG_R00              = 0,
23     HEX_REG_R01              = 1,
24     HEX_REG_R02              = 2,
25     HEX_REG_R03              = 3,
26     HEX_REG_R04              = 4,
27     HEX_REG_R05              = 5,
28     HEX_REG_R06              = 6,
29     HEX_REG_R07              = 7,
30     HEX_REG_R08              = 8,
31     HEX_REG_R09              = 9,
32     HEX_REG_R10              = 10,
33     HEX_REG_R11              = 11,
34     HEX_REG_R12              = 12,
35     HEX_REG_R13              = 13,
36     HEX_REG_R14              = 14,
37     HEX_REG_R15              = 15,
38     HEX_REG_R16              = 16,
39     HEX_REG_R17              = 17,
40     HEX_REG_R18              = 18,
41     HEX_REG_R19              = 19,
42     HEX_REG_R20              = 20,
43     HEX_REG_R21              = 21,
44     HEX_REG_R22              = 22,
45     HEX_REG_R23              = 23,
46     HEX_REG_R24              = 24,
47     HEX_REG_R25              = 25,
48     HEX_REG_R26              = 26,
49     HEX_REG_R27              = 27,
50     HEX_REG_R28              = 28,
51     HEX_REG_R29              = 29,
52     HEX_REG_SP               = 29,
53     HEX_REG_FP               = 30,
54     HEX_REG_R30              = 30,
55     HEX_REG_LR               = 31,
56     HEX_REG_R31              = 31,
57     HEX_REG_SA0              = 32,
58     HEX_REG_LC0              = 33,
59     HEX_REG_SA1              = 34,
60     HEX_REG_LC1              = 35,
61     HEX_REG_P3_0_ALIASED     = 36,
62     HEX_REG_M0               = 38,
63     HEX_REG_M1               = 39,
64     HEX_REG_USR              = 40,
65     HEX_REG_PC               = 41,
66     HEX_REG_UGP              = 42,
67     HEX_REG_GP               = 43,
68     HEX_REG_CS0              = 44,
69     HEX_REG_CS1              = 45,
70     HEX_REG_UPCYCLELO        = 46,
71     HEX_REG_UPCYCLEHI        = 47,
72     HEX_REG_FRAMELIMIT       = 48,
73     HEX_REG_FRAMEKEY         = 49,
74     HEX_REG_PKTCNTLO         = 50,
75     HEX_REG_PKTCNTHI         = 51,
76     /* Use reserved control registers for qemu execution counts */
77     HEX_REG_QEMU_PKT_CNT      = 52,
78     HEX_REG_QEMU_INSN_CNT     = 53,
79     HEX_REG_QEMU_HVX_CNT      = 54,
80     HEX_REG_UTIMERLO          = 62,
81     HEX_REG_UTIMERHI          = 63,
82 };
83 
84 #endif
85