1*7b6917b9SPhilippe Mathieu-Daudé /* 2*7b6917b9SPhilippe Mathieu-Daudé * QEMU Hexagon CPU QOM header (target agnostic) 3*7b6917b9SPhilippe Mathieu-Daudé * 4*7b6917b9SPhilippe Mathieu-Daudé * Copyright(c) 2019-2023 Qualcomm Innovation Center, Inc. All Rights Reserved. 5*7b6917b9SPhilippe Mathieu-Daudé * 6*7b6917b9SPhilippe Mathieu-Daudé * SPDX-License-Identifier: GPL-2.0-or-later 7*7b6917b9SPhilippe Mathieu-Daudé */ 8*7b6917b9SPhilippe Mathieu-Daudé 9*7b6917b9SPhilippe Mathieu-Daudé #ifndef QEMU_HEXAGON_CPU_QOM_H 10*7b6917b9SPhilippe Mathieu-Daudé #define QEMU_HEXAGON_CPU_QOM_H 11*7b6917b9SPhilippe Mathieu-Daudé 12*7b6917b9SPhilippe Mathieu-Daudé #include "hw/core/cpu.h" 13*7b6917b9SPhilippe Mathieu-Daudé 14*7b6917b9SPhilippe Mathieu-Daudé #define TYPE_HEXAGON_CPU "hexagon-cpu" 15*7b6917b9SPhilippe Mathieu-Daudé 16*7b6917b9SPhilippe Mathieu-Daudé #define HEXAGON_CPU_TYPE_SUFFIX "-" TYPE_HEXAGON_CPU 17*7b6917b9SPhilippe Mathieu-Daudé #define HEXAGON_CPU_TYPE_NAME(name) (name HEXAGON_CPU_TYPE_SUFFIX) 18*7b6917b9SPhilippe Mathieu-Daudé 19*7b6917b9SPhilippe Mathieu-Daudé #define TYPE_HEXAGON_CPU_V67 HEXAGON_CPU_TYPE_NAME("v67") 20*7b6917b9SPhilippe Mathieu-Daudé #define TYPE_HEXAGON_CPU_V68 HEXAGON_CPU_TYPE_NAME("v68") 21*7b6917b9SPhilippe Mathieu-Daudé #define TYPE_HEXAGON_CPU_V69 HEXAGON_CPU_TYPE_NAME("v69") 22*7b6917b9SPhilippe Mathieu-Daudé #define TYPE_HEXAGON_CPU_V71 HEXAGON_CPU_TYPE_NAME("v71") 23*7b6917b9SPhilippe Mathieu-Daudé #define TYPE_HEXAGON_CPU_V73 HEXAGON_CPU_TYPE_NAME("v73") 24*7b6917b9SPhilippe Mathieu-Daudé 25*7b6917b9SPhilippe Mathieu-Daudé OBJECT_DECLARE_CPU_TYPE(HexagonCPU, HexagonCPUClass, HEXAGON_CPU) 26*7b6917b9SPhilippe Mathieu-Daudé 27*7b6917b9SPhilippe Mathieu-Daudé #endif 28