1 /* 2 * CRIS virtual CPU header 3 * 4 * Copyright (c) 2007 AXIS Communications AB 5 * Written by Edgar E. Iglesias 6 * 7 * This library is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU Lesser General Public 9 * License as published by the Free Software Foundation; either 10 * version 2 of the License, or (at your option) any later version. 11 * 12 * This library is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * General Public License for more details. 16 * 17 * You should have received a copy of the GNU Lesser General Public 18 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 19 */ 20 21 #ifndef CRIS_CPU_H 22 #define CRIS_CPU_H 23 24 #include "qemu-common.h" 25 #include "cpu-qom.h" 26 #include "exec/cpu-defs.h" 27 28 #define CPUArchState struct CPUCRISState 29 30 #define EXCP_NMI 1 31 #define EXCP_GURU 2 32 #define EXCP_BUSFAULT 3 33 #define EXCP_IRQ 4 34 #define EXCP_BREAK 5 35 36 /* CRIS-specific interrupt pending bits. */ 37 #define CPU_INTERRUPT_NMI CPU_INTERRUPT_TGT_EXT_3 38 39 /* CRUS CPU device objects interrupt lines. */ 40 #define CRIS_CPU_IRQ 0 41 #define CRIS_CPU_NMI 1 42 43 /* Register aliases. R0 - R15 */ 44 #define R_FP 8 45 #define R_SP 14 46 #define R_ACR 15 47 48 /* Support regs, P0 - P15 */ 49 #define PR_BZ 0 50 #define PR_VR 1 51 #define PR_PID 2 52 #define PR_SRS 3 53 #define PR_WZ 4 54 #define PR_EXS 5 55 #define PR_EDA 6 56 #define PR_PREFIX 6 /* On CRISv10 P6 is reserved, we use it as prefix. */ 57 #define PR_MOF 7 58 #define PR_DZ 8 59 #define PR_EBP 9 60 #define PR_ERP 10 61 #define PR_SRP 11 62 #define PR_NRP 12 63 #define PR_CCS 13 64 #define PR_USP 14 65 #define PRV10_BRP 14 66 #define PR_SPC 15 67 68 /* CPU flags. */ 69 #define Q_FLAG 0x80000000 70 #define M_FLAG_V32 0x40000000 71 #define PFIX_FLAG 0x800 /* CRISv10 Only. */ 72 #define F_FLAG_V10 0x400 73 #define P_FLAG_V10 0x200 74 #define S_FLAG 0x200 75 #define R_FLAG 0x100 76 #define P_FLAG 0x80 77 #define M_FLAG_V10 0x80 78 #define U_FLAG 0x40 79 #define I_FLAG 0x20 80 #define X_FLAG 0x10 81 #define N_FLAG 0x08 82 #define Z_FLAG 0x04 83 #define V_FLAG 0x02 84 #define C_FLAG 0x01 85 #define ALU_FLAGS 0x1F 86 87 /* Condition codes. */ 88 #define CC_CC 0 89 #define CC_CS 1 90 #define CC_NE 2 91 #define CC_EQ 3 92 #define CC_VC 4 93 #define CC_VS 5 94 #define CC_PL 6 95 #define CC_MI 7 96 #define CC_LS 8 97 #define CC_HI 9 98 #define CC_GE 10 99 #define CC_LT 11 100 #define CC_GT 12 101 #define CC_LE 13 102 #define CC_A 14 103 #define CC_P 15 104 105 typedef struct { 106 uint32_t hi; 107 uint32_t lo; 108 } TLBSet; 109 110 typedef struct CPUCRISState { 111 uint32_t regs[16]; 112 /* P0 - P15 are referred to as special registers in the docs. */ 113 uint32_t pregs[16]; 114 115 /* Pseudo register for the PC. Not directly accessible on CRIS. */ 116 uint32_t pc; 117 118 /* Pseudo register for the kernel stack. */ 119 uint32_t ksp; 120 121 /* Branch. */ 122 int dslot; 123 int btaken; 124 uint32_t btarget; 125 126 /* Condition flag tracking. */ 127 uint32_t cc_op; 128 uint32_t cc_mask; 129 uint32_t cc_dest; 130 uint32_t cc_src; 131 uint32_t cc_result; 132 /* size of the operation, 1 = byte, 2 = word, 4 = dword. */ 133 int cc_size; 134 /* X flag at the time of cc snapshot. */ 135 int cc_x; 136 137 /* CRIS has certain insns that lockout interrupts. */ 138 int locked_irq; 139 int interrupt_vector; 140 int fault_vector; 141 int trap_vector; 142 143 /* FIXME: add a check in the translator to avoid writing to support 144 register sets beyond the 4th. The ISA allows up to 256! but in 145 practice there is no core that implements more than 4. 146 147 Support function registers are used to control units close to the 148 core. Accesses do not pass down the normal hierarchy. 149 */ 150 uint32_t sregs[4][16]; 151 152 /* Linear feedback shift reg in the mmu. Used to provide pseudo 153 randomness for the 'hint' the mmu gives to sw for choosing valid 154 sets on TLB refills. */ 155 uint32_t mmu_rand_lfsr; 156 157 /* 158 * We just store the stores to the tlbset here for later evaluation 159 * when the hw needs access to them. 160 * 161 * One for I and another for D. 162 */ 163 TLBSet tlbsets[2][4][16]; 164 165 /* Fields up to this point are cleared by a CPU reset */ 166 struct {} end_reset_fields; 167 168 CPU_COMMON 169 170 /* Members from load_info on are preserved across resets. */ 171 void *load_info; 172 } CPUCRISState; 173 174 /** 175 * CRISCPU: 176 * @env: #CPUCRISState 177 * 178 * A CRIS CPU. 179 */ 180 struct CRISCPU { 181 /*< private >*/ 182 CPUState parent_obj; 183 /*< public >*/ 184 185 CPUCRISState env; 186 }; 187 188 static inline CRISCPU *cris_env_get_cpu(CPUCRISState *env) 189 { 190 return container_of(env, CRISCPU, env); 191 } 192 193 #define ENV_GET_CPU(e) CPU(cris_env_get_cpu(e)) 194 195 #define ENV_OFFSET offsetof(CRISCPU, env) 196 197 #ifndef CONFIG_USER_ONLY 198 extern const struct VMStateDescription vmstate_cris_cpu; 199 #endif 200 201 void cris_cpu_do_interrupt(CPUState *cpu); 202 void crisv10_cpu_do_interrupt(CPUState *cpu); 203 bool cris_cpu_exec_interrupt(CPUState *cpu, int int_req); 204 205 void cris_cpu_dump_state(CPUState *cs, FILE *f, int flags); 206 207 hwaddr cris_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); 208 209 int crisv10_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); 210 int cris_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); 211 int cris_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); 212 213 /* you can call this signal handler from your SIGBUS and SIGSEGV 214 signal handlers to inform the virtual CPU of exceptions. non zero 215 is returned if the signal was handled by the virtual CPU. */ 216 int cpu_cris_signal_handler(int host_signum, void *pinfo, 217 void *puc); 218 219 void cris_initialize_tcg(void); 220 void cris_initialize_crisv10_tcg(void); 221 222 /* Instead of computing the condition codes after each CRIS instruction, 223 * QEMU just stores one operand (called CC_SRC), the result 224 * (called CC_DEST) and the type of operation (called CC_OP). When the 225 * condition codes are needed, the condition codes can be calculated 226 * using this information. Condition codes are not generated if they 227 * are only needed for conditional branches. 228 */ 229 enum { 230 CC_OP_DYNAMIC, /* Use env->cc_op */ 231 CC_OP_FLAGS, 232 CC_OP_CMP, 233 CC_OP_MOVE, 234 CC_OP_ADD, 235 CC_OP_ADDC, 236 CC_OP_MCP, 237 CC_OP_ADDU, 238 CC_OP_SUB, 239 CC_OP_SUBU, 240 CC_OP_NEG, 241 CC_OP_BTST, 242 CC_OP_MULS, 243 CC_OP_MULU, 244 CC_OP_DSTEP, 245 CC_OP_MSTEP, 246 CC_OP_BOUND, 247 248 CC_OP_OR, 249 CC_OP_AND, 250 CC_OP_XOR, 251 CC_OP_LSL, 252 CC_OP_LSR, 253 CC_OP_ASR, 254 CC_OP_LZ 255 }; 256 257 /* CRIS uses 8k pages. */ 258 #define MMAP_SHIFT TARGET_PAGE_BITS 259 260 #define CRIS_CPU_TYPE_SUFFIX "-" TYPE_CRIS_CPU 261 #define CRIS_CPU_TYPE_NAME(name) (name CRIS_CPU_TYPE_SUFFIX) 262 #define CPU_RESOLVING_TYPE TYPE_CRIS_CPU 263 264 #define cpu_signal_handler cpu_cris_signal_handler 265 266 /* MMU modes definitions */ 267 #define MMU_MODE0_SUFFIX _kernel 268 #define MMU_MODE1_SUFFIX _user 269 #define MMU_USER_IDX 1 270 static inline int cpu_mmu_index (CPUCRISState *env, bool ifetch) 271 { 272 return !!(env->pregs[PR_CCS] & U_FLAG); 273 } 274 275 bool cris_cpu_tlb_fill(CPUState *cs, vaddr address, int size, 276 MMUAccessType access_type, int mmu_idx, 277 bool probe, uintptr_t retaddr); 278 279 /* Support function regs. */ 280 #define SFR_RW_GC_CFG 0][0 281 #define SFR_RW_MM_CFG env->pregs[PR_SRS]][0 282 #define SFR_RW_MM_KBASE_LO env->pregs[PR_SRS]][1 283 #define SFR_RW_MM_KBASE_HI env->pregs[PR_SRS]][2 284 #define SFR_R_MM_CAUSE env->pregs[PR_SRS]][3 285 #define SFR_RW_MM_TLB_SEL env->pregs[PR_SRS]][4 286 #define SFR_RW_MM_TLB_LO env->pregs[PR_SRS]][5 287 #define SFR_RW_MM_TLB_HI env->pregs[PR_SRS]][6 288 289 #include "exec/cpu-all.h" 290 291 static inline void cpu_get_tb_cpu_state(CPUCRISState *env, target_ulong *pc, 292 target_ulong *cs_base, uint32_t *flags) 293 { 294 *pc = env->pc; 295 *cs_base = 0; 296 *flags = env->dslot | 297 (env->pregs[PR_CCS] & (S_FLAG | P_FLAG | U_FLAG 298 | X_FLAG | PFIX_FLAG)); 299 } 300 301 #define cpu_list cris_cpu_list 302 void cris_cpu_list(void); 303 304 #endif 305