xref: /openbmc/qemu/target/arm/trace-events (revision d0fb9657)
1*d0fb9657SStefano Garzarella# See docs/devel/tracing.rst for syntax documentation.
2fcf5ef2aSThomas Huth
3500016e5SMarkus Armbruster# helper.c
48908eb1aSVladimir Sementsov-Ogievskiyarm_gt_recalc(int timer, int irqstate, uint64_t nexttick) "gt recalc: timer %d irqstate %d next tick 0x%" PRIx64
5fcf5ef2aSThomas Hutharm_gt_recalc_disabled(int timer) "gt recalc: timer %d irqstate 0 timer disabled"
68908eb1aSVladimir Sementsov-Ogievskiyarm_gt_cval_write(int timer, uint64_t value) "gt_cval_write: timer %d value 0x%" PRIx64
78908eb1aSVladimir Sementsov-Ogievskiyarm_gt_tval_write(int timer, uint64_t value) "gt_tval_write: timer %d value 0x%" PRIx64
88908eb1aSVladimir Sementsov-Ogievskiyarm_gt_ctl_write(int timer, uint64_t value) "gt_ctl_write: timer %d value 0x%" PRIx64
9fcf5ef2aSThomas Hutharm_gt_imask_toggle(int timer, int irqstate) "gt_ctl_write: timer %d IMASK toggle, new irqstate %d"
108908eb1aSVladimir Sementsov-Ogievskiyarm_gt_cntvoff_write(uint64_t value) "gt_cntvoff_write: value 0x%" PRIx64
11b05c81d2SEric Auger
12500016e5SMarkus Armbruster# kvm.c
13b05c81d2SEric Augerkvm_arm_fixup_msi_route(uint64_t iova, uint64_t gpa) "MSI iova = 0x%"PRIx64" is translated into 0x%"PRIx64
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